(al)<((si)) al<=((si)) y: l1 n: l2=l3 lop1: l3 cmp al, [si] jb l1 jmp

Instruction System Program Control Instruction &
Program Structure Design
计算机学院 李征
Tel:13882153765
Email:[email protected]
OICQ: 1340915
Program Control Instruction
Program control instructions can change
the program flow with or without conditions.
These instructions are used for branch or
cycle program structure design.
About Status Flags
All program control instructions do not
affect status flags.
Program transfer instruction with
conditions may judge status flags.
1) Program Transfer without
Condition
Direct transfer in segment:
JMP label (Symbol DISP)
DISP is provided by instruction itself, and it is
complement code (signed).
DISP can be 8-bit (near transfer) or 16-bit (far
transfer).
Direct transfer in segment
L1:
JMP
MOV
…
MOV
…
L1
AX,0
AX,0FFFFH
After execution, what is (AX)?
Direct transfer in segment
What does this DISP mean?
DISP = EA of destination address – EA of JMP
instruction
DISP means the byte distance from ‘JMP’ to
destination address.
The calculation of DISP is performed in
assembling procedure.
Direct transfer in segment
Destination EA > EA of JMP:DISP > 0
Destination EA < EA of JMP:DISP < 0
Function of JMP:IP <= (IP)+ DISP
Direct transfer in segment
(IP)+DISP
This addition is considered as signed operation.
DISP may be positive or negative, but (IP) is
always positive.
The 16-th bit (out of word range) of (IP) is
considered as sign,it is always 0.
The 16-th bit of DISP is extended sign from the
15-th bit.
Direct transfer in segment
Example: (IP) =1100101001101011
DISP = 11100110
(IP) + DISP:
+
0 11001010 01101011
1 11111111 11100110
0 11001010 01010001
The addition result is always positive. After this operation,
(IP) should be considered as unsigned again.
Direct transfer in segment
If DISP is in range from -128 to 127, it is
generated as 8-bit. (near transfer)
If DISP is out of range from -128 to 127, it
is generated as 16-bit. (far transfer)
1) Program Transfer without
Condition
Indirect transfer in segment:
JMP 16-bit register or memory cell
Function:
IP <= (register or memory cell)
Indirect transfer in segment
Example:
JMP BX
Function: IP <=(BX)
JMP WORD PTR [SI]
Function: IP <= (DS:SI)
Difference between direct and
indirect transfer in segment
Direct transfer in segment:
IP <= (IP)+DISP
Indirect transfer in segment:
IP <= (register or memory cell)
1) Program Transfer without
Condition
Direct transfer between segment:
JMP label
;Label is not in the same segment with
‘JMP’.
JMP FAR PTR label
Direct transfer between segment
Function:
IP <= EA of lable
CS <= Segment base value of label
1) Program Transfer without
Condition
Indirect transfer between segment:
JMP DWORD PTR memory cell
Function:
IP <=(EA)
CS <=(EA+2)
Indirect transfer between segment
Example:
…
ADR1 DD L1
…
JMP DWORD PTR ADR1
Logic address of ‘L1’ is preserved in
‘ADR1’.
2) Program Transfer Instruction
with Condition
These instructions perform transfer only if given
conditions are satisfied.
If given conditions are not satisfied, CPU
execute the following instruction.
Two Possible Conditions:
Status Flags
Register Status
2) Program Transfer Instruction
with Condition
JXX
label (8-bit DISP)
‘JXX’ instructions always composed of two bytes.
One byte is for operation code, and another is
for DISP.
‘JXX’ can only execute near transfer.
If far transfer is needed, ‘JMP’ must also be
used.
Transfer with Single Flag
Correspondent flags:
CF、ZF、SF、OF、PF
Correspondent instructions:
JC, JNC
JZ, JNZ
JS, JNS
JO, JNO
JP, JNP
Transfer with Single Flag
Example: Design a program clip to compare byte DB1
and DB2. If they are equal, set (AL) to 0; or else, set (AL)
to 0FFH.
MOV AL,DB1
CMP AL,DB2
JZ
L1
; Near transfer has a future problem.
MOV AL,0FFH
JMP L2
; Can this ‘JMP’ be removed?
L1: MOV AL,00H
L2: MOV AH,4CH
INT 21H
Good Design for Branch Structure
MOV AL,DB1
AL<= DB1
Y:L1
N:L2
AL=DB2?
AL<= 0
AL<= 0FFH
CMP AL,DB2
JZ
L1
JMP L2
L1: MOV AL,0
JMP L3
L3
L2: MOV AL,0FFH
L3: MOV AH,4CH
INT 21H
Transfer with Register Status
JCXZ label
This instruction perform transfer if (CX) is
zero.
Note: (CX)=0 is the condition, not ZF=1.
Transfer with Register Status
MOV AX,34H
MOV CX,34H
CMP CX,AX
JCXZ L1
…
L1:
…
Does this ‘JCXZ’ perform transfer?
Transfer with Register Status
General usage of ‘JCXZ’
mov cx, count
jcxz next
Lop:
……
loop lop
next:
……
Unsigned Condition Transfer
These instructions can perform program transfer
based on unsigned comparison.
Application Conditions:
1) If one uses unsigned condition transfer
instruction, ‘CMP’ must be used first.
2) And in ‘CMP’, one must consider operation
data as unsigned data.
Unsigned Condition Transfer
In ‘CMP’:
CMP DEST, SRC
In unsigned condition transfer instructions,
DEST is considered as data A, and SRC is
considered as data B.
CF and ZF are combined for unsigned
conditions.
Unsigned Condition Transfer
JA: if A>B, transfer is performed.
JNBE: if A≤B is not satisfied, transfer is
performed.
Flag Condition: CF=0 AND ZF=0
CF=0: No borrow at highest bit, A≥B
ZF=0: A≠B
Combined Condition: A>B
Unsigned Condition Transfer
JAE:A≥B
JNB:not A<B
Flag Condition: CF=0 OR ZF=1
CF=0: A≥B
ZF=1: A=B
Combined Condition: A≥B
Unsigned Condition Transfer
JB: A<B
JNAE: not A≥B
Flag Condition: CF=1 AND ZF=0
CF=1: A<B
ZF=0: A≠B
Combined Condition: A<B
Unsigned Condition Transfer
JBE: A≤B
JNA: not A>B
Flag Condition: CF=1 OR ZF=1
CF=1: A<B
ZF=1: A=B
Combined Condition: A≤B
Unsigned Condition Transfer
Example: Unsigned byte array ARY is
preserved in data segment. Find the
maximum in ARY, and preserve it in cell
MAX.
Data Analysis:
1) ARY
2) Max
Unsigned Condition Transfer
Design:
1) Put byte 0 of ARY in AL.
2) Use a cycle structure, query every byte in
ARY orderly.
3) Use a branch in this cycle. If the current byte
of ARY is greater than (AL), put the current byte
in AL.
Unsigned Condition Transfer
SI is used to locate byte in ARY.
CX is used for counting cycle.
Flow Chart and Program Design
开始
LOP1:
MOV
MOV
MOV
初始化SI、
CX、AL
进入循环,修改SI
使它指向下一个数据
Y: L1
N: L2=L3
(AL)<((SI))
AL<=((SI))
SI, OFFSET ARY
CX, 9
AL, [SI]
LOP1: INC
CMP
JB
JMP
AL, [SI]
L1
L3 ;L2=L3
L1: MOV
JMP
L3
SI
AL, [SI]
L3(可省略)
Flow Chart and Program Design
N: LOP1
L3
CX<=(CX)-1
L3: DEC
CX
JNZ
LOP1 ;条件转移实现循环
MAX<=(AL)
MOV
MAX, AL
结束
MOV
INT
AH, 4CH
21H
(CX)=0?
Signed Condition Transfer
These instructions can perform program transfer
based on signed comparison.
Application Conditions:
1) If one uses signed condition transfer
instruction, ‘CMP’ must be used first.
2) And in ‘CMP’, one must consider operation
data as signed data.
Signed Condition Transfer
In ‘CMP’:
CMP DEST, SRC
In signed condition transfer instructions,
DEST is considered as data A, and SRC is
considered as data B.
SF, OF and ZF are combined for signed
conditions.
Signed Condition Transfer
JG: if A>B, transfer is performed.
JNLE: if A≤B is not satisfied, program transfer is
performed.
Flag Condition: SF=OF AND ZF=0
SF=OF : Correct SF is 0, A≥B
ZF=0: A≠B
Combined Condition: A>B
Signed Condition Transfer
JGE: A≥B
JNL: not A<B
Flag Condition: SF=OF OR ZF=1
SF=OF: A≥B
ZF=1: A=B
Combined Condition: A≥B
Signed Condition Transfer
JL: A<B
JNGE: not A≥B
Flag Condition: SF≠OF AND ZF=0
SF≠OF: Correct SF is 1, A<B
ZF=0: A≠B
Combined Condition: A<B
Signed Condition Transfer
JLE: A≤B
JNG: not A>B
Flag Condition: SF≠OF OR ZF=1
SF≠OF: A<B
ZF=1: A=B
Combined Condition: A≤B
Signed Condition Transfer
Consider the last unsigned operation
example.
If the byte of ARY is signed, the ‘JB’
instruction in program must be replaced
with ‘JL’.
LOOP Instruction and Cycle
Structure
LOOP instruction is designed for cycle
structure in program.
LOOP label (symbol DISP)
LOOP instruction composed of two bytes.
One byte is for operation code, and
another is for DISP.
LOOP Instruction and Cycle
Structure
Execution of LOOP:
1) CX<=(CX)-1
2) If (CX) ≠0, CPU perform program transfer. Or
else, the following instruction will be executed.
Application condition of LOOP:
Initial count must be preserved in CX before
cycle structure is executed.
LOOP Instruction and Cycle
Structure
Remember the cycle structure in last unsigned
operation example?
dec cx
jnz lop
These instructions can be simplified as:
loop lop
LOOP Instruction and Cycle
Structure
LOOPZ / LOOPE label
1)CX<=(CX)-1
2)If(CX)≠0 AND ZF=1, program
transfer is performed. Or else, the
following instruction will be executed.
LOOP Instruction and Cycle
Structure
LOOPNE / LOOPNZ
label
1)CX<=(CX)-1
2)If(CX)≠0 AND ZF=0, program
transfer is performed. Or else, the
following instruction will be executed.
LOOP Instruction and Cycle
Structure
Example: Search the first non-space
character in a string. If searching is
successful, index (1~n) of the character is
preserved in cell index. Or else, 0FFH is
sent to cell index.
LOOP Instruction and Cycle
Structure
data segment
strg db ‘CHECK NO_SPACE’
leng db $-strg
index db ?
data ends
stack1 segment stack
dw 20h dup(0)
stack1 ends
LOOP Instruction and Cycle
Structure
code segment
assume cs:code,ds:data,ss:stack1
start: mov ax, data
mov ds, ax
mov cx, leng
mov bx, -1
next: inc bx
cmp strg[bx], ‘ ‘
loopz next
jnz found
mov bl, 0feh
LOOP Instruction and Cycle
Structure
found: inc
mov
mov
int
code ends
end
bl
index, bl
ah, 4ch
21h
start
Another example for cycle structure
Example: Check how many bits in word
cell VARW are 1. Preserve the count of ‘1’
in cell CONT.
Thinking: Count cycle structure? Is there a
method which is more effective?
Another example for cycle structure
data
varw
cont
data
segment
dw 1101010010001000B
db ?
ends
stack1 segment stack
dw 20h dup(0)
stack1 ends
Another example for cycle structure
code segment
assume cs:code, ds:data, ss:stack1
begin: mov ax, data
mov ds, ax
mov cl, 0
mov ax, varw
lop: test ax, 0ffffh
jz
end0
Another example for cycle structure
jns
shift
inc
cl
shift: shl
ax, 1
jmp lop
end0: mov cont, cl
mov ah, 4ch
int
21h
code ends
end begin
Nested Cycle
Example: Calculate 12+22+32+……N2
without multiplication instruction.
Thinking: Two nested cycle
Inner cycle: i = i+i+…+i (i times addition)
Outer cycle: 12+22+32+……N2 (N times
addition)
Nested Cycle
data
sum
n
data
segment
dw ?
db 20
ends
stack1 segment stack
dw 20h dup(0)
stack1 ends
Nested Cycle
code segment
assume cs:code, ds:data, ss:stack1
start: mov ax, data
mov ds, ax
mov dx, 0
mov cx, 0
mov cl, n
;Initialize outer cycle
Nested Cycle
lop1: mov
mov
lop2: add
dec
jnz
add
loop
ax, 0
bx, cx ;Initialize inner cycle
ax, cx ;Inner accumulation
bx
lop2
dx, ax ;Outer accumulation
lop1
Nested Cycle
mov sum, dx
mov ah, 4ch
int 21h
code ends
end start