MA251 Computer Organization and
Architecture [3-0-0-6]
Lecture 3: Combinational Logic
Spring 2011
Partha Sarathi Mandal
Combinational Logic
• Logic circuits for digital system may be Combinational or sequential
• Combinational circuit
– consists of logic gates whose outputs at any time are determined
directly from the present combination of inputs without regard to
previous inputs.
– performs a specific information-processing operation fully specified
logically by a set of bollean functions.
• Sequential circuit
– Employ memory elements in addition to logic gates.
– Outputs are a function of the inputs and the state of the memory
elements.
– The state of memory elements are function of previous inputs.
– As a consequence, the output depend not only on present input, but
also on past inputs and the circuit behavior must be specified by a
time sequence of inputs and internal states.
Multiple-Output Circuits
• Many circuits have more than one output
• Can give each a separate circuit, or can share
gates.
• Example: F = ab + c’, G = ab + bc
– Option 1: Separate circuits
– Option 2: Shared gates
Exercise
• Convert the following Boolean equations to a
digital circuit, sharing gates wherever possible.
– F(a,b,c) = abc + a’b’c + bc’
– G(a,b) = ab + a’b’
Single Bit Arithmetic
• We can add two bits according to the following
truth table:
• Designing with minterms gives us the Boolean
equations:
SUM = A’B + AB’
CARRY = AB
Exclusive Or
• The truth table for sum is an exclusive or
SUM = A’B + AB’ = A eor B = AB
• As we have already seen exclusive or gates can
be used in circuit design.
Exclusive Nor
• The Exclusive Nor is also easy to manufacture
and can make space savings in circuit design.
EOR Simplification Rules
• We can add the exclusive or and nor as
simplification rules in Boolean Algebra:
A’B + AB’ = A eor B
AB + A’B’ = (A eor B)’
(proof by truth table)
The Half Adder
• A one bit adder, called a half adder is
represented by the following equation and
circuit:
CARRY = AB SUM = AB
The Half Adder
• A one bit adder, called a half adder is
represented by the following equation and
circuit:
CARRY = AB SUM = AB
The Half Adder
• A one bit adder, called a half adder is
represented by the following equation and
circuit:
CARRY = AB SUM = AB
The Half Adder
Is half-adder enough?
Can we add two binary numbers using half adders
only?
There is a
problem
here
Is half-adder enough?
The full adder
• To add numbers of more than one bit we need
to include a carry in
Equations of the full adder
= A'•B'•C + A'•B•C' + A•B'•C' + A•B•C
= A'•(B'•C+B•C') + A•(B'•C'+B•C)
= A'•(BC) + A•(BC)'
= ABC
CARRY= A'•B•C + A•B'•C + A•B•C' + A•B•C
= C•(A'•B+A•B') + A•B
= C•(AB) + A•B
SUM
Circuit of the full adder
Implementation of full-adder with two halfadder and an OR gate
Building an n-bit adder
An n-bit adder with carry in
Ripple through carry
• The previous circuit is called the ripple
through carry adder.
• There are faster circuits which are designed to
propagate the carry faster.
– One is look ahead carry adder.
The serial adder:
bits arrive "least significant first"
Subtraction
• Subtraction is done by the normal “borrow”
and “payback” method
Exercise
• Evaluate 11001 - 10110 using the truth table
below
Subtractor circuit
• The minterm method can be used to determine a circuit for
the subtractor.
• The simplified equations are:
– DIFFERENCE = ABP
– BORROW = BP + A’(B+P) = BP + A’(BP)
• One bit full subtractor:
Two's complement subtractor
• It is also common practice to use a two's
complement subtractor in hardware.
A - B = A + TwosComplement(B)
• The two's complement is formed by flipping
each bit of a number and adding one.
Notice the use of carry-in for increment
Subtraction
• How do we take our adder and extend it so that it
can perform subtraction operations?
• Instead of building a special subtraction unit, we
can subtract by adding the two's complement,
which is the one's complement plus one.
• Furthermore, the carry in to the adder can be
used to add that extra one, so we do our
subtraction by adding the one's complement with
a carry in of one.
• recall that a ⊕ 0 = a while a ⊕ 1 = a’
4 bits adder-subtractor
If sub = 0 then bi⊕ 0 = bi
If sub = 1 then bi ⊕ 1 = bi’
Adder
Adder-Subtractor
Multiplication
Consider how we multiply two digit numbers:
A 1 A 0 x B 1B 0 =
A1 x B1 x102 +A1 x B0 x 10 +A0 x B1 x10 +A0 x B0
or, for binary numbers
A 1 A 0 x B 1B 0 =
A1 x B1 x 22 +A1 x B0 x 2 +A0 x B1 x 2 +A0 x B0
Multiplication
For binary digits, the AND operator is the
same as multiply, so:
A1A0.B1B0 =
A1.B1.22 +A1.B0.2 +A0.B1.2 +A0.B0
And multiplying by 2 can be replaced by
Shifting right,
The 2 bit multiplier
Multiplication
• The product of two n-bit numbers requires 2n bits to
contain all possible values.
• If the precision of the two two's-complement operands
is doubled before the multiplication, direct
multiplication will provide the correct result.
• Example
Magnitude Comparator
• The comparison of two numbers is an operation that
determines if one number is greater than, less than or
equal to the other number.
• A magnitude comparator is a combinational circuit that
compares two numbers, A and B, and determines their
relative magnitudes.
• The outcome of the comparison is specified by three binary
variables that indicate whether A>B, A=B, A<B.
• The circuit for comparing two n-bit numbers has 22n entries
in the truth table.
• For n = 3 number of entries are 64, its too cumbersome to
calculate the function from truth table !
• alternative ?
Magnitude Comparator
• Digital function that possess an inherent well-defined
regularity can usually be designed by means of an
algorithmic procedure if one is found to exist.
• We illustrate an algorithm for the design of a 4-bit
magnitude comparator.
• Let A & B are two 4-bit numbers with descending
significance.
Magnitude Comparator
• Two numbers are equal if all pairs of
significant digits are equal.
– If A3=B3 and A2=B2 and A1=B1 and A0=B0
– Logical expression is following
xi= AiBi + A’iB’i i = 0, 1, 2, 3
– The equality condition to exit, all xi variables must
be equal to 1.
(A=B) = x3x2x1x0
Magnitude Comparator
• Two numbers are not equal
– Implies A > B or A < B
– We inspect the relative magnitudes of pars of significant digits starting
from the most significant position.
– If two digits are equal, we compare the next lower significant pair of
digits.
– This comparison continues until a pair of unequal digits is reached.
– If the corresponding digit of A is 1 and that of B is 0 we have A > B
– If the corresponding digit of A is 0 and that of B is 1 we have A < B
– The sequential comparison can be expressed logically by following two
boolean functions:
(A > B) = A3B’3 + x3 A2B’2 + x3 x2 A1B’1 + x3 x2x1 A0B’0
(A < B) = A’3B3 + x3 A’2B2 + x3 x2 A’1B1 + x3 x2x1 A’0B0
4-bit digital comparator
(A=B)= x3x2x1x0
where xi= AiBi + A’iB’I
(A > B) = A3B’3 + x3 A2B’2
+ x3 x2 A1B’1
+ x3 x2x1 A0B’0
(A < B) = A’3B3 + x3 A’2B2
+ x3 x2 A’1B1
+ x3 x2x1 A’0B0
1-bit digital comparator