Simulation Verification of Different Constraints in System Level

Simulation Verification of Different Constraints in
System Level Design in SystemC
Piyush Ranjan Satapathy
CS220 Class Project
Presentation
The Problem Statement
• How can we detect deadlock in the system level design in
systemC ?
• What are the other possibilities of design constraints in
systemC ? (E.g. Live lock, Starvation)
• We know that system level designs are highly complex,
heterogeneous and concurrent. so how can we detect the
above constraints in the complex model of designing ?
What is the solution ?
• Analyse the synchronization dependencies of the systems
designed in systemC
• Capture the run time dependencies of various blocks in the
system and maintain a data structure named Dynamic
Synchronization Dependency Graph
• Use a loop detection algorithm to detect the deadlocks.
• Similar to Metropolis Approach but varies with the
Environment and synchronization lists.
Motivation
• A System level designer deals with
 Function Vs Architecture
 Computation Vs Communication
 Data Path Vs Control
• Possible to introduce unintended and undesirable behaviors
into function specifications, high level architectural models
or functional mappings.
• Deadlock, Livelock and Starvation are such undesired
behaviors which designer may face at the runtime.
• So detecting such a scenario by simulation helps us
knowing the design faults and also helps to figure out the
exact portion of the design/code to change.
Road Map
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Some back Grounds in SystemC
Synchronizations and Dependencies in SystemC
Constraints scenario in systemC
Deadlock Detection Data Structure
Loop Detection Algorithm
Algorithm in Action in 1 systemC Model
A Comparison with Related Work (MMM Environment)
Conclusion
Future Work
Some back Grounds in SystemC
Slide From http://www-cad.eecs.berkeley.edu/~polis/class/ee249/lectures/l10-systemC.pdf
Slide From http://www-cad.eecs.berkeley.edu/~polis/class/ee249/lectures/l10-systemC.pdf
Slide From http://www-cad.eecs.berkeley.edu/~polis/class/ee249/lectures/l10-SystemC.pdf
Slide From http://www-cad.eecs.berkeley.edu/~polis/class/ee249/lectures/l10-SystemC.pdf
SystemC Highlights
1.
It supports Hardware-Software Co-Design. All
Constructs are in a C++ Environment. It introduces
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2.
It introduces
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3.
3 kinds of processes such as Method, Thread, and Cthread
Ports and Modules
Events (Flexible and Low Level synchronization Primitive)
Channels (A Container class for communication and
Synchronization)
Interfaces (Specify a set of access methods to channel)
It supports
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Clocks (time Keeper of Simulation)
Event Driven Simulation by Dynamic sensitivity of Events
E.g. (Wait(), next_trigger(),wait_until)
Slide From http://www-cad.eecs.berkeley.edu/~polis/class/ee249/lectures/l10-SystemC.pdf
Synchronizations and Dependencies in SystemC
Transferring Control of Execution From One process to
Another Process
1. For Thread Process:
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2.
For Method Process:
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3.
Next_trigger() : Returns immediately so no constraints here.
For Clocked Thread Process:
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4.
Wait()
Wait(e1)
Wait(e1 | e2 | e3)
Wait(e1 & e2 & e3)
Wait_until()
Watching()
Access to shared data using Mutex through proper
synchronization
Synchronizations and Dependencies in SystemC
Resuming the Execution of the Dependent Process
1.
For Thread Process:
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2.
For Method Process:
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3.
Notify()
//Notify Immediately
Notify(SC_ZERO_TIME) //Notify Next Delta Cycle
Notify(t) //Notify at time t
Cancel() //Cancels a delayed notification
Next_trigger method() returns immediately without passing the
control to another Process
For Clocked Thread Process:
•
Boolean true value to wait_until() or watching() methods.
SystemC Event Scheduler
INIT
Evaluate
YES
Immediate Notification ?
Update
YES
Delta Event Notification ?
Next Simulation Time
Pending Events ?
DONE
YES
P1
e
P2
P0
||
e
e
P3
p4
e
P1
e
P0
&&
P2
e
P3
e
Live Lock in SystemC
Live lock is defined as a situation where the system falls into dead
loop and responds to no further interrupts. Its defined as infinite
cyclic executions of any events.
Case1:
Waiting events of the same process.. (But I have not tried)
Case2:
Data Watch in Cthread Process..What if Wait_until() and watching
not get satisfied…It will loop infinitely. Because that is the
property of the clocked thread process.
Starvation in SystemC
Starvation is defined as a situation where a process will be blocked
infinitely. Live lock of some processes may cause starvation for the
dependent processes.
Case1:
Notify() at a circular basis at immediate stage or at Next Delta cycle
stage
Case2:
Data path blocking due to watch() or wait_until() or due to mutex
sharing.
DSDG
Deadlock
Detection
System level Design
Dead Lock
Update
DSDG
Analysis
Deadlock ?
YES
Output
Dependencies
Compilation
Simulation Model
Simulation
vectors
Simulation
Deadlock Analysis
Simulation
trace
Simulation
Dependencies
Revise the design and/or simulation
vectors
Analysis
Report
Deadlock
Warnings?
Data Structure (Dynamic Synchronization
Dependency Graph)
• Let’s represent the synchronization dependency as a
directed graph S=(V,E) where V is a set of 4 categories of
vertices representing processes in the system, one
dependency, set of and dependency, set of or dependency.
E is a set of directed edges between vertices indicating
dynamic synchronization dependencies.
P
&&
Process vertex
And vertex
||
Or vertex
e
Single Dependency vertex
DSDG Examples
Updating DSDG Dynamically
Algorithm(1):
Checking When to update and what to update
For each process Pi in the system
If Pi is in Evaluation Phase
if Pi is unblocked by one or more synch constraints then
Remove all the dependency vertices and edges from Pi
end if
if Pi is blocked by one or more synch constraints then
UPDATE_PROCESS(Pi)
end if
end If
End For
Updating DSDG Dynamically
Algorithm(2):
How to update
UPDATE_PROCESS(Pi)
For each synch construct that blocks Pi do
if Pi is blocked by any one of P1, P2,…Pn then
add an OR dependency vertex Oi
CONNECT(Pi, Oi, pj:j Є [1,n])
else if Pi is blocked by any all of P1, P2,…Pn then
add an AND dependency vertex ai
CONNECT(Pi, ai, pj:j Є [1,n])
else if Pi is blocked by one process PJ then
add an single dependency vertes si
CONNECT(Pi, si, pJ)
end if
End for
End procedure
Updating DSDG Dynamically
Algorithm(3):
Connecting…
CONNECT (source,Mid, Desti: i Є [1,n])
add an edge from source to Mid
if (i = = 1) then
add an edge from Mid to Dest1
end if
for i := 1 to n do
add an edge from Mid to Desti
end for
Loop Detection Algorithm
1 DEADLOCK_DETECTION(S,P)
2 Search for simple cycles in S starting from process P
3 Let L = {Vi, Si} be the set of all these cycles
4 If L = Ф then
5
Return “No Deadlock”
6 End if
7 For each Li in L do
8
if the cycle is marked then
9
continue;
10 end if
11 Mark the cycle Li
12 if each vertex in the cycle Li are either process or and dependency or single vertex dependency then the process in Li
are deadlocked, return;
13 else
14 D:= OR dependency vertices that have two or more outgoing edges
15 L’ = {Li}
16 repeat
17 Find unmarked cycles in L that contains vertices in Di
18 mark all these cycles
19 L’ = L’ U {these cycles}
20
until L’ becomes stable
21 If vertex in D that has an outgoing edge not belongs to L’ then
22
continue
23 Endif
24 The process in L’ are deadlocked , return
25 Endif
26 End for
27 Return No_Deadlock;
28 End procedure
Algorithm in Action
Example: Dining philosopher problem
P3
e2
e3
P4
P2
e4
e1
e0
P0
P1
One Instance of Simulation:
Got e4
Got e0
P0
e4
P4
Got e3
e3
P3
Got e2
e2
P2
Got e1
e1
P1
e0
Satisfied by Line 12 of algorithm..so deadlock….
Comparison With MMM
• Wait(), notify(), wait_until(),
watching()
• Based on systemC kernel
scheduler
• Based on the top of the C++. So
systemC is more approachable
for system level design
• More or less C++ Library
• Loop Detection algorithm much
easier compared to MMM
• Await(), synch, eval
• Based on metro Quantity
manager
• Based on the Java Platform
• New keywords and syntaxes
Conclusion
• Detecting deadlock at early time of the design saves both
in time and money.
• In this project, I have studied the deadlock and other
constraints in system level design in systemC
• Implemented a prototype of deadlock and verified the
modified algorithms
Future work
• More research on Live lock and Starvation
• How to resolve the deadlock dynamically
• Possible modify the simulator of systemC-2.0.1 to hold
this deadlock detection feautre
Acknowledgement
• “Simulation Based Deadlock Analysis for system Level
Designs” by Xi Chen, et al. DAC’0
• http://wwwcad.eecs.berkeley.edu/~polis/class/ee249/lectures/l10systemC.pdf
• SystemC Func Guide and users guide (SystemC-2.0.1)
Thank You !!
P
&&
Process vertex
And vertex
||
Or vertex
e
Single dependency vertex
A
B