CPSC 362
Quiz #3
Name: ________________________________
February 2, 2012
1. (a) (3) Draw an 8-processor (labeled 0-7) butterfly network with 32 switch
nodes. (Put your answer on the back of this sheet.)
See page 32 of textbook.
(b) (3) Explain clearly how processor 4 sends a message to processor 3. Your
answer should refer to the processor nodes depicted in 1(a). (Put your
answer on the back of this sheet.)
See page 33 of textbook.
2. (4) How does Quinn distinguish between networks and clusters of workstations?
See page 53-54 of textbook.
3. (3) Define the term: diameter of a network. Which is better, high diameter or low
diameter? Why?
See page 29 of textbook.
(3) Define the term: bisection width of a switch network. Which is better, high
bisection width or low bisection width? Why?
See page 29 of textbook.
4. (4) Assume a shared memory multiprocessor system with three processors,
three main memories, and three separate caches. Assume that variable X is
stored in the main memory controlled by CPU 2. Assume further that copies of X
are in the cache memories of CPU 0 and CPU 2. The bit vector for variable X
reads “S101”. Finally, assume that the value of X is 7 in main memory and in both
caches.
If processor 0 changes the value of X to 6, describe in detail the events that ensue.
Be detailed and precise.
See page 47-48 of textbook.