EE121
John Wakerly
Lecture #11
Sequential-circuit design
Sequential-circuit synthesis
1
State-machine design and synthesis
The creative part, like
writing a program
Turning the crank, like
a compiler does
• Example: Design a combination lock with two
inputs, X1 and X2. Open for the sequence
X1, X2, X2 (one input per clock).
2
• Example: Design a combination lock with two
inputs, X1 and X2. Open for the sequence
X1, X2, X2 (one input per clock).
State
X1 X2
-------------------------- ----------------------------------------------Meaning
Name
00
01
10
11 UNLOCK
-------------------------- ----------------------------------------------Start
A
A
A
B
A (B) 0
Got X1
B
A
C
A
A (C) 0
Got X1,X2
C
A
D
A
A (D) 0
Got X1,X2,X2 D
A
A (D)
B
A
1
• Specification ambiguities are resolved in the
state table.
3
State Assignment
• Can minimize number of states (see text), but
hardly anyone bothers anymore.
• Need to assign state-variable combinations to
states.
– Minimum number of variables for n states is log2 n
– Using more than minimum number may be
advantageous in some situations, e.g., one variable
per state (“one-hot”) (see text).
– Example -- 4 states, 2 state variables (Q1,Q2):
A ==> 00
B ==> 01
C ==> 10
D ==> 11
Up to this point is “art”, the
rest is just “turning the crank.”
4
Transition table
• Substitute state-variable combinations for
states in the state table.
State
X1 X2
-------------------------- ----------------------------------------------Meaning
Q1 Q2
00
01
10
11 UNLOCK
-------------------------- ----------------------------------------------Start
00
00
00
01
00
0
Got X1
01
00
10
00
00
0
Got X1,X2
10
00
11
00
00
0
Got X1,X2,X2 1 1
00
00
01
00
1
---------------------------------------------Q1 Q2
5
Transition equations; circuit
• Transition table specifies each state variable
(Q1, Q2) as a combinational logic function
of Q1, Q2, X1, X2.
– Find a realization of each function by your favorite
means -- ad hoc, minimal sum-of-products, etc.
• Build the circuit.
Q1
Q1
D
Q
D
Q
Q1
UNLOCK
Q2
X1
X2
Q2
Q2
CLK
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state_diagram LOCKST
state A: if X1&!X2 then
state B: if !X1&X2 then
state C: if !X1&X2 then
state D: if X1&!X2 then
Design using
ABEL state
diagrams
Different order
LOCKST
A
B
C
D
LOCKST
A
B
C
D
[Q1,Q2];
[ 0, 0];
[ 0, 1];
[ 1, 0];
[ 1, 1];
else
else
else
else
equations
UNLOCK = (LOCKST==D);
State assignment
=
=
=
=
=
B
C
D
B
One-hot assignment
=
=
=
=
=
[Q1,Q2];
[ 0, 0];
[ 0, 1];
[ 1, 1];
[ 1, 0];
LOCKST
A
B
C
D
=
=
=
=
=
[Q1,Q2,Q3,Q4];
[ 1, 0, 0, 0];
[ 0, 1, 0, 0];
[ 0, 0, 1, 0];
[ 0, 0, 0, 1];
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A;
A;
C;
A;
Another design example (from text)
• Design a machine with inputs A and B and
output Z that is 1 if:
– A had the same value at the two previous ticks
– B has been 1 since the last time the above was true
8
State assignment
• There are 6,720 different state assignments of
5 states to 3 variables.
– And there are even more using 4 or more variables
• Here are a few “obvious” or “interesting” ones:
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Transition/output table
(decomposed assignment)
• Simple textual substitution
• With D flip-flops, excitation table is identical to
transition table.
10
Develop
excitation
equations
• Assume unused states have next-state = 000
11
Same example using ABEL
• Note about reset inputs:
– You always need a “power-on” reset input for a
sequential circuit.
– Previous example did not use synchronous reset
because of manual-synthesis complexity.
– Asynchronous reset is sometimes used (PR and
CLR inputs of flip-flops).
12
“State
Diagram”
This essentially
mimics the
state table.
13
State assignment
• Note definition of “extra” states.
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Odds ’n’ ends
• Good behavior for extra states
• Clock and output equations
• Alternative state assignments are easy
– Modify state definitions and possibly output pins
and extra states.
– Unspecified states go to 0,0,…0.
15
ABEL-derived excitation equations
• Equivalent to what was derived by hand, with
the addition of the RESET input.
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And now for something completely different...
• ABEL’s language features can be used to
enable a different, “hybrid” approach.
• Use one register to keep track of the previous
value of A; use a state machine for the rest.
Records previous value of A
17
Simpler, more natural state machine
• Really an example of “state-machine
decomposition.”
18
Equations and state assignments
19
Wrap-up
• Next time: PLD-based state-machine design
examples
• Discussion of Lab #5
• How to deal with pushbuttons, edge detection,
etc.
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