Processor Architecture
Jurij Silc, Borut Robic, Theo Ungerer
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Plan of lectures (1)
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Prelude
Chapter 1: RISC processors, ISA, basic processor structure, basic pipelining,
pipeline hazards and solutions, static branch prediction, multi-cycle ops, RISC
examples, JAVA processors
Chapter 2: Dataflow processors
Chapter 3: Scoreboarding and Tomasulo
Chapter 4: Principles of superscalar and VLIW processors, instruction fetch and
dynamic branch prediction techniques, later pipeline stages in detail, multimedia
enhancements, processor examples: Pentium III, Transmeta Crusoe, VLIW, EPIC
and the Itanium processor
Chapter 5: Technological trends, value speculation, trace cache, advanced
superscalar
Chapter 6: Multithreading, Sun’s MAJC and single-chip multiprocessor,
simultaneous multithreading, Alpha 21464, multiscalar and dynamic
multithreading, datascalar
Chapter 7: Processor-in-Memory, reconfigurable and asynchonous processor
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Processor architecture course focus
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Understanding the design techniques, machine structures, technology factors,
evaluation methods that will determine the form of computers in 21st Century
Technology
Parallelism
Programming
Languages
Applications
Computer Architecture:
• Instruction Set Design
• Organization
• Hardware
Operating
Systems
Measurement &
Evaluation
Interface Design
(ISA)
History
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Topic coverage
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Basics: Scalar RISC Processors and Basic Pipelining
Past:
– Dataflow Processors
– CISC Processors: Scoreboarding and Tomasulo Algorithm
Present: Multiple-Issue Processors
– Superscalars, Multimedia Enhancements, VLIW and EPIC
Future:
– Technological Trends
– Traditionals: Value Speculation, Trace Cache, Future Superscalars/EPICs,
– Parallel Solutions: Multithreading, Single-Chip Multiprocessor, Processor-inMemory,
– Advanced research: Multiscalar, Dynamic Multithreading
– Exotics: Datascalar, Reconfigurable Computing, Asynchronous Processors
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Textbook
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Jurij Silc, Borut Robic, Theo Ungerer: Processor Architecture - From Dataflow
to Superscalar and Beyond (Springer-Verlag, 1999)
Journal papers
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Jurij Silc, Borut Robic, Theo Ungerer: "Asynchrony in parallel computing: From
dataflow to multithreading", Parallel and Distributed Computing Practices,
1(1):3-30, 1998.
Borut Robic, Jurij Silc, Theo Ungerer: "Beyond dataflow", J. Computing and
Information Technology, 8(2):89-101, 2000.
Jurij Silc, Theo Ungerer, Borut Robic: "A survey of new research directions in
microprocessors", Microprocessors and Microsystems, 24(4):175-190, 2000.
Theo Ungerer, Borut Robic, Jurij Silc: “Multithreaded processors", The
Computer Journal, (to appear), 2002.
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Book
overview
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Supplementary literature
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J. L. Hennessy, D. A. Patterson: Computer Architecture: A Quantitative
Approach (Morgan Kaufmann Publishers, 2nd Edition, 1996)
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B. Shriver, B. Smith: The Anatomy of a High-Performance Microprocessor - A
Systems Perspective (IEEE Computer Society Press, 1998)
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M. Flynn: Computer Architecture, Pipelined and Parallel Processor Design
(Jones and Bartlett Publishers, Sudbury, MA, 1995)
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