DAQ 1000
Tonko Ljubicic,
Mike LeVine,
Bob Scheetz,
John Hammond,
Danny Padrazo,
Fred Bieser,
Jeff Landgraf
Current TPC Electronics Basics
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5184 FEEs – Front End Electronics
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144 RDOs – Readout Boards
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Located on TPC, multiplexes 36 FEE’s to a single fiber.
144 Receiver Boards
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Analog shaping, tail suppression, ADC. No event buffering.
Located in VME crates in the DAQ room.
Pedestal subtraction, zero suppression, gain corrections, T0 corrections, 2-d
cluster finding.
Sector Brokers / Event Builders / RCF network
Full 10 bit, 512 time-bin, 134000 channel data is transferred to the receiver
boards for every event.
 100 Hz maximum rate
10ms dead time for each event (1% dead / hz taken)
Summary
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DAQ 1000 is a project to replace the TPC
FEE’s, RDO’s, and DAQ with a system capable
of 1000hz (Au-Au, central)
Based on ALICE’s Altro/Pasa chips, as well as
their DDL links.
ALTRO / PASA Chip Order
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After long delays the chip purchase contract is in
place.
Expect delivery by beginning of February 2007.
We have 120 Altro/Pasa pairs at BNL as an
advance from the big order. 72 are required to
outfit the entire 36 FEEs needed for a single
RDO.
FEE
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ALTRO/PASA pairs perform pulse shaping, ADC,
zero suppression, pedestal subtraction, gain corrections,
and tail subtraction on the FEE, before transferring
data to DAQ.
 Huge data rate increase even though link speed is
comparable
Multi-Event Buffering on ALTRO
 Zero dead time as long as throughput remains less than
max rate.
This allows us to increase the min-bias rate modestly
(x 2-5) while rare triggers sample full luminosity.
FEE Prototypes
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Total of 4 prototype versions so far.
Noise problems in the first prototype fixed.
Currently preparing to fabricate 50 production boards for use in
the 2007 run.
4 FEE’s installed in TPC during 2005
• Pedestal / Laser / Real Data
Hits
• Demonstrated that we understand
the operating modes of the ALTRO
chip
• Pedestal subtraction
• Exponential Tail Subtraction
RDO
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First prototype was a daughter card to be used with a
Microtronics FPGA development board.
Second prototype now fabricated: full sized for insertion in TPC
Non-TPC upgrades
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A PCI network card to receive the standard STAR
GLINK fiber protocol is being developed.
The card makes use of the fact that the commercial
DDL interconnect we are using incorporates the fiber
interface in a separate daughter card, so only the
daughter card needs to be adapted.
The card makes it possible move existing detectors
from custom VME boards to cheap/fast PC’s.
BTOW, ETOW, BSMD, ESMD, SSD, TOF are good
candidates.
Other hardware
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RDO power supplies
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Current supplies are +/- 8V
RDO needs only 5V
It would be possible to reduce the heat load by replacing the
power supplies for a cost of $70k.
Configuration / Slow controls
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DDL link is bi-directional, so configuration of FEE’s/RDO’s
is performed through DAQ interface.
Slow controls will still operate power supply switches.
Event Building
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Plan to move to Gb ethernet network rather than
myrinet.
PC’s rather than VME custom receiver boards for lower
cost / higher reliability / better performance / easier
repair.
One sector per PC is the likely scenario (6 PCI cards).
Push architecture which will have some repercussions
on data format. (I will provide readers which should
make this transparent to the offline code)
Schedule
2007 Run –
1 RDO with full complement of 36 FEE’s installed by late November 2006
with existing manpower.
2007 shutdown through end of 2008 Run –
Exact schedule depends on 2007 run experience.
2 EEs, 4 techs
PCB fab, assembly, inspection, 1st level testing, and final testing and
acceptance for 5000+ boards.
2008 Shutdown –
2 EEs, 4 techs
Removal of existing TPC electronics, installation of new FEEs, RDOs,
cabling, & modifications of power supplies
2009 Run –
First full physics run with DAQ1000
Differences From Existing
Electronics
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Digital tail suppression  we control parameters
More simplistic zero suppression algorithm (Altro hit is adc>th
for n time-bins, STAR ASIC has 2 sets of threshold/duration
pairs)
Out of hit data available (even if negative values after pedestal
subtraction)
More complicated options for pedestal subtraction
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Moving average out-of-event baseline correction.
Moving average in-event pedestal correction
Digitization on Altro is constant into a circular buffer, so can
potentially read out data previous to the gated grid opening &/or
without the gated grid opening. (however still need a trigger)
Summary
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DAQ 1000 on schedule for full roll out in 2009
1 full RDO planned for 2007