Considerations when migrating from Samsung to Cypress QDRII/DDRII SRAMs
When migrating from Samsung to Cypress QDRII/DDRII SRAMs, customers need to be aware of
the following difference.
Fig:1 –Samsung QDRII/DDRII Power up sequence
Power up Sequence – with DOFF# always tied High
1. Apply Vdd before Vddq or at the same time as Vddq.
2. Apply Vddq before Vref or at the same time as Vref
3. Wait for the input clock K/K# to stabilizes
4. Stop the K/K# clock(mean K/K# keep static) more than 30ns
5. Open the K/K# clock
6. Wait an additional 1024 cycles before starting memory operations
Fig:2 –Cypress QDRII/DDRII SRAM Power up sequence
Power Up Sequence
1. Apply power and drive DOFF either HIGH or LOW (All other inputs can be
HIGH or LOW).
2. Apply VDD before VDDQ.
3. Apply VDDQ before VREF or at the same time as VREF.
4. Drive DOFF HIGH.
5. Provide stable DOFF (HIGH), power and clock (K, K) for 20us to lock the PLL
Considerations:
The power up sequence shown in Fig1 (with stopping the K/K#) is specific to Samsung
part.
Samsung has modified the original power up sequence diagram in the datasheet to
include the feature of automatically resetting the DLL when the clocks are stopped for
30ns.
This is not a QDR consortium approved method for resetting the memory device.
Samsung is no longer part of QDR consortium. Cypress and Renesas are still in QDR
consortium and both have same power up sequence.So we recommend using the
Cypress power up sequence.
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