Keysight Technologies Implementing Cover

Keysight Technologies
Implementing Cover-Extend Test on
Keysight x1149 Boundary Scan Analyzer
Application Note
Introduction
Cover-Extend Technology (CET) is one of the limited test access solutions Keysight Technologies
provides. It is a hybrid technology between VTEP and boundary scan. Unlike the VTEP technology
which relies on a nailed resource to provide the stimulus that VTEP test needs, the stimulus for CET
test comes from a Boundary Scan IC. This IC must be compliant with the IEEE1149 standard and can
be controlled with only four pins (TMS, TCK, TDI and TDO). This greatly reduces the need for physical
test access.
Figure 1. Cover-Extend Technology on x1149
Cover-Extend Technology works on both connectors and non-boundary scan ICs. The CET module is
connected to the x1149 controller CET port through a HDMI cable, and VTEP sensors are connected
to the VTEP amplifier board and then wired to one of the 64 ports on the MUX card in the CET
module.
This application note discusses the process of CET test generation on x1149 and some suggestions on
fixturing in order to successfully implement CET. The sample board used in this application note is a
smart phone mother board. The CET readings are taken from a camera connector on the board.
03 | Keysight | Implementing Cover-Extend Test on Keysight x1149 Boundary Scan Analyzer - Application Note
Test Generation
1. Identify CET testable devices
Before generating a CET test for a device, we must ensure the device can be
tested by CET. For a device to be tested by CET, its signal pins must be connected
to boundary scan device pins and those boundary scan device pins must have
output or bi-directional boundary scan cells attached. This information can be
found in the BSDL file of the boundary scan device.
2. Define the devices to be tested by CET
In the device list, check the box in the Cover-Extend column for all the devices to
be tested by CET.
Figure 2. CET test options in the Connector List
3. Go through the test generation step and make sure the CET tests are generated
successfully for all the devices. Tests can be found in the test list.
Figure 3. CET tests in the Test List
4. Run Auto-debug on CET tests
After debugging the interconnect test of the boundary scan device and checking
that all the nodes connected to the CET devices are passing the interconnect test,
the user can proceed to debug the CET tests. CET test can use the same TAP
setting as the interconnect test. Open the test in the test editor, and then click the
Run Auto-Debug button.
Figure 4. the “Run Auto-Debug” button in the CET test editor
04 | Keysight | Implementing Cover-Extend Test on Keysight x1149 Boundary Scan Analyzer - Application Note
Check the Auto-Debug results in the Pin List:
Figure 5. Auto-debug results in the Pin List
The user can set the CET auto-debug settings in Tools -> Settings -> Cover Extend
Parameters:
Figure 6. CET auto-debug settings
05 | Keysight | Implementing Cover-Extend Test on Keysight x1149 Boundary Scan Analyzer - Application Note
Test Generation
Fixturing Tips for CET Test:
The auto-debug results as well as the stability of the CET tests vary to some extent,
depending on the fixture setup.
1. Grounding
Connect the board ground to the Mux card ground of the CET module instead of
the extrusive pin on the adaptor card of the CET module. The J2 or J3 connector
on the Mux card is where the twisted pair wires from the amplifier board are connected. They have 32 ground pins each. The board ground can be connected to
any of the ground pins on J2 or J3. The extrusive pin on the adaptor is highlighted
in the red circle in the picture below.
Figure 7. Extrusive pin on the adaptor card
06 | Keysight | Implementing Cover-Extend Test on Keysight x1149 Boundary Scan Analyzer - Application Note
Below is a comparison of auto-debug results between the two methods of
connection. Better test stability is achievable when the DUT ground is connected
to the Mux Card ground.
Figure 8a. Auto-debug results with DUT ground connecting to the adaptor card extrusive pin
Figure 8b. Auto-debug results with DUT ground connecting to Mux card ground
As can be seen from the two tables, by connecting the DUT ground to the Mux
card ground, CPK values are increased; while Standard Deviation and Mean of No
Signal values are reduced.
07 | Keysight | Implementing Cover-Extend Test on Keysight x1149 Boundary Scan Analyzer - Application Note
2. Sensor Plate
For small devices, try to use a sensor plate without a ground via, since the area of
the ground via could occupy a big portion of the whole sensor plate, making it difficult to use with small devices, and pins under the ground via will also be affected
in such cases. Below are examples of sensor plate with and without ground via:
Signal via
Ground via
Figure 9. Sensor plates with big grounding vias (left) and without big grounding vias (right)
08 | Keysight | Implementing Cover-Extend Test on Keysight x1149 Boundary Scan Analyzer - Application Note
The following is a comparison of auto-debug results between the two types of
sensor plates:
Figure 10a. Auto-debug results with sensor plate with big ground via
Figure 10b. Auto-debug results with sensor plate without big ground via
Note that CPK values for pin 18, 20, 22, 24 are increased.
09 | Keysight | Implementing Cover-Extend Test on Keysight x1149 Boundary Scan Analyzer - Application Note
3. Shielding
Ambient noise is an important factor to consider too, it can be coupled in from
the wire and probe between the amplifier board and the sensor plate. Adding a
grounded metal shielding cover around the board under test helps reduce the
ambient noise and improves both the auto-debug result and the stability.
Since the noise is coupled in mainly from the wire and probe between the amplifier
board and the sensor plate, another way of shielding is to cover the wire and probe
only.
Figure 11. Fixture with aluminum shield. The fixture can be designed with the shielding considered upfront.
Since the noise is coupled in mainly from the wire and probe between the amplifier
board and the sensor plate, another way of shielding is to cover the wire and probe
only.
10 | Keysight | Implementing Cover-Extend Test on Keysight x1149 Boundary Scan Analyzer - Application Note
Figure 12. It is recommended that both the wire and probe (see parts circled above in red) are shielded during
test implementation.
11 | Keysight | Implementing Cover-Extend Test on Keysight x1149 Boundary Scan Analyzer - Application Note
The following is a comparison of auto-debug results without and with shielding
cover.
Figure 13a. Auto-debug results without shielding cover
Figure 13b. Auto-debug results with shielding cover
Note that the CPK values are increased; Standard Deviation and Mean of No
Signal are reduced, improvement is similar with covering the wire and probe only.
In summary, apart from understanding the CET test generation process, a good
fixturing design is important for successful CET implementation, proving users
with very good coverage on devices such as small connectors.
12 | Keysight | Implementing Cover-Extend Test on Keysight x1149 Boundary Scan Analyzer - Application Note
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© Keysight Technologies, 2015
Published in USA, May 26, 2015
5992-0754EN
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