Virtual Memory
User memory model so far:

Separate Instruction and Data memory
In reality they share the same memory space
0x00000000
…
…
User space
Instruction memory
Data memory
0x7fffffff
MicroComuter Engineering VirtualMemory slide 1
Virtual to Physical Address Mapping
0x00000000
…
User space
Instruction
and Data
2 GB
Virtual
address
Physical
address
Physical
memory
0x7fffffff
Virtual memory 2 GB, HUGE amount
Physical memory only 16 MB
MicroComuter Engineering VirtualMemory slide 2
Address Mapping
CP0
MIPS PIPELINE
32
Instr
Data
32
Physical
memory
16 Mb
Arbiter
32-bit Virtual Address
24-bit
Physical Address
MicroComuter Engineering VirtualMemory slide 3
Virtual Address
User 1
2 GB
Virtual Address 32-bit
31
10 9
0
Page 0
Page 1
Selects Page # x
….
Offset within
page #x
Page x
1024 Bytes
Page x
Page n
22
2
10
Pages
2
Addresses
MicroComuter Engineering VirtualMemory slide 4
Virtual Memory
Virtual Address
Primary Memory
2 GB
Physical
memory
16 MB
Page x
Page 0
Page 1
….
Page 1
Page x
Secondary Storage
Hard Disk 2 GB
Page n
Page 0
Not Allocated Yet
MicroComuter Engineering VirtualMemory slide 5
Memory Resident Pages
Only very few pages are RESIDENT in physical
31
Virtual 32-bit Address
10 9
Selects Page # x
0
Offset
Address Translation
of page #x
23
10 9
0
Physical 24-bit Address
MicroComuter Engineering VirtualMemory slide 6
Page Fault
What about a NON RESIDENT page?


We know the Virtual Address, but:
No Physical Address, since the page is on Hard Disk
(SWAPPED)
What about a not allocated page


We know the Virtual Address, but:
We try to access a Virtual Address that we have not
(yet) access to, that is an ERROR
In both cases we get a PAGE FAULT
MicroComuter Engineering VirtualMemory slide 7
Page Table
Virtual Address Page
2 GB
Resident
Physical Memory
Page x
Page x
Y
Physical Addr [23:10]
….
Hard Disk
Page y
N
Place on Hard Disk
Page y
For Non Resident Pages we get a PAGE FAULT
MicroComuter Engineering VirtualMemory slide 8
Swapping
Virtual Address
Resident
2 Gb
Physical Memory
….
Page y
Secondary Storage
Page y
Y
Physical Addr [23:10]
Place on Hard Disk
Page y
The OS copies Page y to physical memory
and restarts the failing user instruction
MicroComuter Engineering VirtualMemory slide 9
Page Fault and the OS
A Page Fault is handled by the Kernel (OS)

1) If physical memory not full
– Copy the page from hard disk to a empty page X in physical memory
– Update the Page Table, Resident = YES, Physical Addr [23:10]=X
– Restart the failing instruction in the user program

2) If physical memory full
– Choose one page X from physical memory, store it on hard disk at
XX
– Update the Page Table (X), Resident = NO, place on HD = XX
– Proceed with 1)
What if page X is unchanged (only read operations), skip
storing to hard disk, just set Resident = NO
MicroComuter Engineering VirtualMemory slide 10
Multiple User Processes
Virtual memory n * 2 Gb
0x00000000
…
0x7fffffff
User 1
Virtual
address
Physical
address
16 Mbyte
Page
Table
1
User n
0x00000000
…
0x7fffffff
User 2
Page
Table
2
HD address
….
0x00000000
…
0x7fffffff
User n
User 1
Page
Table
n
User n
User 1
User 2
User 1
User 2
MicroComuter Engineering VirtualMemory slide 11
Where do we store the Page Tables?
We store the Page Tables in Kernel
memory

16 Mbyte
User Memory
Protected from User access!
Dirty
22
2 entries
huge array!
Store only
allocated pages
Resident
D
R
Physical Addr [23:10]
Place on Hard Disk
Kernel Memory
Page
Table
Page
1Page
Table
2
Table
n
MicroComuter Engineering VirtualMemory slide 12
Address Mapping
CP0
User Memory
MIPS PIPELINE
32
Instr
Data
32-bit Virtual Address
32
24-bit
Physical Address
User process 2 running
Kernel Memory
Here we need
page table 2 for
address mapping
Page
Table
Page
1Page
Table
2
Table
n
MicroComuter Engineering VirtualMemory slide 13
Translation Lookaside Buffer (TLB)
CP0
MIPS PIPELINE
32
On TLB hit, the 32-bit virtual address
is translated into a
24-bit physical address by hardware
32
User Memory
We never call the Kernel!
D
R
Physical Addr [23:10]
24
Virtual Address
Kernel Memory
Page
Table
Page
1Page
Table
2
Table
n
MicroComuter Engineering VirtualMemory slide 14
Memory Hierarchy
Hardware is FAST but EXPENSIVE
14
No need to use more than 2 entries
STILL TO BIG! Make is smaller.
Valid bit
14
16 Mb = 2 pages
User Memory
Select a subset of the Page Table and
store it in the TLB
V 22-bit Page # D
Physical Addr [23:10]
24
Kernel Memory
Page Table 2
MicroComuter Engineering VirtualMemory slide 15
Address Translation

A TLB hit, we get a physical address
– The Page # found in TLB and Valid entry (V-bit)
– If a Write operation, set Dirty (D-bit)

A TLB miss, causes a TLB miss exception
– If Page NOT Resident in Physical memory,
 Page Fault and the OS slide
 if page X is swapped to hard disk and X in TLB, clear
V bit
– If Page Resident in Physical memory
 Find a free TLB entry and update it
 1) 22-bit Page #, set V-bit, clear D-bit, 14-bit physical
address
– If TLB full, chose a TLB entry
 if D-bit, update Page Table Dirty bit, proceed with 1)
MicroComuter Engineering VirtualMemory slide 16
TLB control
CP0
MIPS PIPELINE
Data bus
Control Signals
TLB MISS
R/W Page Table
32
Virtual Addr
MicroComuter Engineering VirtualMemory slide 17