Interconnect Complexity-Aware FPGA
Placement Using Rent’s Rule
G. Parthasarathy
Malgorzata Marek-Sadowska
Arindam Mukherjee
Amit Singh
University of California, Santa Barbara
Outline
Motivation
Rent’s Parameter
Analysis
New Placement Algorithm
Results
Conclusions
Future Work
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Motivation
80-90% of die area = interconnects

increased programmability
routing resource utilization (RRU) is low

100% logic utilization
unused LUTs -> better RRU
maybe at the cost of increased area?

Maybe not!
interconnect complexity guided placement - Rent’s
parameter
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Rent’s Parameter
 Common measure for Interconnect Complexity
Nio = K NgP
Nio – Number of IO pins/terminals external to the logic partition
K - Average number of interconnections per LUT
Ng – Number of LUTs in a logic partition
p – Rent’s parameter after E.F.Rent
E.F.Rent,1960
Landman, Russo, 1971
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Local Rent’s parameter Pld
 Complexity Varies across design.
 Solution – Use local interconnect complexity measure
based in interconnect length distributions. (Van Marck et
al.,95)
 Reduces to Landman’s Rent’s exponent for uniform
design at the top level
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Rent’s Parameter
Van Marck, Stroobandt, Campenhout, 1995

p : D(log Ni) / D(log Li)
p – Rent’s parameter
Li - length of a net
Ni - number of nets of length Li
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Analysis
 Consists of LUTs, connection boxes and switch-boxes
 Regular 2-D mesh array of unit tiles
FPGA Architecture
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FPGA Fabric Min-Size-Up
 Definitions

Pa – Rent’s parameter for Architecture

Pd – Rent’s parameter for Design
 Case 1: Pd <= Pa

Design routable. Try to get best placement.
 Case 2: Pd > Pa

Design Un-routable. Need more resources.

Solution – Increase FPGA fabric size by scaling factor C
Nio = K N
C =N
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Pd
g
= K(C.N g )
Pa
Pd - Pa
Pd
g
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New Placement Algorithm
 Simulated Annealing - VPR
scale-up fabric by C
modify VPR’s existing Cost Function
| pld - pla | used as scaling factor for bounding-box
based cost function
uniform distribution of interconnect complexity
(1+
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pld - pla
n
Bounding_b ox_length( Bi)
) 
net i =1 Track Crossing Function q(i)
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Place-and-Route CAD Flow
 Generate
pld > plaBenchmarks
?
no
 Known Pd
yes Distribution
 Uniform
scale-up
Map to fabric
Net-list
by C
Place-and-route

VPR

MVPR
use MVPR
Compare
placed and routed design
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Results - Benchmarks
gnl generated ckts
p1d = p2d = p3d
= p4d = p5d = p6d p5
d
p1
d
p6d
p4 d
p2d
p3d
random ckts - ISCAS benchmarks
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Results
Rent’s Parameter for Architecture1
Segmentation = 1, channel width = 7, Pa = 0.62
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Rent’s parameter for Architecture2
 Segmentation = 2, channel width = 7, Pa = 0.64
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Routing Utilization for seg = 1
# Wire Segments Used
Routing Utilizatio n =
# Wire Segment Available
 MVPR produces better
routing utilization:

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15-25% better
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Routing Utilization for seg = 1:2
# Wire Segments Used
Routing Utilizatio n =
# Wire Segment Available
 MVPR produces better
routing utilization:

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10-15% better
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Routing Utilization for seg = 2
# Wire Segments Used
Routing Utilizatio n =
# Wire Segment Available
 MVPR produces only
minimally better routing
utilization:

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1-5% better
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Routing Overhead Results (MVPR vs VPR) seg = 1
Total Routing Area
 results follow trend for changes in architecture
1.20E+08
MVPR
VPR
Routing area in transistor eqvts
1.00E+08
8.00E+07
6.00E+07
4.00E+07
2.00E+07
0.00E+00
0
0.1
0.2
0.3
0.4
0.5
0.6
0.7
0.8
0.9
1
Rent's parameter P_d
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CLB Area Utilization (MVPR v/s VPR) seg = 1
 logic area utilization falls with increasing Pd
 results follow trend for changes in architecture
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MVPR over VPR for gnl generated ckts
25% higher RRU
10-15% lower Area
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MVPR over VPR for ISCAS ckts
same track utilization
5% lower average wire length
2-5% higher RRU
10-15% higher Area
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Conclusions
Pluses

New Cost Function

Minimum size fabric derived for Pd > Pa

Min-Area <-> Max-RRU
Minuses

Errors in the estimation of Pd and Pa


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second-order effects
Non-uniform interconnect complexities
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Future Work
Modifying MVPR

non-uniform interconnect complexity
timing/power-dissipation and complexity-aware
FPGA placement
correlating track segmentation with accurate
estimation of Rent’s parameter
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