Chapter 4
Computer Design
Basics
Chapter Overview


Part 1 – Datapaths
 Introduction
 Datapath Example
 Arithmetic Logic Unit (ALU)
 Shifter
 Datapath Representation
 Control Word
Part 2 – A Simple Computer
 Instruction Set Architecture (ISA)
 Single-Cycle Hardwired Control




Instruction Decoder
Sample Instructions
Single Cycle Computer Issues
Multiple Cycle Hardwired Control

Sequential Control Design
Digital 2 will focus on Part 1
Part 2 will be covered in
Computer Architecture &
Microprocessor. however
prior reading is encourage.
Part 1 : Datapath

Computer Specification

Instruction Set Architecture (ISA)



The specification of a computer's appearance to a
programmer at its lowest level.
It describe all the available instruction set in the computer,
where it is kept (address) and how to use it (read).
Computer Architecture

A high-level description of the hardware implementing the
computer derived from the ISA
Part 1 : Datapath
The architecture usually includes additional
specifications such as speed, cost, and reliability.
Simple computer architecture comprise of:





Datapath for performing operations
Control unit for controlling datapath operations
A datapath is specified by:
a. A set of registers
b. The microoperations performed on the data stored in the
registers
c. A control interface
Datapaths :
Guiding principles for basic datapaths (Typical):

The set of registers
 Collection of individual registers
 A set of registers with common access resources called a register
file
 A combination (individual & set of reg.) of the above

Microoperation implementation
 One or more shared resources for implementing microoperations
 Buses - shared transfer paths
 Arithmetic-Logic Unit (ALU) - shared resource for implementing
arithmetic and logic microoperations
 Shifter - shared resource for implementing shift microoperations
Datapath
 The

combination of:
A set of registers with a shared ALU, and
interconnecting paths.
Block Diagram of a
Generic Datapath
• Four parallel-load registers
• Two mux-based register
selectors
• Register destination decoder
• Mux B for external constant
input
• Buses A and B with external
address and data outputs
• ALU and Shifter with Mux F
for output select (Function
Unit)
• Mux D for external data input
• Logic for generating status
bits V, C, N, Z
Block Diagram of a
Generic Datapath
Example:
R1  R2 + R3
A Select
Place contents of R2
into Bus A
10
B Select
Place contents of R3
into the input of MUX
B
11
MB Select
Place the 0 input of
MUX B into Bus B
0
G Select
Provide the arithmetic
operation A + B
????
(4bits)
MF Select
Place the ALU o/p on
MUX F o/p
0
MD Select
Place the MUX F o/p
onto Bus D
0
Destination
Select
To select R1 as the
destination of the data
on Bus D
01
Load
enable
To enable a register
R1 =
HIGH
Note : G Select must refer to Function Table of
Arithmetic Circuit (refer next 3 slides)
The Arithmetic/ Logic Unit
(ALU)
Arithmetic Logic Unit (ALU)

1
2
3
ALU Comprise of:



An arithmetic
circuit (add,
subtract)
A logic circuit
(bitwise operation)
A selector to pick
between the two
circuits
Arithmetic Logic Unit (ALU)

1
ALU Comprise
of:

An arithmetic
circuit


An n-bit
parallel adder
A block of
input logic with
2 selectors S1
and S0
* Mode Select (S2) distinguishes
between arithmetic and logic
operations which actually
construct item
3
G Select
(4-bits)
ALU

Is a combinational circuit that performs a set
of basic microoperations on:



Arithmetic, and
Logic
Has a number of selection lines used to
determine the operations to be performed
e.g.
 n selection lines can specify up to 2n types of
operations.
An n-bit ALU



n data inputs of A are
combined with n data
inputs of B, to generate
the result of an operation
at the G outputs.
S2=0  Arithmetic
operations (8). Which one
– is specified by S1, So
and Cin.
S2=1  Logic operations
(4). Which one – specified
by So and Cin.
Question
1.
What are the 8 arithmetic operations?
2.
What are the 4 logic operations?
How to design the ALU?
1.
Design the arithmetic section
2.
Design the logic section
3.
Combine both sections
To be designed…
One Stage of ALU
S2 = 0 for Arithmetic
S2 = 1 for Logic
Arithmetic Circuit Design
Given …
Arithmetic Circuit Design
1
Analyse the Circuit:
Note : X = A
Use
G = A + Y + Cin
For S1 and S0 = 00, then
G=A+0+0
G=A
Eg. We can verify for n = 4 bit:
A = 1010
B = 0101
Building the B input Logic
Input = S1, S0 and B
Output = Y
• Obtain the K-Map
• Get the Boolean Expression
Y = BS0 + BS1
Building the B input Logic
Y = BS0 + BS1
Y
Example
of a 4-bit
Arithmetic
Circuit
Any other alternative?
Use Multiplexer
0
B
B
1
Building the Logic Circuit


2
The Logic Circuit performs bitwise operation
Commonly : AND, OR, XOR and NOT
Note : if 4 bit is wanted, then
we have to arrange it in array
One Stage of Logic Circuit
Building the Selector for choosing
Arithmetic or Logic Unit 3
S2 = 0 for Arithmetic
S2 = 1 for Logic
One Stage of ALU
Refer also Fig. 10.2
Exercise
Draw the complete diagram of the ALU,
which consists of:




The Arithmetic Circuit
The Logic Circuit
The Selector circuit
For:
1.
A bit-slice (one stage) circuit
2.
A 4-bits circuit
Example:
R1  R2 + R3
G Select
Provide the arithmetic
operation A + B
????
(4bits)
Therefore;
S2 = 0 for Arithmetic operation
S1 = 0
S0 = 1
Cin = 0
G Select
Answer : 0010
(4-bits)
LSB
MSB
The Shifter
 The Shifter Shifts the value on
Bus B, placing the result on an
input of MUX F
 The Shifter can:
o Shift Right
o Shift Left
 It is obvious that the shifter would
be a bidirectional shift register
with parallel load
4 Bit Basic Shifter
S
Operation
00
Parallel Load B (B to be passed
thru the shifter unchanged)
01
Shift Right
10
Shift Left
Barrel Shifter



Sometimes the data need to be shifted ore
rotated more than one bit position or in a
single clock cycle
A Barrel Shifter can perform this by using
MUX
2n input requires 2n MUX
4-Bit Barrel Shifter
• A rotate is a shift in which the bits shifted out are inserted into the positions vacated
• The circuit rotates its contents left from 0 to 3 positions depending on Selector S.
Note that a left rotation
by three (3) position the
same as a right rotation
by one position in this 4
bit barrel shifter
Datapath Representation
Register File
Simplified
Block
Diagram
Function Unit
Datapath Representation


Notice that the
G, H and MF
Select are
combined as
FS
Boolean
Equations:



MF = F3.F2
Gi = Fi
Hi = Fi
Control Word




The datapath has many control inputs
The signals driving these inputs can be defined and
organized into a control word
To execute a microinstruction, we apply control word
values for a clock cycle. For most microoperations,
the positive edge of the clock cycle is needed to
perform the register load
The datapath control word format and the field
definitions are shown on the next slide
The Control Word Fields
Control Word
Total : 16-bit
(3-bit) (3-bit) (3-bit)
(4-bit)
(1-bit)
Fields :








DA – D Address
AA – A Address
BA – B Address
MB –Mux B
FS – Function Select
MD –Mux D
RW – Register Write
The connections to datapath are shown in the next slide
Control Word Encoding
Example 1
Given the 16-bit Control Word as
Field
: DA AA BA MB
Binary
: 001 010 011 0
Symbolic : R1 R2 R3 Reg
Answer :
0010100110010101
FS
MD
RW
0101
0
1
F=A+B+1 Function Write
R1  R2 + R3 + 1
Refer to Control
Word Encoding
Table
Example 2
Given the 16-bit Control Word as
Field
: DA AA BA MB
Binary
: 100 010 110 0
Symbolic : R4 R2 R6 Reg
Answer :
1000101100111001
FS
1110
F=sl B
R4  sl R6
MD
RW
0
1
Function Write
Refer to Control
Word Encoding
Table
Example 3
Given the 16-bit Control Word as
Field
: DA AA BA MB
Binary
: 010 000 011 0
Symbolic : R2 R0 R3 Reg
Answer :
0100000110011000
FS
0110
F = A-1
MD
RW
0
0
Data_In No_Write
Data Out  R3
Refer to Control
Word Encoding
Table
Address B is selected because MB = 0
(Refer to block Diagram on Slide 7)
Example 4
Given the 16-bit Control Word as
Field
: R4
DA R0
AA R3
BA Reg
MB
Binary
: 100 000 011 0
Symbolic :
Answer : R4
1000000110011011
FFS= A-1
0110
 Data In
Data_In
Write
MD
RW
1
1
Refer to Control
Word Encoding
Table
Address D is selected because MD = 1
(Refer to block Diagram on Slide 7)
Example 5
Given the 16-bit Control Word as
Field
: DA AA BA MB
Binary
: 101 000 011 0
Symbolic : R5 R0 R3 Reg
Answer :
1010000110001001
FS
0010
F = A+B
R5  R0 + R3
MD
RW
0
1
Function Write
Refer to Control
Word Encoding
Table
Example 5 continue……
Given the 16-bit Control Word as
Answer :
1010000110001001
R5  R0 + R3
Assume : Registers are 8-bit and the value given are in hex, Find:
1. The new value of register content if R0 = 5 and R3 = 3
2. The new value of register content if R0 = 7 and R3 = 1C
Answers in 8-bit binary.
1.
0000 0101
+ 0000 0011
0000 1000
2.
0000 0111
+ 0001 1100
0010 0011
Other Examples of Control Word
Assignment Folder Questions
Chapter 10

3, 4, 5, 6, 7
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