Three Stage Switching Example

Switching
Fourth Meeting
Switching Modes

Circuit Switching



Continuous link
Exclusive
Packet Switching



No continuous link
Data is divided into
packets
Not exclusive
Circuit Switching`
Packet Switching`
Incurred Delay

Circuit-switched


fixed delay of transferring
data
Packet-switched


Queuing delays
Variable transmission
delay because of the
capacity of the link.
Hi Mom
Multiplexing


It improve the efficient use of the transmission capacity of physical
media
Two types of multiplexing



Deterministic
Statistical
Deterministic Multiplexing

transmission medium is divided between a fixed number of
communication channels
Statistical Multiplexing


The multiplexer and demultiplexer do not perform any switching
The multiplexer stores the incoming packets in a buffer. Why?






Data rates of the input channel and the multiplexed channel are different; and
Packets may arrive simultaneously on several input channels.
In the multiplexer, the packets are stored with a header with input channel
number.
In the demultiplexer, the packets are retrieved in reverse order
The packet header identify the output channel.
Buffers are required for each output channel

The demultiplexer, over a short period of time, receive packets at a faster data rate
than it can transmit.
Switching Structures

Cross-points



It connect input lines to output
lines with a dedicated crosspoint
It is non-blocking
Switching Arrays

single-stage switch
connects one input line
to an output line using a
single cross-point
Switching Structures:3-Stage-Switching

Three stage-switching

Blocking occurs
N inputs = m groups * n inputs

N outputs = m groups * n outputs


The first stage


m array switches.
Each array switches



The second stage


k array switches
Each array switch



n input lines
k output lines
m input lines
m output lines
The third stage


m array switches.
Each array switches


k input lines
n output lines
How Many Cross Points

The total number of cross-points =




First stage






Total = k × m × m
Since m = N/n, Then
Total = k × (N/n)2.
Third stage (same as first stage)


Total = n × k × m
Since N = n × m, then
Total = N × k
Second stage


number of cross-points in the first
stage plus
number in the second stage plus
number in the third.
Total = N × k
All three stages

2
N
N
Total  ( N  k )  (k    )  ( N  k )  2 Nk  k  
n
n
.
2
Three Stage Switching Example


6 input lines that is blocking.
four first-stage arrays


Each array hasfour input
lines


n=4
Five second-stage arrays


m=4
k=5
16 × 16 three-stage
configuration has

2
 16 
(2  16  5)  (5    )  160  (5  16)  240
4
Digital Space Switching

Two types



Digital space switching
and
Digital time switching.
Digital space switching


The first automatic
telephone exchanges
Paths were set up using
electromagnetic devices
Space Switch Carries A Time Division Multiplexed (TDM)
Space Switch Multiplexer
Space Switch Multiplexer
Example
Frame
Multiplex X
Control
0
50
51
52
60
61
62
70
71
72
Input 0
Selects 0 = 0
Selects 1 = 0
Input 1
Input 2
Time Slot 0 0
Output
0 0
Multiplex Y
0 1 Selects
Example
Frame
Multiplex X
Control
0
50
51
60
61
62
70
71
72
Input 0
Input 1
Input 2
Time Slot 1 1
Output
0 1
Multiplex Y
0 1 Selects
Example
Frame
Multiplex X
Control
0
70
50
51
60
61
71
72
Input 0
Input 1
Input 2
Time Slot 2 3
Output
1 1
Multiplex Y
0 1 Selects
Example
Frame
Multiplex X
Control
0
70
50
51
60
61
71
72
Input 0
Input 1
Input 2
Time Slot 3 2
Output
1 0
Multiplex Y
0 1 Selects
Time Switching
Time Switching Implementation

Use two memory devices

Speech store

All incoming data octets
are stored in their
sequence of arrival,





Octet 0 → location 0
Octet 1 → location 1
:
Cyclic counter
Connection store,


Contains the destination
outgoing lines
Has a cyclic counter
Example
Input
Time Slot
Output
Time Slot
0
3
1
2
2
1
3
4
0
0
1
2
3
4
0
Counter 1
0
Counter 2
0
Time
3
0
1
2
3
4
Example
Input
Time Slot
Output
Time Slot
0
3
1
2
2
1
3
4
0
1
0
1
2
3
4
1
Counter 1
1
Counter 2
0
1
Time
3
2
0
1
2
3
4
Example
Input
Time Slot
Output
Time Slot
0
3
1
2
2
1
3
4
0
1
2
0
1
2
3
4
2
Counter 1
2
Counter 2
0
1
2
Time
3
2
1
0
1
2
3
4
Example
Input
Time Slot
Output
Time Slot
0
3
1
2
2
1
3
4
4
0
0
2
3
0
1
2
3
4
3
Counter 1
3
Counter 2
0
1
2
3
Time
3
2
1
4
0
1
2
3
4
Example
Input
Time Slot
Output
Time Slot
0
3
1
2
2
1
3
4
4
0
2
3
4
0
1
2
3
4
4
Counter 1
4
Counter 2
0
1
2
3
Time
4
3
2
1
4
0
0
1
2
3
4
Control
Space
Time
Space
Switching
Multiplex
X
Frame
0 1 Selects
50
51
0
Input 0
0
Input 1
1
2 2
3 3
3
Input 2
4 4
2
Time Slot 3
2
4
1
Counter 1
4
0
1 0
4
Counter
Multiplex
Y 2
Multiplex Y
60
61
71
72
1 0
61
60
51
50
Input 2
Time Slot 3 2
Input 1
Input 0
0 1 Selects
Frame
Output
Multiplex X
0
n=3
72
k=1
71
0
1Output
2
3
4
70
Control
70
Packet Switching


In the past, the delay
associated with packet
switching meant that it
was not considered
suitable for real-time
applications such as
voice communication.
Packet-switching
exchanges (PSEs) have
used the concept of
stored program control
(SPC) since the first
generation of exchanges,
in the late 1960s
2nd and 3rd Generation PSE
Cell Switching
Virtual Path
Switch 2
Virtual Path
Switch 1

Cell switching ≈ packet switching


Cell switching ≠ packet switching


Cells have a fixed size
Cell switching ≈ circuit-switching



breaks a data stream into packets
connection-oriented service
virtual circuit created.
Cell switching ≠ circuit-switching


circuit is virtual
No reserving of network resources
Picture source http://www.sce.carleton.ca/netmanage/dcommTutorials/scan06/scan0603.gif