68HC11 Timer
1
68HC11 Timer Subsystem
Several timing functions:



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Basic timing
Real time interrupts
Output compare
Input capture
Computer Operating Properly
Pulse Accumulator
Pulse Width Modulation
Common Features


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Based on a central timer
Overflow Flags
Interrupt Enables
2
Basic Timer
3
Basic Timer– TCNT
$100E/0E
16-bit free running counter (timer)
 Cannot be set or stopped.
Fclk = system clock
Can be prescaled by 1,4,8, or 16
Read only at memory address ($100E/$0E)
 Overflow flag is bit 7 in TFLG2 ($1025/$25)
Can use overflow to extend counter’s range
 Timer Overflow Interrupt Enable
Bit 7 in TMSK ($1024/$24)
4
TCNT - $100E:$100F
Timer Counter Register
CNT14
CNT13
CNT12
CNT11
7
6
5
4
3
2
CNT7
CNT6
CNT5
CNT4
CNT3
CNT2
7
6
5
4
3
2
CNT15
CNT10 CNT9
1
CNT1
1
CNT8
$100E
0
CNT0
$100F
0
Bits
READ ONLY Register
5
Prescaler
Timer Interrupt Mask Register 2: $1024/24 -- TFLG2
TOI
RTH
7
6
PAOVI PAII
5
4
0
0
PR1
PR2
3
2
1
0
Bits
PR1,PR0 = Timer prescale select - Timer Clock = System Clock / Prescale Factor
Pr1
0
0
1
1
Pr0
0
1
0
1
Prescaler
1
2
8
16
Timer count (overflow period)
E/1 (32.77 ms)
E/4 (131.1 ms)
E/8 (262.1 ms)
E/16 (524.3 ms)
6
Timer Overflow Flag
Miscellaneous Timer Interrupt Flag Register 2: $1025 (TFLG2)
TOF
7
RTIF PAOVF PAIF
6
5
4
0
0
3
2
0
1
0
0
Bits
TOF = Timer overflow flag 0 = No overflow
1 = Overflow
TOF is reset to 0 by writing ‘1’ to TOF
7
Timer Overflow Interrupts
Timer Interrupt Mask Register 2: $1024
TOI
RTH
7
6
PAOVI PAII
5
4
(TMSK2)
0
0
PR1
PR2
3
2
1
0
Bits
TOI = Timer overflow interrupt enable
0 = disable interrupt
1 = enable interrupt
8
Basic Timer Example
*************************************************
* Time delay = 1000 X 524.3 ms= 524 s
*************************************************
ORG $0200
SUB
LDX #1000
BSET $24 $03 ; PRESCALE = 524.3 ms
BCLR $24 $80 ; Disable the main timer interrupt
CON
BSET $25 $80 : CLEAR OVERFLOW FLAG START THE TIMER
MON
BRCLR $25 $80 MON ; END OF INTERVAL?
DEX
; NEXT INTERVAL
BNE CON
; END OF COUNT?
RTS
; YES, GO BACK TO MAIN PROGRAM
9
Basic Timer Example
MAX_CNT Calculation
Need to wait 1,000,000 or $F4240 clock
cycles.
Interrupt is generated every 65536 or $10000
clock cycles
Max_CNT = INT(1,000,000 / 65556) = 15.258 ~ 15 = $F

Note: INT($F4240/$10000) = $F
Set MAX_CNT EQU $F
10
Real Time Interrupt
11
Real Time Interrupt
Similar to Timer Overflow Interrupt except
We have:
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
RTI Flag (RTIF) – Bit 6 in TFLG2 ($1025)
RTI Enable (RTII) – Bit 6 in TMSK2 ($1024)
System Clock is first divided by $1000 then
divided again by the prescale bits given by
RTR1 and RTR0 in PACTL ($1026)
12
Real Time Interrupt
Enable
Timer Interrupt Mask Register 2: $1024
TOI
7
RTII PAOVI PAII
6
5
4
(TMSK2)
0
0
PR1
PR2
3
2
1
0
Bits
RTII = Real Time Interrupt Enable
0 = disable interrupt
1 = enable interrupt
13
Real Time Interrupt Flag
Miscellaneous Timer Interrupt Flag Register 2: $1025 (TFLG2)
TOF
7
RTIF PAOVF PAIF
6
5
4
0
0
3
2
0
1
0
0
Bits
RTIF = Real Time Interrupt flag 1 = RTI has occurred
RTIF is reset to 0 by writing ‘1’ to RTIF
14
Real Time Interrupt
Prescale
Port A Control Register: $1026 (PACTL)
DDRA7 PAEN6 PAMOD PEDGE
7
6
5
4
0
3
0
RTR1 RTR0
2
1
0
Bits
RTR1, RTR0= Real Time Interrupt Prescale
RTR1
0
0
1
1
RTR0
0
1
0
1
Nominal RTI rate (2MHz E-Clock)
4.096ms
8.192ms
16.384ms
32.768ms
15
Basic Timer Example
*************************************************
* Time delay = 2000 X 32.77 ms= 65 s
*************************************************
ORG $0200
SUB
LDX #2000
BSET $26 $03 ; PRESCALE = 32.77 ms
BCLR $24 $40; Disable the RTI TIMER interrupt
CON
BSET $25 $40 : CLEAR OVERFLOW FLAG START THE TIMER
MON
BRCLR $25 $40 MON ; END OF INTERVAL?
DEX
; NEXT INTERVAL
BNE CON
; END OF COUNT?
RTS
; YES, GO BACK TO MAIN PROGRAM
16