Porting BORPH to ROACH
Brandon Hamilton
Department of Electrical Engineering
University of Cape Town
Porting
to
Brandon Hamilton
Department of Electrical Engineering
University of Cape Town
Unix Process Model
• Hardware processes
– Executing instance of gateware
– Analogous to familiar Software process
• Active control
• Process management
(fork/exec, process id, signals/interrupts, hierarchy)
• User space (multiuser, application specific, system calls)
– Logical representation
• Abstraction
Hardware/Software Interface
Portability
• Originally implemented on BEE2
– Linux 2.4
– Running on Control FPGA (Embedded Processor)
• Portability
– Separate architecture-dependant code from
generic code
– Latest Linux (2.6) kernel
– CASPER Simulink library
BORPH
BORPH
Hardware Interface
Binary File Handler (BOF)
IOREG (proc filesystem)
Execution Threads
Linux Kernel
Architecture-Dependent Code
Architecture-Dependent kernel code
Architecture-Independent
kernel code
Function pointers
•
•
•
•
•
•
•
•
configure
unconfigure
reserve_hwr
release_hwr
get_buffer
put_buffer
send_buffer
receive_buffer
Architecture-Dependent Code
• configure
– handles the reconfiguration of the hardware
region (FPGA)
– receives the configuration data file extracted from
a BOF file and is responsible for transferring that
to setup the FPGA
• unconfigure
– called when a hardware process is terminated
– responsible for unconfiguring the FPGA
Architecture-Dependent Code
• reserve_hwr
– identify an available hardware region that will
execute the current hardware process
• release_hwr
– called to release a hardware region, making it
available for future use
Architecture-Dependent Code
• get_buffer
– returns a pointer to a buffer that will be used for
data transfer
• put_buffer
– deallocate the data buffer obtained in
get_buffer
• send_buffer
– initiates a transfer of data to the FPGA
• recv_buffer
– initiates a transfer from data to the FPGA
Hardware Processes Execution
Append BOF file to
execution queue
Read header
Binary file handler
Execution thread
(bkexecd)
Reserve available FPGA
reserve_hwr
Create IOREG files
(/proc)
Configure FPGA
configure
Only on BEE2
Send Greet
Architecture-dependent
Hardware Processes Interaction
Read IOREG
Write IOREG
get_buffer
get_buffer
Transfer from FPGA
recv_buffer
Copy from
userspace to buffer
Copy from buffer
to userspace
Transfer to FPGA
send_buffer
put_buffer
put_buffer
BEE2 to ROACH
BEE2
ROACH
BORPH on ROACH
• Only one HWR (FPGA)
– No need for scheduling
• EBC Bus
– Direct memory-mapped communication instead of packet-based
messages
• Dedicated PowerPC EPX440 processor
– No need to configure embedded FPGA processor
(= improved performance)
• No OS support for Hardware Processes
• Simulink toolflow
– Gateware changes
BORPH on ______
• Implement architecture dependant code
– 8 functions
• Design toolflow integration
– mkbof (bitfile + user defined hardware registers)
Thank you
References
•
H. K.-H. So and R. Brodersen, "A Unified Hardware/Software Runtime Environment
for FPGA-Based Reconfigurable Computers using BORPH," ACM Transactions on
Embedded Computing Systems (TECS), Volume 7, Issue 2, Feb, 2008, New York, NY,
USA.
•
H. K.-H. So, "Runtime Filesystem Support for Reconfigurable FPGA Hardware
Processes in BORPH," In Proceedings of the Sixteenth Annual IEEE Symposium on
Field-Programmable Custom Computing Machine, Apr. 2008.