DC Voltage droop gain for a 5-Terminal DC Grid using a
detailed dynamic model
Ali akbar Jamshidifar, University of Aberdeen, AB 24
[email protected], Tel: +44 1224 272 336, Fax: +44 1224 272 497
3UE,
UK,
Dragan Jovcic, University of Aberdeen, Aberdeen, AB 24
[email protected], Tel: +44 1224 272 336, Fax: +44 1224 272 497
3UE,
UK,
Aleisawee Mohamed Alsseid, University of Aberdeen, Aberdeen, AB 24 3UE, UK,
[email protected], Tel: +44 1224 272 336, Fax: +44 1224 272 497
Abstract— Droop gains in DC transmission grids are commonly studied using static indicators like
V-I curves and power sharing calculations. The dynamic studies of VSC HVDC have been
challenging because of numerous control loops and complexities in DC-AC interactions, which is
becoming even more challenging with converter to converter interactions in DC grids. This paper
firstly presents a 126th order multiple-input multiple output (MIMO) small-signal dynamic linearised
model of a 5-terminal DC network which includes all converter dynamics and controls in detail. The
model accuracy is verified against a detailed benchmark model in PSCAD . The model is then
employed to design DC voltage droop control at each of the four terminals considering the dynamics
and transient behavior of the DC network. A root locus study is used to find the optimum values of
the droop gains and the cut off frequency of the DC voltage feedback filters. The PSCAD model is
employed to verify the design results and also to test large disturbances like converter tripping in the
test DC grid. The study highlights the benefits of DC droop control and also points the possible
dynamics instabilities with incorrectly tuned droop parameters.
Keywords— Multiterminal HVDC, Droop control, Eigenvalues, Gain selection, Modeling,
Stability
I. Introduction
High voltage direct current (HVDC) transmission based on Voltage Source Converters
(VSC) has been implemented in many projects since 1996 and it is becoming accepted in
power industry. Although most installations operate as 2-terminal systems, there has been
significant interest for developing multiterminal VSC HVDC (M-VSC) and DC grids.
VSC HVDC has good features like constant DC voltage and ability to connect to weak
AC systems which make it suitable for developing multiterminal systems [1].
Advancing VSC HVDC to DC grids brings advantages in many aspects such as control
flexibility, reliability and economy (utilization of transmission assets) [2-3]. These
systems can be used for urban area cable interconnection and improvement in security
and power quality. A DC grid is also becoming very attractive for interconnecting large
offshore power parks [4, 5]. DC cables are necessary in the offshore environment, and
since there is significant offshore energy potential in North Sea of at least 30GW, a DC
grid is better alternative to numerous, individual, radial HVDC links.
A DC grid is similar to M-VSC HVDC but it would involve meshed DC interconnections
with multiple power flow paths. The DC networks can be radial, meshed or a
combination of both. The terminals would be connected to several points in
synchronized/unsynchronized AC networks.
The stability studies of VSC-HVDC are very important because of fast converter
dynamics [6]. The 2-terminal HVDC control design is based on the assumption of
1
isolated converters (constant DC source) and normally does not consider dynamic
interaction of the remote terminal.
The underlying principles for control and operation of DC grids are developed as an
extension of 2- terminal control [7]. One DC terminal will regulate DC voltage and the
remaining terminals will set the local DC current/power. Additionally the current
controlling terminals should have a droop DC voltage feedback in order to assist in grid
power balancing [8, 9]. However, as it will be shown, the droop feedback significantly
increases dynamic interactions between converters and an isolated control design may not
be appropriate for the dynamics of DC grids. A simplified DC grid-wide dynamic study
is performed in [10], where benefit of droop gains is demonstrated, but the converters are
treated as equivalent controllable DC current injection.
The microgrids represent an all-converter power system which is in some aspects similar
to DC transmission grids. The droop control is essential with microgrids, where it is
utilized to accomplish proper load sharing of each independent distributed generation
systems and is performed using locally measurable feedback signals [11, 12].
In the majority of the above studies the static design approach is used for dc droop gains.
The droop gains typically have magnitude of around 5-20% with appropriate sign to
ensure grid power sharing. The gains are determined using static (steady-state) methods
on V-I or V-P curves. The transient performance and dynamics are confirmed
subsequently, but this is typically done using trial-and-error methods on detailed
simulators.
An integrated DC grid dynamic study offers deep insight into the impact of local droop
gains on the overall DC grid. It is very important that DC grid stability is guaranteed if
any or multiple converters (with droop controls) are lost. Such study requires detailed
analytical model of each terminal including AC grids, phase locked loops (PLLs),
converters, converter controls and DC grid dynamics. This paper firstly presents
principles of detailed analytical modeling of a large DC grid. The model has good
accuracy within frequency range for main HVDC control loop, i.e. below 100Hz and it is
based on physical parameters [11]. The developed model will be used to study system
control under a range of operating conditions in MATLAB. The local DC droop gains
and the associated filters will be selected based on the eigenvalues analysis for the overall
DC grid. A benchmark model in PSCAD /EMTDC detailed model will be used for model
verification and to prove the theoretical eigenvalue analysis.
II. DC Grid Test System
The DC grid test system consists of five converters (VSC1-VSC5), two sending AC
systems, and three equivalent receiving AC systems. The schematic of the DC grid test
system is shown in Fig. 1. Terminals T1 and T5 are connected to the sending AC grids
and the three terminals (T2, T3, and T4) are connected to the receiving AC grids
representing large metropolitan area. Each AC system has its own equivalent impedance
and Short-Circuit-Ratio (SCR) and all data are given in Table 1. The AC system voltages
(UACT1, UACT2, UACT3, UACT4, UACT5) and AC grid strengths are selected to represent a
wide range of operating conditions. A Δ-Y transformer is connected with its
corresponding impedance to each terminal. A two-level PWM VSC using IGBT switches
2
are assumed. Two capacitors are connected across the DC terminals (CDCTn), n=1,2,.,5
representing symmetrical HVDC monopoles.
There are two main HVDC lines connecting sending area to the receiving area (DC lines
1 and 4), which might have been developed in the initial stages. The two sending
terminals are also directly linked by a 300km DC cable in order to improve operating
flexibility and security of supply. The three receiving systems are also interlinked on DC
side. In such configuration any DC cable can be tripped, but the power will be
undisrupted to all terminals assuming rapid fault isolation and adequate rating of
remaining components. It is assumed that DC Circuit breakers are installed at the ends of
each cable. The DC cable data are given in Table 2.
Fig. 1: Schematic of studied 5-terminal DC network
3
III. DC Grid Control System
Each terminal in the DC grid has control system topology resembling topologies for twoterminal HVDC as shown in Fig. 2. In addition the d-axis current control includes DC
voltage droop feedback which is implemented at terminal four (T4), three (T3), two (T2)
and one (T1). The terminal five (T5), has same control structure but, as the large sending
terminal, it uses PI DC voltage control in the outer d-axis loop. The droop control
consists of droop gain KDC_droop and the second order filter. The outputs of the control
system (MT4d, MT4q), after transformation into magnitude (MmT4) and phase shift (MφT4),
represent the reference signals for the pulse-width modulation (PWM). The PLL is used
to synchronize converter with the AC system and has notable impact on system dynamics
[13]. All filters are second order with parameters ωf and ζf.
Fig. 2: Control diagram of terminals T1-T5
IV. DC Grid Analytical Model
A. Model Structures
An accurate analytical modeling facilitates eigenvalue studies that are not possible with
conventional time-domain simulation approaches. The studies with averaged analytical
models are very fast regardless of the model size, and this becomes important as DC grid
size increase.
An analytical model is developed by writing differential equations for all dynamic
elements and then connecting various variables with static equations typically derived
from power balance expressions. The equations are then linearized and the model is
represented in state-space form [13, 14]. The DC grid analytical modeling follows the
similar principles reported with 2-terminal HVDC in [13]. The modular approach is used
for each of the 5 terminals in order to simplify development and provide flexibility for
further expansion. Each of the terminals consists of: AC grid model, DC line model,
converter model, controller and PLL models and AC-DC interlinking equations. Each
variable and parameter in the model has equivalent physical representation and therefore
can be studied for impact on DC grid dynamics
4
B. AC System Model
The AC model of all terminals is similar. Here, the equations of terminal T1 in dq
reference frame synchronously rotating with the local PCC AC voltage (UAC1) are given:
L AC1
d
1
I AC1d  e AC1d  R AC1 I AC1d   L AC1 I AC1q  M1d U DC1
dt
2
(1)
L AC1
d
1
I
 e AC1q  R AC1 I AC1q   L AC1 I AC1d  M1q U DC1
dt AC1q
2
(2)


(3)
UCAC1q I AC1d  UCAC1d I AC1q 
(4)
3
PAC1  U CAC1d I AC1d  U CAC1q I AC1q
2
Q AC1 
3
2
where UDC1 is the DC voltage at VSCT1, RAC1 represents the AC grid resistance and
converter losses, LAC1 is the AC system inductance including transformer leakage
inductance, IAC1d and IAC1q are the AC dq current components, eAC1d and eAC1q are the AC
dq voltage components at remote source,  is the frequency and PAC4/QAC4 is the
active/reactive power at the PCC bus. The VSCT1 reference frame is aligned with the
UAC1 voltage vector employing a PLL, such that UAC1q=0, and UCAC1d=│UAC4│.
Accordingly, the active and reactive power is controlled by independently controlling the
AC current vector components using modulation control signals (M1d, M1q).
C. Converter Model
The linking between DC and AC voltages is achieved by the following linearized
fundamental converter equations:
U CAC1d 
1
1
M 1d U DC1  U DC1 M1d
2
2
U CAC1q 
1
2
(5)
1
M 1q U DC1  U DC1 M1q
2
(6)
where dot above variables (0) denotes value at linearization point. Therefore each
converter is represented as linear continuous system in this model. The linking between
AC and DC converter currents is similarly achieved by combining fundamental converter
voltage equations and AC/DC power balance equations:
I DC1  
3
1
3 1
3 1
3 1
I AC1d M1d 
I AC1q M1q 
M 1d I AC1d 
M 1q I AC1q
4 CDC1
4 CDC1
4 CDC1
4 CDC1
(7)
D. DC grid model
DC grid is modeled by writing 5 dynamic equations for each DC cable including 3
equations for DC cable T-model [15] and one equation for each converter capacitor.
E. PLL model
The dynamic model of PLL is represented by a second order state-space equation as
given in [13].
5
F. Final model
Each terminal model is obtained by connecting the state-space model of AC system,
converter and controller, and PLL. Terminals T1-T4 have 21 states while terminal T5 has
22 states because of one additional PI loop for controlling DC voltage. Each terminal and
also the internal DC network are considered as individual sub-systems and integrated
together to obtain the overall 5-terminal DC grid model. A 126st order multiple-input
multiple-output (MIMO) small-signal model of DC network then assembled in statespace form within MATLAB. There is flexibility for expanding DC grid with further
terminals. The overall model is in standard matrix form :

x s  A s xs  B s u s
(8)
Ys  C s xs  D s u s
where the system matrix (As) input matrix (Bs), state vector (xs) and input vector (us) are:

A DC
B DC 5 M AC 5 C AC 5 B DC 4 M AC 4 C AC 4 B DC 3 M AC 3C AC 3 B DC 2 M AC 2 C AC 2 B DC1M AC1C AC1 


A AC 5
0
0
0
0
 B AC 5 L DC 5 C DC 5

B

L
C
0
A
0
0
0
AC
4
DC
4
DC
4
AC
4
As  

B
L
C
0
0
A
0
0
 AC 3 DC 3 DC 3

AC 3
B

L
C
0
0
0
A AC 2
0
 AC 2 DC 2 DC 2

0
0
0
0
A AC1
 B AC1L DC1C DC1

(9)
 B DC 


 B AC 5 
B

B s   AC 4 
 B AC 3 


 B AC 2 
B

 AC 1 
x s   xDC
xAC 5
u s  U DC 5ref
xAC 4
U AC 5ref
xAC 3
U AC 4ref
x AC 2
x AC1 
I AC 4dref
T
U AC 3ref
I AC 3dref
U AC 2ref
I AC 2 dref
U AC1ref
I AC1dref 
T
(10)
The output matrix CS can be defined with any row number to monitor the selected
outputs. The subscript notation denotes the input/output of the subsystems. For example,
BDC is the input matrix from the DC sub-system, AACi is the system matrix of the AC side
at terminal Ti and CACi is the output matrix of the AC side at terminal Ti.
V. Model Validation
A detailed DC grid model is developed on PSCAD platform. It includes detailed 6-IGBT
converter models with 2-level PWM control assuming carrier frequency ratio of 27
(fs=1350Hz) at each terminal and all non-linear controls in detail. Because of DC grid
complexity, the PSCAD model is extremely slow but highly accurate. Fig. 3 shows
system responses for a 5% reference step on UAC4 for the detailed PSCAD and analytical
MATLAB models. Fig. 3a verifies that the analytical model accurately represents q-axis
variable control. Fig. 3b confirms that the interactions with other terminals are accurately
modeled. Fig. 3c shows that the interaction with T4 variables on d-axis is accurately
modeled. The analytical model is verified for other step inputs and for other variables,
and the results confirm very good matching. However, the results are not shown here for
brevity.
6
Fig. 3: Analytical model verification against detailed non-linear PSCAD model, for a 5%
step change on the UAC4 voltage reference. a) AC voltage at T4 UAC4, b) DC voltage at T5,
and c) Direct T4 current (IACd4)
VI. DC Grid Stability Study
The controllers of each terminal are tuned independently, i.e. assuming an equivalent DC
source or DC current injection at remaining terminals. This approach was applied to both
inner current control and the outer voltage control loops. The inner current loops do not
cause much interaction issues between terminals. Also the outer AC voltage control
affects mainly the local dynamic modes. The controllers’ data are given in Table 3.
Droop gains are tuned at a later stage since they have significant effect on the overall DC
grid dynamics and may cause interaction problems. This section is focused on the
following objectives: a) to select optimum DC voltage droop control gains, b) to study
the influence of the selected gain on the other terminals, and c) to find optimum cutoff
frequency of the DC voltage droop feedback filter. The root-locus analysis is used for
tuning the DC voltage droop gains and the PSCAD simulation is employed for evaluating
the results.
The value of DC voltage droop gain (KDC_droopTi) is varied using root locus study. The DC
droop gains are adjusted progressively for terminals Ti; i=4, 3, 2 and 1. Note that tuning
7
the first terminal (T4) involves all other droop gains disabled, but tuning the last droop
gain (at terminal T1) involves all other droop gains enabled.
A. Design of Droop Controller at Terminal 4 (Receiving Area)
The root-locus of the overall (5-terminal) system matrix in (9) with changes in KDCdroopT4
and fixed cutoff frequency (initially assumed at fDCdroopT4= 30 Hz and DC_droopT4=1) is
shown in Fig. 4. The range of values of KDCdroopT4 is from 0 to -60. In all root locus
figures below, the maximum value of DC droop gain is denoted by a diamond (◊), the
minimum value marked by an asterisk (*), and the selected value shown by circle (o).
In the static design approach, the per-unit droop gain is described by the following
equation [8], [10]:
K DCdroop 
I DCrated
U DCrated
(11)
where ΔUDCrated is the per unit maximum variation of DC voltage and IDCrated is the per
unit rated of DC current. Typically per unit DC droop is 5%-20% [10], [16].
Fig. 4 shows that branch ‘A’ moves towards the left half of the s-plane and branch ‘F’ as
dominant eigenvalues show better transient behaviour as |KDCdroopT4| is increased. On the
contrary, Branches ‘B, C, D, E’ move towards the right-half plane. Branches ‘B, C’ cross
the imaginary axis at KDCdroopT4 ≈ -43.5 and -19.5, respectively. These droop-caused
dynamic instabilities have also been confirmed on detailed benchmark PSCAD model.
It is evident that the system stability is improved only for limited range of moderate
droop gains, whereas for very high gains the eigenvalues move towards unstable region
reducing damping of oscillations and ultimately the system becomes unstable. Thus the
optimum value of the droop gain is chosen as marked by the circle (o), KDCdroopT4 =-7.
This gain corresponds to DC droop constant equal to 1/ KDCdroopT4≈14.3% [17]. This gain
value should also be checked for suitability regarding steady-state voltage deviations and
power balancing. The loss of the largest terminal (T5 at 600MW) would imply that all
other terminals should adjust power by 50%, and with the above droop gain the DC
voltage deviation will be around 7%. Such voltage deviation might be acceptable as a
temporary operating point until post-disturbance power references are readjusted.
8
Fig. 4: Root locus with variable KDCdroopT4, (fDCdroopT4=30 Hz). DC voltage droop controls
at terminals T3, T2, T1 are disabled.
Nevertheless, in case of smaller DC grids larger droop gains are required in order to
adequately restrict steady-state DC voltage deviations using only small number of
terminals. Therefore small DC grids require careful dynamic stability studies.
The influence of the cutoff frequency of the DC voltage droop filter at terminal 4 is
considered next assuming the above selected DC droop gain. Fig. 5 shows the root locus
considering a variation of fDCdroopT4 from 1Hz to 500Hz. Some branches such as ‘G, H’
move towards the right-half plane and then return toward the left-half plane by increasing
fDCdroopT4. Branches ‘I, J, K, and L’ show stability improvement by increasing the filter
frequency. The final value of the fDCdroopT4 is selected as 30Hz. This conclusion on
stability issues with highly filtered droop feedback implies stability problems. Such
delays are possible in practical systems with long distance transfer of droop signals.
With the same procedure, the DC voltage droop gains at terminals T3 and T2 are
designed. Although the shape of root locus is different, it is established that with an
adequate stability margin the selected optimal gains are close to those obtained from Figs.
4 and 5. The final selected gains at terminals (T4, T3, and T2) are presented in Table 4.
Fig. 5: Root locus with variable fDCdroopT4, (KDCdroopT4=-7) with disabled droop gains on
other terminals
B. Design of Droop Controller at Terminal 1 (Sending Area)
This section shows the design of droop gain for terminal T1 as the last terminal. The DC
voltage droop gain (KDCdroopT1) is varied with fixed cutoff frequency initially selected at
fDCdroopT1= 30Hz. The DC voltage droop gains and the cutoff frequency at the other
terminals are given in table 4. Fig. 6 illustrates root locus of the system as function of
KDCdroopT1. It is seen that some branches such as ‘M, N, O’ show better performance by
increasing KDCdroopT1 while some other like ‘P, Q, R, S’ move toward the instability
9
region. It can be seen that the branches ‘P’ and ‘R’ hit the imaginary axis at around
KDCdroopT1 ≈ -27 and -53, respectively. The selected DC voltage droop gain at terminal T1
is -7 which is consistent with the droop gains for other terminals. These values for droop
gains are in general agreement with the static recommendations [10], [16].
Fig. 7 shows root locus as the cutoff frequency of the droop control filter at terminal T1
(fDCdroopT1) is changing from 1Hz to 200Hz. Branch ‘T’ moves toward the right-half plane
and hit the imaginary axis at fDCdroopT1=120Hz. Branches ‘U, V’ show a change in
movement direction; the stability margin is decreased at first and then improved by
increasing the fDCdroopT1 Branches ‘W, X, Y, Z’ move toward the left-half plane.
Fig. 6: Root locus with variable, KDCdroopT1, (fDCdroopT1=30Hz). Other droop gains are given
in Table 4.
In order to provide generalized conclusions we aim to select similar gains and filter
constants at all terminals. The selected value of cutoff frequency at terminal T1 is 30Hz.
The root locus plots show that it is generally very difficult to obtain stable performance
for large DC voltage droop gains. A conservative and safe design is based on low droop
gains. Generally higher bandwidth filter is safer, but too high cut off frequency can
destabilize some high-frequency eigenvalues. The root locus for the first terminal
(terminal T4 in Fig. 4) is quite different from that for the last tuned terminal (terminal T1
in Fig. 6) which implies that droop gains cause significant interaction between terminals.
In some cases droop gain at one terminal destabilizes the eigenvalues that had been
moved to more stable position with the droop gain at a previous terminal.
The above sequential design is important in order to confirm that the system stability is
guaranteed if some converters are lost. A DC grid should be flexible and have stable
operation if grid topology changes. The authors have checked dynamic stability if any of
the terminals is lost and it is concluded that any further number of terminals can be added
10
with DC droop control. This proves the suitability of the design procedure for DC grid
expansion. It is crucial that DC droop gains are not too high.
Fig. 7: Root locus with variable fDCdroopT1, KDCdroopT1=-7. The other droop gains are given
in Table 4
Table 5 shows the overall effect of all droop gains on the system eigenvalues. It is
confirmed that the dominant eigenvalues (1-3) have somewhat better location but others
(4-7) move toward the right-half plane. Further increase in droop gains by around 2 times
will firstly destabilize eigenvalues 5 and then the others. Evidently there is minimal, if
any dynamic improvement when using dc voltage droop feedback. However, droop
feedback improves static power balancing in dc grids and also, as with any distributed
output feedback control, it has the effect of reducing overshoots of DC voltage at each
terminal.
C. The effect of operating points
The above eigenvalue study considers the nominal power flow for the five terminals grid
given in fig. 1. It might be of interest to investigate the movement of eigenvalues for
other operating points. The second operating point is considered with a power reference
reversed on T2 which gives 600MW power flow difference. Table 6 summarizes the
dominant eigenvalues at second operating point. It is seen that the eigenvalues for this
operating point without droop control are slightly better than the corresponding ones of
table 5.
However, the dominant eigenvalues have similar movement for the two operating points;
i.e. the dominant eigenvalues (1-3) move to somewhat better location and the others (4-7)
move toward the right-half plane with lower damping by increasing the droop gain.
Therefore it can be concluded that the effect of droop control on the system performance
is similar at each operating point.
11
VII. PSCAD Simulation of DC grid with droop gains
A. Step Change on AC Voltage Reference at Terminal T5
In all of the following scenarios, VSCT5 is adopted to control the DC voltage with the
reference value equal to 300 kV. The other converters are adopted to regulate the d-axis
current with DC voltage droop gains as selected above. This section tests DC grid
dynamic performance using a 5% step change in AC voltage reference of terminal T5.
Fig. 8a shows the AC voltage of terminal T5 without and with DC voltage droop control.
The DC droop feedback marginally reduces the speed of VAC control response. Fig. 8b
and 8c show the DC voltage without and with droop control. It is seen that the droop
feedback significantly reduces DC overvoltage at all terminals.
Fig. 8: PSCAD simulation of test system performance for a 5% step change on AC
voltage reference VACrefT5: a) AC voltage at T5 without and with DC voltage droop
control, b) DC voltages without droop control, c) DC voltages with droop control
B. Transient Test
The primary objective of this test on the non-linear PSCAD model is to show that droop
control ensures stable operation with acceptable DC overvoltage during temporary and
permanent loss of a converter or DC cable in the DC grid. Normally, the high voltage
spikes occur when there is a sudden loss of an inverter. These spikes are the result of
excessive power that quickly charges the DC link capacitors. A rectifier loss is only of
concern when the loss is temporary, since rectifier sudden connection can cause over
voltages similar to that of an inverter loss [18].
1). Temporary Blocking of VSCT4 for 100ms
In this scenario, the VSCT4 is disconnected from the network for 100ms at t=4sec. Fig.
9a and 9c show the network DC voltages and the DC powers for the case without DC
voltage droop control. Comparably, the performance of the system with DC voltage
12
droop control is shown in Fig. 9b and 9d. The system is stable in both cases. However
without the droop control, the overvoltage is high at 13.5% at all stations. In Fig. 9b, it is
seen that the DC overvoltage is reduced to less than 6.2%. Hence, the DC voltage droop
technique significantly suppresses DC overvoltage for an inverter loss.
Fig. 9: System response for a temporary blocking of VSCT4 for 100ms, a) DC voltages
without droop, b) DC voltages with droop control, c) DC powers without droop, d) DC
powers with droop
2). Permanent tripping of VSCT5
Fig. 10 shows the results of tripping VSCT5, which is the DC voltage regulating
terminal. Figs 10a and 10c reveal that the system becomes unstable in absence of DC
voltage droop control as expected. In contract, by employing the DC voltage droop
control a stable operation is achieved as shown in Fig. 10b and 10d. It is noticed that the
permanent blocking of terminal 5 (by opening CB5) results in DC voltage dip since there
is no DC voltage regulation other than droop gains. The power is reduced at the inverter
terminals and increased at the remaining rectifier terminal T1. Such operation can
continue if terminal T1 has sufficient rating. Otherwise this situation would only be
transient using terminal T1 temporary overcurrent capability until master control trips an
inverter or updates reference points.
13
Fig. 10: Permanent blocking of VSCT5, a) DC voltages without droop, b) DC voltages
with droop control, c) DC powers without droop control, d) DC powers with droop
control
VIII. Conclusions
A small-signal 126 order analytical model for a 5-terminal VSC-HVDC grid is
presented. The model is implemented in MATLAB and compared against a detailed
benchmark model in PSCAD. Ii is shown that the accuracy is very good. The developed
model is suitable for eigenvalue studies of system stability and other dynamic analytical
methods.
th
The advantages of the DC voltage droop control are explored analytically by plotting the
root locus as the values of DC droop gain and cutoff frequency of the droop control filter
are varied. It is verified that the droop gain and cutoff frequency have a significant impact
on dynamic performance of DC grid. The stability analysis confirms that it is very
difficult to obtain stable performance for large DC voltage droop gains. Moderate values
for the cutoff frequency of the droop filter will guarantee stability while a higher
bandwidth can further improve performance. The DC grid can be expanded with further
terminals if droop gains are limited.
The transient results in PSCAD confirm that the droop control can significantly reduce
DC overvoltage and the voltage dip problem caused by temporarily loss of an inverter in
the DC grid. It is further confirmed that without the droop scheme the blocking of the
rectifier is accompanied by large voltage dips as well as overvoltage at recovery period. It
is also verified that using DC voltage droop control provides a stable operation with
acceptable voltage dip and without considerable overvoltage even during loss of the DC
voltage controlling terminal.
14
X. References
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Transmission Systems: An Overview. IEEE Trans. Power Electronics, Vol. 24,
No. 3, March 2009, pp. 592-602.
2. Lu W, Ooi B. Premium quality power park based on multi-terminal HVDC. IEEE
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16
Table 1: Five Terminals Test System Parameters
VSCT1
VSCT2
VSCT3
VSCT4
VSCT5
Rated Power
300MW
300MW
300MW
300MW
600MW
AC
Voltage
110KV
110KV
110KV
110KV
220KV
10 , 10
5 , 10
7 , 14
6.5 , 10
5 , 10
300MVa
/0.12p.u.
300MVa
/0.12p.u.
300MVa
/0.12p.u.
600MVa
/0.12p.u.
110/175
110/175
110/175
220/175
40uF
40uF
40uF
40uF
Rated
SCR , X/R
Trans.
Parameters ST5 300MVa
rated
/0.12p.u.
/ LACT5
110/175
/Ratio
DC capacitance
40uF
Table 2: DC Cable Parameters
Length
CDCL1 / LDCL1 / RDCL1
Line 4 (T5-T4) – 200 km
52μF / 0.1H / 3 Ω
Line 3 (T3-T4) – 60 km
15.6μF / 0.03H / 0.9Ω
Line 1 (T3-T2) – 40 km.
10.4μF / 0.02H / 0.6 Ω
Line 1 (T2-T1) – 300 km
78μF / 0.15H / 4.5 Ω
Line 1 (T1-T5) – 300 km
78μF / 0.15H / 4.5 Ω
Table 3: Five Terminals Control
Parameters
T1-T4
T5
Table 4: DC Voltage Droop Control Gains
DC droop gain
KP_Idq , KI_Idq
1 , 20
1 , 20
KP_UAC , KI_UAC
1 , 500
1 , 500
KDC_droopT4=
(14.3%)
KP_UDC , KI_UDC
-------
10 ,
100
KDC_droopT3
(14.3%)
KDC_droopT2=
(14.3%)
=
Cutoff
frequency
-7 fDC_droopT4=
Hz
30
-7 fDC_droopT3=
Hz
30
-7 fDC_droopT2=
Hz
30
Table 5: Overall dynamic impact of 4 droop gains on dominant eigenvalues (nominal
operating point)
Without any droop control
Mode
eigenvalue
With all droop gains
Mode
17
eigenvalue
1
-55.8 & -92.2
1
-76.7& -89.7
2
-26.0  j10.9
2
-26.6 j10.9
3
-54.8j50.0
3
-57.4j51.3
4
-9.46  j7.38
4
-16.3 & -2.98
5
-23.9j335.2
5
-10.3j362.5
7
-15.8j327.9
6
-11.7j343.7
8
-37.8j78.2
7
-22.8j155.4
Table 6: Overall dynamic impact of 4 droop gains on dominant eigenvalues (second
operating point)
Without any droop control
With all droop gains
Mode
eigenvalue
Mode
eigenvalue
1
-80.3 & -92.1
1
-93.4j5
2
-26.0  j10.7
2
-26.6 j10.5
3
-55.7j50.2
3
-57.6j52.1
4
-9.91  j6.95
4
-16.3 & -3.18
5
-22.4j332.3
5
-13.2j341.1
7
-18.0j354.5
6
-8.75j365.7
8
-50.7j77.9
7
-23.4j154.5
18