Set 8: More Mutex with Read/Write Variables
DISTRIBUTED ALGORITHMS
Spring 2014
Prof. Jennifer Welch
1
Number of R/W Variables
2




Bakery algorithm used 2n shared read/write
variables.
Tournament tree algorithm used 3n shared
read/write variables.
Can we do (asymptotically) better, in terms of
fewer variables?
No!
Set 8: More Mutex with Read/Write Variables
Lower Bound on Number of Variables
3
Theorem (4.19): Any no-deadlock mutual exclusion
algorithm using read/write variables must use at
least n shared variables.
Proof Strategy: Show by induction on n there must be
at least n variables.
For each n, there is a configuration in which n
variables are covered: means some processor is
about to write to it.
Set 8: More Mutex with Read/Write Variables
Appearing Quiescent
4



Two configurations C and D are P-similar if each
processor in P has same state in C as in D and each
shared variable has same value in C as in D.
A configuration is quiescent if all processors are in
remainder section.
To make the induction go through, the
configuration whose existence we prove must
appear quiescent to a set of processors:

C is P-quiescent if there is a reachable quiescent
configuration D such that C and D are P-similar
Set 8: More Mutex with Read/Write Variables
Warm-Up Lemma
5
Before a processor can enter its CS, it must write to an
uncovered variable.
Lemma (4.17): If C is pi-quiescent, then there is a pionly schedule  such that
(a)
pi is in CS in (C) and
(b)
during exec(C,), pi writes to a variable that is
not covered (by other processors) in C.
Set 8: More Mutex with Read/Write Variables
Proof of Warm-Up Lemma (a)
6



Since C is pi-quiescent, it looks the same to pi as
some quiescent D.
By ND, some pi-only schedule  exists starting at
D in which pi enters CS.
When  starts at C, pi also enters CS.

D
quiescent
C

pi-quiescent
Set 8: More Mutex with Read/Write Variables
pi in CS by ND
pi in CS
Proof of Warm-up Lemma (b)
7


C
Suppose in contradiction when  is executed
starting at C, pi writes to the set of variables W
but all the variables in W are covered in C.
Let P be the set of processors covering the
variables in W.
1
E
2
Q
one step by each successively
invoke ND to
proc in P; overcause all procs
writes W
to be in remainder;
pi takes no step

some pj (not pi)
takes steps alone;
by ND eventually
pj enters CS
Set 8: More Mutex with Read/Write Variables
Proof of Warm-up Lemma (b)
1
8
C
2
E
overwrites W

Q
successively
invoke ND
pj-only
pj in CS

pi-only,
writes to W
C'
pi in
CS
1
E'
overwrites W
2

Q'
successively
invoke ND
pj-only
pj in CS,
pi in CS
Only difference in shared memory between C and C' are the writes by pi, but
those values are overwritten in 1 so the info is lost.
Set 8: More Mutex with Read/Write Variables
Main Result
9
Lemma (4.18): For all k between 1 and n, for all
quiescent C, there exists D s.t.
(a)
D is reachable from C by steps of p0,…,pk-1 only
(b)
p0,…,pk-1 cover k distinct variables in D
(c)
D is {pk,…,pn-1}-quiescent.
implies desired result when k = n
Set 8: More Mutex with Read/Write Variables
Proof of Main Result - Basis
10
By induction on k.
Basis: k = 1. Must show for all quiescent C, there exists
D s.t.
(a)
(b)
(c)


D is reachable from C by steps of p0 only
p0 covers a variable in D
D looks quiescent to the other procs.
By warm-up lemma (a), if p0 takes steps alone, it
eventually writes to some var.
Desired D is just before p0 's first write.
Set 8: More Mutex with Read/Write Variables
Proof of Main Result - Induction
11
Assume for k, show for k+1.
C
any qui.
config.
0
C1
only p0 to
pk-1 take
steps
p0 to pk-1
cover W;
pk to pn-1 qui.

pk-only

pk covers
x not in W
p0 to pk-1 overwrite W,
become quiescent
Set 8: More Mutex with Read/Write Variables
D1'
pk in entry
looks qui.
to rest
Proof of Main Result - Induction
12
C
0
any qui. only p0 to
config. pk-1 take
steps
C1

p0 to pk-1
cover W;
pk to pn-1 qui.
 pk-only

pk covers p0 to pk-1
x not in W o'write W,
become
quiescent
D1
qui.

p0 to pk-1
only
C2
p0 to pk-1
cover W;
pk to pn-1 qui.
but why is the same set
of k vars covered again?

D1'
pk in entry
looks qui.
to rest
Set 8: More Mutex with Read/Write Variables
C2'
p0 to pk
cover W
and x;
pk+1 to pn-1
qui.
Proof of Main Result - Fix
13





The result of applying  to D1 might result in a different set
of k variables, W', being covered instead of W.
If W' includes x, we have not succeeded in covering an
additional variable.
To fix this problem, repeatedly apply inductive hypothesis to
get
C1,D1,C2,D2,C3,D3,…
Since number of variables is finite, there exist i and j such
that in Ci and Cj the same set of k variables is covered.
Then apply same argument as before, replacing C1 and C2
with Ci and Cj.
Set 8: More Mutex with Read/Write Variables
Fast Mutual Exclusion
14



The read/write mutex algorithms we've seen so far
require a processor to access f(n) variables in the
entry section even if no contention.
It would be nice to have a fast algorithm: if no
competition, a processor enters CS in O(1) steps.
Even better would be an adaptive algorithm:
performance depends on number of currently
competing processors, not total number.
Set 8: More Mutex with Read/Write Variables
Fast Mutual Exclusion
15


Note that multi-writer shared variables are
required to be fast.
Combine two mechanisms:
 provide
fast entry when no contention
 provide no deadlock when there is contention
Set 8: More Mutex with Read/Write Variables
Contention Detector Overview
16


A doorway mechanism captures a set of processors
that are concurrently accessing the detector
Use a race to choose a unique one of the captured
processors to "win"
Set 8: More Mutex with Read/Write Variables
Contention Detector
17
Uses two shared variables, door and race.
Initially door = "open", race = -1.
1
2
3
4
5
6
race := id
if door = "closed" then return "lose"
else
door := "closed"
if race = id then return "win"
else return "lose"
Set 8: More Mutex with Read/Write Variables
Analysis of Contention Detector
18
Claim: At most one processor wins the contention
detector.
Why?
 Let K be set of procs. that read "open" from door
in Line 2.
 Let pj be proc. that writes to race most recently
before door is first set to "closed".
 No node pi other than pj can win:
If pi is not in K, it loses in Line 2.
 If pi is in K, it writes race before pj does but checks
again (Line 5) after pj 's write and loses.

Set 8: More Mutex with Read/Write Variables
Analysis of Contention Detector
19
Claim: If pi executes the contention detector alone,
then pi wins.
Why?
 Trace through the code when there is no
concurrency.
Set 8: More Mutex with Read/Write Variables
Ensuring No Deadlock
20


If there is concurrency, it is possible that no processor
wins the contention detector.
To ensure progress:
nodes that lose the contention detector participate in an nprocessor ME alg.
 The winner of the n-processor alg. competes with the
(potential) winner of the contention detector using a 2processor ME alg.
 Winner of 2-processor alg. can enter CS

Set 8: More Mutex with Read/Write Variables
Ensuring No Deadlock
21
contention
detector
lose
n-proc. mutex
win
play role of p0
play role of p1
2-proc. mutex
critical section
Set 8: More Mutex with Read/Write Variables
Discussion of Fast Mutex
22



Be careful about the exit section: contention
detector needs to be reset properly
This is a modular presentation: doesn't specify
particular n-proc and 2-proc subroutine mutex
algorithms
Not adaptive: even if only 2 procs are contending,
execute the potentially expensive n-proc algorithm
Set 8: More Mutex with Read/Write Variables