State Machine Implementation
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10/2/2008
ECE 561
ECE -ECE
561 -561
Lecture
- Lecture
5 5
1
Lecture Overview
• Another Example – a counting machine
• Another Example – Tail light controller
10/2/0810/2/2008
10/2/2008
ECE 561
ECE -ECE
561 -561
Lecture
- Lecture
5 5
2
Counting Machine
• “Design a clocked synchronous state machine
with two inputs, X and Y, and one output Z.
The output should be 1 inputs on X and Y
since reset is a multiple of 4, and 0 otherwise.
• There are 4 states
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10/2/2008
ECE 561
ECE -ECE
561 -561
Lecture
- Lecture
5 5
3
Construct a state table
• From word description construct a state table
for the problem.
X Y
01
11
Meaning
S
00
Have zero 1's mod 4
Have one 1 mod 4
Have two 1's mod 4
Have three 1's mod 4
S0
S1
S2
S3
S0 S1
S1 S2
S2 S3
S3 S0
S2
S3
S0
S1
10
Z
S1
S2
S3
S0
1
0
0
0
S*
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10/2/2008
ECE 561
ECE -ECE
561 -561
Lecture
- Lecture
5 5
4
Do a state assignment
• Having state table pick a state assignment
• From here we can generate the excitation equations
Q1 Q2
00
01
11
10
S
S0
S1
S2
S3
X Y
00 01 11
10
Z
00
01
11
10
01
11
10
00
1
0
0
0
01
11
10
00
11
10
00
01
Q1* Q2*
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Excitation Equations
D1 Map
• D1 = Q2 X’ Y + Q1’ X Y +
Q1 X’ Y’ + Q2 X Y’
X Y
• Z = Q1’ Q2’
• D2 = Q1’ X’ Y + Q1’ X Y’
+ Q2 X’ Y’ + Q2 X Y
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00
01
11
10
00
0
0
1
0
01
0
1
1
1
11
1
1
0
1
10
1
0
0
0
D2 Map
X Y
ECE 561 -ECE 561 - Lecture 5
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01
11
10
00
0
1
1
1
01
1
1
0
1
11
1
0
0
0
10
0
0
1
0
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Another Example
• Design a clocked synchronous state machine
with one input X and two outputs, UNLK and
HINT. The UNLK output should be 1 if and
only if X is 0 and the sequence of inputs
received on X the preceding seven clock ticks
was 0110111. The HINT output should be 1 if
and only if the current value of X is the correct
one to move the machine close to being in the
“unlocked” state (with UNLK = 1).
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Create State Table
• Create a state table
from the word
description
Meaning
Got Zip
Have 0
Have 01
Have 011
Have 0110
Have 01101
Have 011011
Have 0110111
X
S
0
A
B
C
D
E
F
G
H
B,01
B,00
B,00
E,01
B,00
B,00
E,00
B,11
1
A,00
C,01
D,01
A,00
F,01
G,01
H,01
A,00
S*,UNLK,HINT
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Choose a state assignment
• To get transition/excitation table
X
Q1 Q2 Q3
000
001
010
011
100
101
110
111
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0
1
001,01 000,00
001,00 010,01
001,00 000,00
100,01 100,01
001,00 101,01
001,00 110,01
100,00 111,01
001,11 000,00
Q1*Q2*Q3*,UNLK HINT
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Can use Karnaugh Map to get
excitation equations
• D1 = Q1 Q2’ X + Q1’ Q2 Q3 X’
+ Q1 Q2 Q3’
• D2 = Q2’ Q3 X + Q2 Q3’ X
• D3 = Q1 Q2’ Q3’ + Q1 Q3 X’ + Q2’ X’ .
.
+ Q3’ Q1’ X’ + Q2 Q3’ X
• UNLK = Q1 Q2 Q3 X’
• HINT = Q1’ Q2’ Q3’ X’ + Q1 Q2’ X
+ Q2’ Q3 X + Q2 Q3 X’ + Q2 Q3’ X
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For both examples
• Having the excitation and output equation can
do the implementation in discrete logic or
perform a schematic capture for FPGA tools
such as XILINX or Altera.
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Another example
• This is a example of a “real” deisgn
• The T-Bird Tail Light Problem
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The Transistion Table
• Can again get the transition table
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The State Diagram
• Can also draw a state diagram
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Final steps
• Choose F/F type
• Choose a state assignment
• Develop the transition/excitation table for
that state assignment
• Generate the equations
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Assignment 3
• Carry through the remaining steps to get
implementation and output equations and the circuit
diagram for an implementation for the following
state table.
Next State
Present State
A
B
C
F
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w=0
w=1
Z
B
A
F
C
C
F
C
A
1
1
0
0
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