Eastern Mediterranean University
Department of Computer
Engineering
CMPE 443 – Midterm Exam
2002 – 2003 Spring Semester
28 April 2003
Name, Surname
Student No
Group No
:…………………..
:…………………..
:…………………..
Instructor
Assoc. Prof. Alexander CHEFRANOV
Question
Grade
Part 1
Part 2
Part 3
Total
*************************** Good Luck! ****************************
1
PART 1: Design Criteria
Task 1. (20 points). Assume that one-processor preemptive priority RTS must
control 3 objects requiring periodical service. Each object is managed by respective
task. Periods of requests for tasks, their complexity (number of operations), and
tasks’ priorities are as follows:
Task No
1
2
3
Period, milliseconds
5
50
100
Operations*105
5
50
100
Priority
1
2
3
Highest priority is equal to 1. Each task allows delay in execution, but its execution
must be terminated until the next request for this task will come (after expiration of
time equal to respective period). Context switch requires 100 operations and uses
run-time stack.
a) Draw time diagram reflecting worst-case scenario of issuing requests for service
(burst of requests) (10 points)
1
2
1
2
1
2
1
3
1
2
1
3
Task1
Task2 – period of 50 ms
Task3 – period of 100 ms
Worst case corresponds to simultaneous coming of 3 requests (burst of requests). If
their order was (3,2,1) then immediately after switching from operating system (OS)
to the 3rd task it will be preempted by 2nd task, which will be preempted by task 1
having highest priority. Task 2 will get processor time in each 5 ms period after
termination of task 1. It must terminate before next request to task 2 execution will
come (it will terminate inside 50 ms interval from the start moment). Then each 5 ms
period will be launched task 3 until next request to task 2 will come. Then again in
each 5 ms period will work tasks 1,2. But task 3 must terminate inside 100 ms
interval beginning from start point (before next request to task 3 will come).
b) Calculate minimal RTS’ processor performance satisfying system requirements
(7 points)
Let’s denote:
P - performance;
Oi – number of operations required for task I, i=1,2,3
TPi – time periods of issuing requests for task I execution, i=1,2,3
CS – number of operations required for context switch
Each task must terminate inside respective period:
2
CS O1
CS O1
TP1 P
P
TP1
TP2 CS O1 CS
O
2CS O1 O2
(
) 2 TP2 P
TP1
P
P
P
TP1
TP2
TP3 TP2 CS O1 CS
O CS
O
2CS O1 CS O2 O3
(
(
) 2
) 3 TP3 P
TP2 TP1
P
P
P
P
P
TP1
TP2
TP3
The 1st inequality describes situation for the highest priority task 1, which preempts
other tasks. The 2nd inequality corresponds to multiple preemptions of the 2nd task by
task 1 in each period of TP1=5 ms during the period of TP2=50 ms. We take into
account time necessary for context switching when task 1 starts and when it
terminates, and control returns to preempted task 2. Task 3 can work only in the
time when there are no other tasks, so it may be resumed inside period of TP2 after
termination of task 2, but each period of TP1= 5 ms it is interrupted by task 1 and
each period of TP2=50 ms it is interrupted by task 2. From the last inequality for
performance P we obtain:
P
2 *100 5 *10 5 100 50 *10 5 100 *10 5
5 *10 3
50 *10 3
100 *10 3
10 8
* (5.00200 5.0001 5) 3.00042 *10 8 op / sec
5
c) Calculate size of required run-time processor’s stack (3 points)
As we have considered earlier, there may be 3 levels of preemptions + 1 for safety.
So, run-time stack size is to be not less than 4*sizeof(context_of_the_task)
Task 2. (2 points). Throughput is optimized by algorithm
a) LPT
b) SPT
c) FIFO
d) Round-Robin
e) none of the above
Task 3. (2 points). Real-Time System is a system
a) working in a real-time
b) working with a real-life objects
c) controlling external objects
d) having time restrictions
e) for which violation of time restrictions may lead to system failure
PART 2: Specification Techniques
Task 4. (10 points). Use UML class diagrams to describe set of the following classes and
relations between them: vehicle-controlling system, brakes controlling system, fuel
consumption controlling system, steering controlling system, vehicle supplied with
controlling system, WW Polo with controlling system, Mercedes-300 with controlling
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system, steering wheel, brake, wheel, acceleration system, fuel system, engine. Show only
classes’ names (don’t show attributes and methods).
Vehicle
controlling
system
(VCS)
1
Vehicle
supplied
with (VCS)
1
Brakes controlling system
1
Fuel consumption controlling system
1
Steering controlling system
1
Brake
1
Engine
4
Mercedes
supplied
with (VCS)
WW Polo
supplied
with (VCS)
Wheel
Acceleration system
1
Task 5. (20 points). Consider vehicle-controlling system, having accelerator controlling,
brakes controlling, fuel consumption controlling systems. Accelerator controlling system
has methods increase_gas(), decrease_gas(); brakes controlling system has method
decelerate(); fuel consumption controlling system has methods increase_consumption(),
decrease_consumption(). Names of methods reflect their sense.
Draw ROOM actors structural diagram (10 points)
Draw ROOM Message Sequence Diagram, corresponding to mutually exclusive events:
a) user presses acceleration pedal (5 points)
b) user presses brakes pedal (5 points)
4
ROOM actors diagram:
Brakes CS
User
User
Brakes
Fuel consumtion
Accelerator
user
Brakes
Accelerator CS
Fuel consumption
CS
Fuel consumption
Accelerator
Message Sequence diagram (user presses acceleration pedal)
User
Accelerator
CS
Brakes CS
Fuel
Consumption
CS
increase_gas()
Increase_consumption()
User releases acceleration pedal and presses brakes pedal:
User
Accelerator
CS
Brakes CS
decrease_gas()
decrease_consumption()
decelarate()
5
Fuel
Consumption
CS
Task 6. (10 points). Describe Round-Robin processor sharing system with the queue for
5 tasks as Mealy Finite States Automaton with input alphabet (EnterTask, ExitTask), and
output alphabet (TaskAccepted, TaskRejected). Meaning of signals: EnterTask – new task
enters system; ExitTask – task exits system, TaskAccepted – task was accepted into
queue, TaskRejected – task was not accepted into queue (no free place).
EnterTask/Acc
0
tasks
EnterTask/Acc
1
task
ExitTask
EnterTask/Acc EnterTask/Acc EnterTask/Acc
2
tasks
ExitTask
3
tasks
ExitTask
4
tasks
ExitTask
5
tasks
ExitTask
EnterTask/Rej
Task 7. (2 points). In statecharts specification technique orthogonal states are shown by
a) double lines
b) solid lines
c) dashed lines
d) arrows
e) none of the above
Task 8. (8 points). 1st step in the RTS Design process is
a) to design code
b) to test code
c) to define system goal and requirements
d) to design concept of system implementation
e) none of the above
PART 3: Processes Management
Task 9. (2 points). Critical resource is a shared resource
a) having deadlines
b) having critical size
c) having critical priority
d) which is to be used in exclusive mode
e) none of the above
Task 10. (2 points). Program Counter in Intel processors is represented by
a) SS:SP
b) DS:DI
c) DS:SI
d) ES:BX
e) none of the above
Task 11 (2 points). Interruption vector contains
a) interruption signal
b) interruption source address
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c) interruption sequence
d) interruption handler
e) none of the above
Task 12. (2 points). Before yielding control to interruption handler processor saves in
stack 3 registers in the following order:
a) PSW, IP, CS
b) CS, IP, PSW
c) IP, CS, PSW
d) IP, PSW, CS
e) none of the above
Task 13 (4 points). Write out expression for calculation of executive (physical) address
of the handler of 0x08 interruption using its interruption vector
Offset=contents of the word in bytes 4*8=32 and 33; segment= contents of the word in
bytes 34 and 35;
Physical address=segment*16+offset
Task 14. (10 points). Consider RTS which is to process infinite streams of integers from
3 external
1
O
2
3
sources via ports numbered 1,2,3 by system of 3 cooperative processes. Each input data
stream is processed by respective process by calculation of current average, minimal and
n
maximal values: CurrAvgn
x
i
, CurrMin n min xi , CurrMax n max xi , where n is a
i 1, n
i 1, n
n
total number of up to current moment come data items xi . These values are to be
calculated for each new incoming data item and to be output via port O together with the
number of respective input port as tuples of the form (CurrAvg, CurrMin, CurrMax,
Port#).. For example, if data stream for port 1 was (1,2,3,4,..) then responsible for this
port process 1 will make the following outputs:
((1,1,1,1),(1.5,1,2,1),(2,1,3,1),(2.5,1,4,1),..). Assume that process for which data are not
available yields control to the next process. Write pseudocode (C- or Pascal-like) for
implementation of such a system.
Globals
Float avg[3]={0,0,0}, min[3], max[3], count[3]={0,0,0};
calculate(process#, port#){
int x;
if (data in port# are available){
x=read(port#);
i 1
7
count[process#]++;
avg[process#]+=x;
if(count[process#]==1)
min[process#]= max[process#]=x;
else{
if(min[process#]>x)min[process#]=x;
if(max[process#]<x)max[process#]=x;
}
write(port0, avg[process#]/count[process#], min[process#], max[process#], process#);
}
}
main(){
int I;
while(1)
for(i=0;i<3;i++)
calculate(i,i+1);
}
Task 15. (10 points). Consider preemptive multitasking RTS in which 3 parallel
processes must read and count input data items from 3 infinite data streams by
incrementing common for these processes variable Counter. For example, if data streams
were 1:(1,2,..), 2:(2,3,1,1,..), 3:(1,2,1,..) then after coming of these 9 data items value of
Counter is to be equal to 9:
2 times it was incremented by process 1 after reading of 1,2,
4 times by process 2 after reading of 2,3,1,1,
3 times by process 3 after reading of 1,2,1.
Binary semaphores are available. Write pseudocode (C- or Pascal-like) for
implementation of such a system, providing correct counting of all income data items.
Semaphore s=1, s1=0;
int counter=0;
count(process#, port#){
int x;
while(1){
x=read(port#);
P(S);
Counter++;
V(S);
}
}
main(){
for(int i=0; i<3;i++)
launch_process(count, i, i+1);//create parallel processes from count procedure
P(S1);//infinite blocking
}
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