Verification for Ethernet
second/first layer with 10
Gigabit Attachment Interface
(XAUI)
Matan Kacen
Intel, ICG, LAD HW AV
June 2005
Dr. Nissim Tsouri
Department of
Communication Systems
Engineering
Mr. Aviah Hevrony
AV core team leader
Lan Access Division
Intel Communication Group
Project goal
To create a generic Test Bench
(Verification environment) for
Ethernet over 10 Gigabit Attachment
Unit Interface (XAUI) as defined in
the IEEE802.3.ae standard.
Pre silicon validation
Validation of the RTL design before the
production of silicon.
 White box validation.
 Two main steams :

– Random validation
– Direct validation
– As always the optimize way is somewhere in
between
– The project need to support both.
Test bench environment
Clocks
Interface B
Device Under Testing
DUT
(RTL design)
Interface A
Interface C


The TB “warp” the design and implement all the
interface that is around it.
Normally we drive a transaction from one interface,
collect it from the other and compare according to the
expected design behave.
10 Gigabit Ethernet
XAUI Protocol

XAUI interface is a 16 pins , 8 lanes (4 TX, 4 RX)
differential interface.
 The clock is embedded within the differential signals and runs at
3.125 GBaud. (320 ps Unit interval nominal)



Symmetric interface architecture.
In the TX side, encoding of 4 XGMII lanes (Data &
control) into 4 XAUI lanes. Each one is self clocked,
serial, 8B/10B encoding data stream. The encoding is
define in 802.3.ae standard clause 48. Each lane
transmit the data serially.
In the RX side, recovers the clock and data from each
XAUI lane and deskew the four XAUI lanes into single
clock XGMII.
XAUI Protocol – Block diagram
XGMII:
XGMII:
TXD <31:0>
RXD <31:0>
TXC <3:0>
RXC <3:0>
TX_CLK
RX_CLK
TRANSMIT
RECEIVE
DESKEW
SYNCHRONIZE
RX unaligned <39:0>
TX <39:0>
4xlanen <9:0>
4xlanen <9:0>
XAUI Protocol – data flow
XAUI
The Test Bench Architecture

Divide the TB into 2 layers using inheritance
relationship between them :
– Ethernet layer - simulate the link partner and the
LAN : generate Ethernet frames, IPG (Inner packet
gap) handling, collision (In lower speeds) …
– Protocol layer – simulate the specific protocol
using between the Physical layer and the Data link
layer : Interface behave, link errors, encoding &
decoding the data, idle stream generation …
Tools


The TB is written in the verification language e
(Specman).
The advantages of Specman:
–
–
–
–
–
–
–
It can connect to any RTL design written in VHDL or Verilog.
It has the ability to force signals into the design.
Zero time forcing signals (Instillation)
Sample signals from the design.
Multi thread run time process.
Random generator.
Create events upon changes / events that happen in the
design signals.
– Collect coverage on predefined events and behavior.
– Check DUT behavior.
The Test Bench Architecture
eRM compiled
Ethernet env
Agent agent(0)
config
BFM
Driver
Rx mo itor
Signal_map
Tx monitor
agent(1)
agent(2)
Relationship between the Ethernet
Layer and the XAUI layer
We used a “pipe line” design for the micro
architecture.
 In the inject size the data (frame) pass several
function cross between the layers until it is
injecting on the interface signals

BFM (BUS Functional Model )
example
Ethernet Flow
Frames
CB
Add frame
events
CB
Pack list of
bits
CB
List of bits 
list of symbol
Add line
events
Wait
IPG
Ethernet ‫פונקציות שממומשות ברמת ה‬
‫ שעיקר מימושם ברמת הפרוטוקול‬Ethernet ‫פונקציות ריקות ברמת ה‬
Pipeline. ‫פונקציות שמאפשרות למשתמש גישה למידע הזורם ב‬
CB
Send
data
XAUI BFM architecture
CB
Frames
CB
CB
CB
CB
Lane encode
& inject
@CLK
3.125 GHz
Symbol
matrix –
Column &
lanes
Add line
events on
symbols
Main loop
@CLK
(312.5 Mhz)
Lane encode
& inject
XAUI arb
@CLK
Symbols
(312.5)
Lane
injector
Pack
– List
of
bits
@CLK
3.125 GHz
Lane encode
& inject
@CLK
3.125 GHz
IDLE
CB
Generator
Lane encode
& inject
@CLK
3.125 GHz
User interface
Easy interface to connect the component the
global validation environment (The minimum
is to connect the signal map).
 User can monitor & manipulate data using Call
Back function along the data flow.
 The user can use the Config strutre to change
the TB behave.
 The TB give log file (trackers) on the data for
debug use. (Both symbol and packets)

How does it looks
(Specman GUI)
Q&A