Max registers and counters in polylogarithmic time

Max Registers, Counters, and
Monotone Circuits
Keren Censor, Technion
Joint work with:
James Aspnes, Yale University
Hagit Attiya, Technion
January 2010
(Slides 18-21 were added to Keren’s original presentation. DH.)
Counting
2
Counter: reading and incrementing operations
 In sequential algorithms – one variable
 Counting is critical for some programs in
multiprocessing systems

0
2
1

Example: Algorithms for randomized consensus
A single register
3

Does not work even for 2 processes and 2 increments

An increment is not an atomic operation
Register

write(1)
s1
s2
read


write(100) 
...

read
Model of Shared Memory
4
System of n processes
 Communicating through Read/Write registers

R1
R2
read
s1
Rm
…
write(v)
v
s2
…
sn
ok
Model of Distributed Computation
5

Crash failures: a failed process stops taking
steps
 Wait-free
computation: an operation of a process must
work even if all other processes fail

Asynchronous system: no timing assumptions
 No
clocks, no bound on the time between steps
 Schedule (and failures) controlled by an adversary
 Cannot tell whether a process is slow or failed
Model of Distributed Computation
6

Complexity measures:
 Number
of steps per operation
 Amount of space

Local computation has no cost
Counter
7
+1
increment
ok
readCounter
v

Can be implemented using snapshots
in linear time (in n)
Counter
Snapshot-based counter
8

One single-writer register for each process
R1
R2
…
Rn
Increment by updating your register
 Read by reading all the registers
 Non trivial since we require linearizability

Goal and related work
9

Required: Counters with sub-linear (in the number
of processes n) step complexity per operation

Lower bound of Ω(n) for time complexity by

Motivated work on approximate counting
Jayanti, Tan, and Toueg [PODC 1996]
and similar lower bounds by Ellen, Hendler, and
Shavit [FOCS 2005]
[Aspnes and C, SODA 2009]
Exact counting
10
Give up on sub-linear exact counting?
 Or inspect lower bound more carefully:

 Based
on executions with many increments
long operation
 But

some applications use a small number of increments
We show an implementation of a bounded counter
where each operation takes sub-linear time
A tree-based counter
11
Increment: recursively
increment from leaf to root
p1 increments
ReadCounter:
return value at root
∑si
+1
pk reads
update
s1+...+s4
O(log n) steps to increment
O(1)update
steps to read counter
s1+s2
s3+s4
sn-1+sn
update
s1
s2
s3
s4
…
sn
Seems nice, but…
12

If each node is a multi-writer register, then even for
2 processes and 2 increments this does not work
p1 increments
+1
p2 increments
+1
+1
Counter is
incorrect
s1+s2
update 1
update 2
s1
s2
Max register
13

Replace multi-writer registers with Max
Registers
Maximal value
previously
written

WriteMax(v)
ok
ReadMax
v
Max Register
In this case the tree-based counter works
 If
max registers are linearizable then so is counter
A tree-based counter
14
Increment: recursively
increment from leaf to root
ReadCounter:
return value at root
∑si
s1+...+s4
s1+s2
s1
s3+s4
s2
s3
sn-1+sn
s4
…
sn
Max register – recursive construction
15

MaxReg0: Max register that supports only the value 0


WriteMax is a no-op, and ReadMax returns 0
MaxReg0
MaxReg1 supports values in {0,1}
Built from two MaxReg0 objects
 and one additional multi-writer register “switch”

WriteMax
=1
1
0
switch
ReadMax
switch=0 : return 0
switch=1 : return 1
MaxReg0
MaxReg0
Max register – recursive construction
16

MaxRegk supports values in {0,…,2k-1}
Built from two MaxRegk-1 objects with values in {0,…,2k-1-1}
 and one additional multi-writer register “switch”

=1
WriteMax
t
< 2k-1 ?
t
=k-1?
t-2
switch
ReadMax
switch=0 : return t
switch=1 : return t+2k-1
t
MaxRegk-1
t
MaxRegk-1
MaxRegk
MaxRegk unfolded
17
MaxRegk
switch
Complexity does not depend on n:
WriteMax and ReadMax
in O(k) steps
switch
switch
MaxReg0
MaxReg0
switch
MaxReg0
MaxReg0
…
MaxReg0
Pseudocode: WriteMax(r,t)
18
Pseudocode: ReadMax(r)
19
Why is this algorithm linearizable?
20
Three operation types:



Operations on left branch: ReadMax(r) ops that read 0 from
r.switch and WriteMax(r,t) with t<m that read 0 from r.switch
Operations on right branch: ReadMax(r) ops that read 1 from
r.switch and WriteMax(r,t) with tm
Writes with no effect: WriteMax(r,t) ops with t<m that read 1 from
r.switch
Why is this algorithm linearizable? (cont'd)
21
Ordering operations:



Operations on left branch ordered before those on right branch
A Write with no effect linearized at latest possible time within its
execution interval
Operations on left and right branch retain their linearization points
(and are legal by induction hypothesis).
A tree-based counter
22
Increment: recursively
increment from leaf to root
ReadCounter:
return value at root
∑si
m-valued
counter:
s1+...+s4
ReadCounter: O(log m) steps
Increment: O(log n log m) steps
s1+s2
s1
s3+s4
s2
s3
sn-1+sn
s4
…
sn
Analysis
23
Inductive linearizability proof
 No contradiction with lower bound of JTT
because of bounded size of max register and
counter
 Extension to unbounded max registers (and
counters) with complexity according to value
written or read

 Both
WriteMax and ReadMax of value v take
O(min(log v, n)) steps
Unbalanced tree
24
switch
Bentley and Yao [1976]
MaxReg0
switch
switch
MaxReg0
switch
MaxReg0
switch
Leaf i is at
depth O(log i)
switch
MaxReg0
MaxReg0
switch
MaxReg0
MaxReg0
Unbounded max register
25
switch
MaxReg0
switch
WriteMax switch
and ReadMax
of v
switch
in O(min(log v, n)) steps
MaxReg0
MaxReg0
Snapshot-based
counter
Lower bound of min(log m, n-1)
26

Sm = {executions with WriteMax operations up to
value m by p1…,pn-1, followed by one ReadMax
operation by pn}
pn reads

T(m,n) = worst case cost of ReadMax in Sm
Lower bound of min(log m, n-1)
27

No process takes steps after pn so pn does not write
pn reads
R
pn reads



Reads a fixed register R. Did anyone write to R?
k = minimal such that there is a write to R in Sk
No one in Sk-1 writes to R so T(m,n)≥T(k-1,n)+1
Lower bound of min(log m, n-1)
28

In addition, consider a run in Sk that writes to R
write to R by pi
pn reads
R
Finish writes
except by pi
write to R by pi
Execution with writes
R
in {k,…,m}
pn reads
pn returns maximal value from {k,…,m}
T(m,n) ≥ T(m-k+1,n-1)+1 , we had T(m,n)≥T(k-1,n)+1
Solve recurrence:
T(m,n) ≥ 1+ mink {max(T(k-1,n), T(m-k+1,n-1))}
Summary
29
Implementation of max registers with
O(min(log v, n)) steps per operation writing
or reading the value v
 Sub-linear implementation of counters
 Extension of counters to any monotone circuit
with monotone consistency instead of
linearizability

Summary
30

Lower bounds
 An alternative proof for JTT
 Tight lower bound for max registers
 Randomized lower bound
 Further
research: randomized algorithm?
Take-home message:
Lower bounds do not always have the final say