Low jitter PLL design
Jeffrey Prinzie
16-05-2017
Content
• Basic PLL concepts
• Phase noise and jitter
• Noise sources in PLLs
• Phase noise in VCOs
2
Content
• Basic PLL concepts
• Phase noise and jitter
• Noise sources in PLLs
• Phase noise in VCOs
3
Why do we need a PLL?
• Frequency synthesis
PLL
GBT talk
• Clock recovery
PLL
NRZ data
• Jitter filter
PLL
4
Components
• Phase detector: Detects phase difference between
reference clock and feedback clock.
• Loop filter: Filters (and usually integrates) the phase
detector signal and applies it to the VCO
• VCO: Voltage controlled oscillator generates a (high
frequency) clock.
• Divider: Divides the output frequency to the reference
frequency
5
Linear operation of a PLL
• PLL works in the phase domain
Vin=sin(2πfin)
Φin
PLL
xN
Vin=sin(2πfout)
Φout
• Hence we cannot “observe” phase directly
• Phase lock = frequency lock
𝑁𝜙𝑖𝑛 = 𝜙𝑜𝑢𝑡 →
𝑑
𝑑
𝑁𝜙𝑖𝑛 =
𝜙
→ 𝑁𝜔𝑖𝑛 = 𝜔𝑜𝑢𝑡
𝑑𝑡
𝑑𝑡 𝑜𝑢𝑡
6
Linear operation of a PLL
voltage
Phase
phase
𝜔 𝑣𝑖𝑛 = 𝐾𝑣𝑐𝑜 𝑣𝑖𝑛
𝜙𝑜𝑢𝑡 =
Φin
-
Φerr
Φfb
F(s)
Kvco/s
𝜔 𝑣𝑖𝑛 𝑑𝑡 = 𝐾𝑣𝑐𝑜
Φout
𝜙𝑜𝑢𝑡
𝐻(𝑠)
=
𝜙𝑖𝑛
1 + 𝐺(𝑠)
1/N
7
𝑣𝑖𝑛 𝑑𝑡
2nd order PLL
Φin
-
Kpd
Φfb
Kcp(1+s/ωz)
s
Kvco/s
1/N
PD
VCO
DIV
8
Φout
2nd order PLL
Φin
-
Kpd
Φfb
PD
Kcp(1+s/ωz)
s
1/N
VCO
DIV
9
Kvco/s
Φout
2nd order PLL
𝜙𝑜𝑢𝑡
𝜙𝑖𝑛
𝐼𝑐𝑝 1 + 𝑠𝑅𝐶 𝐾𝑣𝑐𝑜
2𝜋
𝑠𝐶
𝑠
=
1 𝐼𝑐𝑝 1 + 𝑠𝑅𝐶 𝐾𝑣𝑐𝑜
1+
𝑁 2𝜋
𝑠𝐶
𝑠
𝐻𝑜𝑙
𝐼𝑐𝑝 𝐾𝑣𝑐𝑜
1 + 𝑠𝑅𝐶
2𝜋𝐶
=
1 𝐼𝑐𝑝 𝐾𝑣𝑐𝑜
1 𝐼𝑐𝑝 𝐾𝑣𝑐𝑜
2
𝑠 +𝑠
𝑅+
𝑁 2𝜋
𝑁 2𝜋𝐶
1 + 𝑠/𝜔𝑧
𝑠2 + 2𝜁𝜔𝑛 𝑠 + 𝜔𝑛2
𝜔𝑛 =
𝜁=
1 𝐼𝑐𝑝 𝐾𝑣𝑐𝑜
𝑁 2𝜋𝐶
𝑅 1 𝐼𝑐𝑝 𝐾𝑣𝑐𝑜
2 𝑁 2𝜋𝐶
10
1 𝐼𝑐𝑝 1 + 𝑠𝑅𝐶 𝐾𝑣𝑐𝑜
𝑠 =
𝑁 2𝜋
𝑠𝐶
𝑠
2nd order PLL
More DC gain makes the PLL more stable!
•Icp/C
•Kvco (usually fixed)
•N (usually fixed)
LF zero makes te PLL more stable
•RC = wz
11
What does this transfer function mean?
• PM modulation is filtered by the PLL
Φin=2π sin(ωm)
PLL
Φout=H(ωm)2π sin(ωm)
• ωm>ωpll → Modulation is suppressed
• ωm<ωpll → Modulation is transferred
• For jittery reference clocks, low BW PLL is preferred!
12
What does this transfer function mean?
Φin=white nosie
PLL
13
Φout/PSDnoise
And the time domain?
• Important for acquisition (during lock)
14
Content
• Basic PLL concepts
• Phase noise and jitter
• Noise sources in PLLs
• Phase noise in VCOs
15
What is jitter?
• Clock edges do not happen at “ideal” times
• Jitter is evaluated in the time domain
• Typically expressed in rms seconds
o
Low noise PLLs down to16 100fs rms
Phase noise
• Time domain jitter does not contain frequency information
𝑉 𝑡 = 𝐴 sin 2πft + ϕn t
ϕn t
= 𝐽𝑖𝑡𝑡𝑒𝑟(𝑡)
2πf
• Phase noise is expressed in the frequency domain
ϕn t
ℱ
ΦN (f)
• Typically expressed in dBc/Hz (dB below carrier)
17
Phase noise
• Relation to voltage noise
V t = A sin 2πft + ϕn t
≈ A sin 2πft + 𝐴 cos 2πft ϕn t
V(f)
A/2
A/2 SΦ(f)
𝑆𝜙 (𝑓)
𝑣𝑛2 𝑓
ℒ 𝑓 = 2
≈
2
𝑣𝑠𝑖𝑔𝑛𝑎𝑙
ω0
f
•
• This can be used to calculate (basic) phase noise in LC
oscillators
ℒ 𝑓 =
𝑉 𝑛
𝑐𝑎𝑟𝑟𝑖𝑒𝑟
18
Phase noise or jitter?
• Both represent the same
• Jitter is typically used in time domain applications
• Phase noise usually important for RF transceivers
• Phase noise is more easy to use in calculations
• If the phase noise transfer function of a noise source is
known, then
𝑆𝜙𝑜𝑢𝑡 = 𝐻2 𝑠 𝑁(𝑓)
19
Content
• Basic PLL concepts
• Phase noise and jitter
• Noise sources in PLLs
• Phase noise in VCOs
20
Types of noise in a PLL
• Random noise
o
Due to thermal or flicker noise in devices
• Spurs
o
Due to periodic signals in the PLL
• Coupling through supply or substrate
o
Due to other circuits, like digital blocks
• Noise from reference clock
21
Random noise
• Each noise source has a noise transfer function
Φin
-
Kpd
(1+s/ωz)
s
Φfb
1/N
• Synchronous noise
Digital logic & buffers
• Accumulating noise
o VCO
o Loop filter
o Charge pump
o
22
Kvco/s
Φout
Random noise
Synchronous noise
• Digital logic is implemented with gates/FFs
Each transition comes with some jitter
• Slew rate and power is required
o Fast circuits have lower jitter
o Typically x0 fs rms range
• If multiple digital blocks are cascaded
o
𝜎𝑡𝑜𝑡 =
𝜎1 + ⋯ + 𝜎𝑁
• A FlipFlop ALWAYS resynchronizes the clock
LOGIC
D
CK
23
Q
Random noise
Loop filter noise
Vn
CP
Kvco/s
Φin
+
-
-
Kpd
𝜙𝑜𝑢𝑡
𝑠 =
𝑣𝑛
𝑃𝑁𝑜𝑢𝑡
𝜔2
𝜔 2 − 𝜔𝑛2 2 + 4𝜁𝜔𝑛2 𝜔 2
+
Vn²=4kTR
Φfb
𝑁𝑇𝐹 𝜔 =
Kcp(1+s/ωz)
s
1/N
𝐾𝑣𝑐𝑜
𝑠 𝐾𝑣𝑐𝑜
𝑠
=
𝐾𝑣𝑐𝑜 𝐼𝑐𝑝 𝑅 𝐾𝑣𝑐𝑜 𝐼𝑐𝑝
1 𝐼𝑐𝑝 1 + 𝑠 𝑅𝐶 𝐾𝑣𝑐𝑜
𝑠2 + 𝑠
+
1+
2𝜋𝑁
2𝜋𝑁 𝐶
2𝜋𝑁
𝑠𝐶
𝑠
𝜙𝑜𝑢𝑡
𝜔 =
𝜔
𝑣𝑛
2
2 𝑁𝑇𝐹 𝜔
𝑣𝑛2 = 2𝑘𝑇𝑅 𝐾𝑣𝑐𝑜
24
Kvco/s
Φout
Random noise
Loop filter noise
Vn
CP
Kvco/s
Φin
+
-
-
Kpd
Kcp(1+s/ωz)
s
+
Kvco/s
Vn²=4kTR
Φfb
1/N
NTF(ω)
𝑃𝑁𝑜𝑢𝑡
2
2𝑘𝑇𝑅𝐾𝑣𝑐𝑜
𝜔 ≈
𝑎𝑏𝑜𝑣𝑒 𝑃𝐿𝐿 𝐵𝑊
2
𝜔
ω
25
Φout
Random noise
𝑃𝑁𝑜𝑢𝑡
Loop filter noise
2
2𝑘𝑇𝑅𝐾𝑣𝑐𝑜
𝜔 ≈
𝑎𝑏𝑜𝑣𝑒 𝑃𝐿𝐿 𝐵𝑊
𝜔2
• Choose R based on area/power budget
• For a given PLL bandwidth, typically:
𝐾𝑣𝑐𝑜 𝐼𝑐𝑝
2𝜋𝑁 𝐶
1
𝑅𝐶
and 𝐾𝑣𝑐𝑜 is given
is given
• Noise can only be reduced by reducing R!
o
o
Increasing C (area)
Increasing Icp (power)
26
Random noise
charge pump noise
CP noise current flows in the filter impedance
In²
Φin
-
Zfilter(s)
Kpd
Φfb
𝜙𝑜𝑢𝑡
𝑠 =
𝑖𝑛
Kcp(1+s/ωz)
s
+
Φout
1/N
𝑠 𝐾𝑣𝑐𝑜
𝐾𝑣𝑐𝑜 𝐼𝑐𝑝 𝑅 𝐾𝑣𝑐𝑜 𝐼𝑐𝑝
𝑠2 + 𝑠
+
2𝜋𝑁
2𝜋𝑁 𝐶
𝜙𝑜𝑢𝑡
2𝜋
𝑠 =
𝑖𝑛
𝐼𝑐𝑝
Kvco/s
𝑖𝑓 𝜔 ≪ 𝜔𝑃𝐿𝐿
27
1 + 𝑠𝑅𝐶
𝑠𝐶
Ztank(s)
Random noise
charge pump noise
• How much is in²?
o
o
Noise from current sources
Also current mirror(α)!
𝑖𝑛 ² = 𝛼 4𝑘𝑇𝛾 𝑔𝑚𝑁 + 𝑔𝑚𝑃
• But … the current is not always on!
o
o
This is cyclostationary noise
But as first approximation
𝑖𝑛 𝑒𝑓𝑓 ² = 𝑖𝑛 ²
𝑇𝑈𝐷
𝑇𝑟𝑒𝑓
28
Tud
UP
DOWN
In
Random noise
VCO noise
• VCO phase noise has 1/f² and 1/f³ shape (continued…)
• PLL “tracks” reference so LF phase noise is suppressed
• VCO phase noise is high-pass shaped
Φ²
Φin
-
Kpd
Φfb
𝜙𝑜𝑢𝑡
𝑠 =
𝜙𝑣𝑐𝑜
1+
1 𝐼𝑐𝑝
2𝜋𝑁
Kcp(1+s/ωz)
s
Kvco/s
+
Φout
1/N
1
𝑠2
=
𝐾𝑣𝑐𝑜 𝐼𝑐𝑝 𝑅 𝐾𝑣𝑐𝑜 𝐼𝑐𝑝
1 + 𝑠 𝑅𝐶 𝐾𝑣𝑐𝑜
𝑠2 + 𝑠
+
2𝜋𝑁
2𝜋𝑁 𝐶
𝑠𝐶
𝑠
29
Random noise
VCO noise
• Above PLL BW, noise is not suppressed
• Below PLL BW, noise is suppressed by ω4
PN(ω)
1/ω³
1/ω²
ω²
ω
30
ω
Random noise
VCO noise
PLLBW >> 1/f³ corner
PLLBW << 1/f³ corner
31
Content
• Basic PLL concepts
• Phase noise and jitter
• Noise sources in PLLs
• Phase noise in VCOs
32
VCOs
• Ring oscillators
• LC-tuned oscillators
• Crystal oscillators
• Relaxation oscillators
33
VCOs
LC tank oscillators
• Based on inductor and capacitor resonance
C
L
𝑍 𝑗𝜔 =
𝑗𝜔𝐿
1 − 𝐿𝐶𝜔 2
• Resonance at ω0
|Z(jω)|
Z(jω)
+90°
ω0
jωL
ω
1/jωC
-90°
ω0
34
ω
VCOs
LC tank oscillators
• Losses in the tank
o
For xGHz frequencies, L is most significant
L
C
Rs
• Calculate equivalent parallel resistance
C
2 2
𝜔
𝐿
2
𝑅𝑃 = 𝑅𝑠 𝑄𝑠 + 1 ≈
𝑅𝑠
L
35
Rp
VCOs
LC tank oscillators
• Loss need to be compensated
o
How? Positive feedback or “negative resistor”
C
L
Rp
-R
• Oscillator oscillators if |-R| < Rp
o
o
1/Gm < Rp
Typically, use a safety factor of 3 for PVT!
36
Gm
-1/gm
VCOs
LC tank oscillators
• Both P- and N-mos active pair
Saves ½ power for same –Gm
• Current through the tank +I and -I
o
I
t
I
C
V
L
t
I
37
2
𝑉 = 𝐼 𝑅𝑝
𝜋
VCOs
Noise
𝑆𝜙 (𝑓)
𝑣𝑛2 𝑓
ℒ 𝑓 = 2
≈
2
𝑣𝑠𝑖𝑔𝑛𝑎𝑙
•
• We know Vsignal², what about vn²?
C
L
Rp
𝑗𝜔𝐿
𝜔0
𝑍 𝑗𝜔 =
≈ 𝑗𝜔0 𝐿
1 − 𝐿𝐶𝜔 2
2∆𝜔
𝑣𝑛2 𝜔0 + ∆𝜔 = 𝑖𝑛 ² 𝑍 𝜔0 + ∆𝜔
In²=4kT/R
NF of the amplifier
Rs
𝜔02 𝐿2 𝜔0 ²
= 4𝑘𝑇 38
(1 + 𝐴)
𝑅𝑝 4∆𝜔²
VCOs
Noise
𝑣𝑛2 𝜔0 + ∆𝜔 = 𝑖𝑛 ² 𝑍 𝜔0 + ∆𝜔
= 𝑘𝑇𝑅𝑠
𝜔0 ²
(1 + 𝐴)
∆𝜔²
• Noise is directly proportional to the series resistance of the
inductor!
• A represents the additional noise of the –Gm amplifier
𝜔02
𝑘𝑇𝑅𝑠
1+𝐴
𝑣𝑛2 𝑓
2
∆𝜔
ℒ 𝑓 = 2
=
2
𝑉𝑎𝑚𝑝𝑙𝑖𝑡𝑢𝑑𝑒
𝑣𝑠𝑖𝑔𝑛𝑎𝑙
2
39
VCOs
Noise
• Smaller Rs = less noise
Implies a smaller inductor but larger capacitor
o Requires larger currents for the same Vamplitude
o Small inductor
• Larger amplitude = less phase noise
o Requires larger currents
o
𝜔02
𝑘𝑇𝑅𝑠
1+𝐴
𝑣𝑛2 𝑓
2
∆𝜔
ℒ 𝑓 = 2
=
2
𝑉𝑎𝑚𝑝𝑙𝑖𝑡𝑢𝑑𝑒
𝑣𝑠𝑖𝑔𝑛𝑎𝑙
2
40
VCOs
Noise
• Region 1
Non optimal amplitude, larger current can provide better
amplitude and smaller phase noise
o Current limited mode
Vtank
3
• Region 3
o Current increase does not
2
increase voltage
o Increased amplifier noise
o Voltage limited mode
• Region 2
1
o Optimal voltage swing
o
41
Itank
VCOs
Noise
• Power aware design
o
o
Tank current is fixed
Smallest inductor for maximum swing
• However, best Q inductor may not match your power
setting but ensures best phase noise for given power
• In a given technology, the best PN/mW occurs for 1
inductor/power combination
42
VCOs
Tail current noise
• LF tail current noise can be upconverted
o
o
Symmetry of the signals is very important
See ISF theory (Hajimiri)
• LF tail current noise modulates DC bias of the tank
• Frequency modulation around carrier
2
𝐾𝑣𝑐𝑜
𝑆 𝜔 = 𝑣𝑛 ² 2
𝜔
Vtune
Vtune
In
43
Summary
• Overview linear operation of a 2nd order PLL
Low pass filter for reference jitter
o High pass filter for VCO noise
• Discussion of different noise sources
o Loop filter
o Charge pump
o Logic
o VCO
• Introduction to noise effects in VCOs
o Reducing Rs reduces the noise
o Operate the VCO with maximum
amplitude
44
o
Thank you
[email protected]