THEORETICAL LIMITS FOR SIGNAL
REFLECTIONS DUE TO INDUCTANCE
FOR ON-CHIP INTERCONNECTIONS
F. Huret, E. Paleczny, P. Kennis
Institut d ’Electronique et de Microélectronique
du Nord, UMR CNRS 9929
D. Deschacht, G. Servel
Laboratoire d’Informatique, de Robotique
et de Microélectronique, UMR CNRS 5506.
SLIP ’2000, San Diego, April 8-9th.
OUTLINE OF THE TALK
Introduction
Theoretical limits
Electromagnetic analysis :
- Methodology
- Application
Limits between RLC and RC models
Illustration of the theoretical limits :
- in frequency-domain
- in time domain
Comparison with previous work
Conclusion
INTRODUCTION
10 years of
evolution
1989
0.7µm, 2 metal layers
 Up to 100,000 devices on a chip
 Typical CPU frequency 50MHz
IC

1999
0.25µm, 6 metal
 Up to 10,000,000 devices on a chip
 Typical CPU frequency 400 MHz

INTRODUCTION
With the continued scaling down of technology,
increased die aera :
* cross-section decreases
* interconnect length increases
interconnections : blocking point
of performances improvement
Introduction of new materials such as Cu
inclusion of inductance ?
INTRODUCTION
Interconnect delay dominates gate delay
in current deep submicronic VLSI circuits.
More accurate interconnect models
and signal propagation characterization are required.
With faster on-chip rise times inductance
is becoming more important.
Electromagnetic analysis is needed.
THEORETICAL LIMITS
Short lines :
Static hypothesis
l
g
30

2
1
 30

Long lines :
A  e  l
Traveling wave
Ae
l
 l
ln x

A

x
THEORETICAL LIMITS
Range of lengths for inductance inclusion :

ln x
l 
15

We have to determine
 : attenuation factor
 : phase factor
x : attenuation coefficient
ELECTROMAGNETIC ANALYSIS
Methodology
INTERCONNECTION = WAVEGUIDE

Full wave analysis

Finite Element Method
Attenuation factor
dB/cm ou Np/cm
Phase factor
rad/cm
Zc Characteristic impedance
Propagation parameters
of the waveguide
ELECTROMAGNETIC ANALYSIS
Methodology
Wire length L
i1
a
v1
i2
  Zc
v2
 cosh(   L )
 v1  
    sinh(   L )
 i1 
Zc

Z c sinh(   L )
  v2 

cosh(   L )   i 2 

    j
i1
i2
Z
b
v1
i1
c
v1
v2
 v1   1
  
 i1   0
Z  v 2 
  
1   i2 
v2
 v1   1
  
 i1   Y
0  v 2 
  
1  i 2 
i2
Y
Definitons of the voltage-current matrices used in this analysis
ELECTROMAGNETIC ANALYSIS
Methodology
Vin(t)
(freq)
(freq) Zc(freq)
+
Vout(t)
Matched Load Impedances
F.F.T.
Vin(freq)
F.F.T.-1
Chain Matrix
* F.F.T = Fast Fourier Transform
Vout(freq)
ELECTROMAGNETIC ANALYSIS
Application
Interconnection geometry and environment
passivation
passivation
0.8 mm
2.4 mm
2.4 mm
M5
M5
M5
SiO2
7.3 mm
0.8 mm
SiO2
7.3 mm
Si bulk 7Wcm 500 mm
1st configuration
2nd configuration
Metal 5 : W=1 mm
T= 1 mm
3rd configuration
Aluminium or Copper
ELECTROMAGNETIC ANALYSIS
Application
Frequency behavior of the attenuation factors
3
Al
2 .5
 (N p/cm)
2
1 .5
1
1 s t c o n fig u ra t io n
2 n d c o n fig u ra t io n
0 .5
3 rd c o n fig u ra t io n
0
0
5
10
15
20
F r e q u e n c y (G H Z)
25
30
2
Cu
1 .8
1 .6
 (N p/cm)
1 .4
1 .2
1
0 .8
0 .6
1 s t c o n fig u ra t io n
0 .4
2 n d c o n fig u ra t io n
0 .2
3 rd c o n fig u ra t io n
0
0
5
10
15
20
F r e q u e n c y (G H Z)
25
30
ELECTROMAGNETIC ANALYSIS
Application
Frequency behavior of the phase factors
20
Al
18
16
 (rad/cm)
14
12
10
8
6
1 s t c o n fig u ra t io n
4
2 n d c o n fig u ra t io n
2
3 rd c o n fig u ra t io n
0
0
5
10
15
20
F r e q u e n c y (G H Z)
25
30
20
Cu
18
16
 (rad/cm)
14
12
10
8
6
1 s t c o n fig u ra t io n
4
2 n d c o n fig u ra t io n
2
3 rd c o n fig u ra t io n
0
0
5
10
15
20
F r e q u e n c y (G H Z)
25
30
ELECTROMAGNETIC ANALYSIS
Application
Attenuation determination
A  e  l 
Traveling wave
40
25
Al
1 s t c o n fig u ra t io n
35
2 n d c o n fig u ra t io n
30
2 n d c o n fig u ra t io n
20
3 rd c o n fig u ra t io n
25
20
15
10
Cu
1 s t c o n fig u ra t io n
Atte nuation v alue
Atte nuation v alue
A
x
3 rd c o n fig u ra t io n
15
10
5
5
0
0
0
5
10
L e n g th (mm)
15
20
0
5
10
L e n g th (mm)
15
Attenuation value of the wave, for 10 GHz,
versus interconnection length
20
ELECTROMAGNETIC ANALYSIS
Application
Theoretical limits :

ln x
l 
15

We have determined  
To determine x :
comparison output signal
between RC and RLCG models
OUTLINE OF THE TALK
Introduction
Theoretical limits
Electromagnetic analysis :
- Methodology
- Application
Limits between RLC and RC models
Illustration of the theoretical limits :
- in frequency-domain
- in time domain
Conclusion
LIMIT BETWEEN
RLC AND RC MODELS
The RLCG line model deduced from the electromagnetic analysis :
    j.  ( R  j.L. ).(G  j.C. )
R  j.L.
G  j.C.
1800
C (fF/cm)
Zc 
1600
1st configuration
1400
2nd configuration
1200
3rd configuration
1000
800
600
400
200
0
0
5
10
15
20
25
30
Frequency (GHZ)
35
40
45
LIMIT BETWEEN
RLC AND RC MODELS
These calculated values are used to build the distributed  RC model
Rline
n
Cline
2.n
Cline
n
n cells
COMPARISON BETWEEN :
HSPICE simulations : RC model
Electromagnetic analysis : RLC model
LIMIT BETWEEN
RLC AND RC MODELS
Waveform of input and output signals
in the range of lengths with inductance effect
LIMIT BETWEEN
RLC AND RC MODELS
Waveform of input and output signals
in the range of lengths with inductance effect
LIMIT BETWEEN
RLC AND RC MODELS
Attenuation determination :
Limit : the amplitude of the reflected wave is
sufficiently low to give the reflection effect negligible
1
st
s tru c tu re - L =1 0 m m - A l
1
3 .5
3 .5
st
s tru c tu re - L =1 6 m m - C u
Inp ut sig na l
3
O up ut R C m o d e l
O utp ut R L C M o d e l
2
1 .5
1
O up ut R C m o d e l
O utp ut R L C M o d e l
2 .5
V o ltag e (V )
2 .5
V o lta g e (V )
Inp ut S ig na l
3
2
1 .5
1
0 .5
0 .5
0
0
0
100
200
300
T im e (p s )
400
500
600
0
100
200
300
400
T im e (p s )
500
600
700
800
OUTLINE OF THE TALK
Theoretical limits :

ln x
l 
15

We have determined   x
Illustration of the theoretical limits :
- in frequency-domain
- in time domain
ILLUSTRATION OF
THEORETICAL LIMITS
in the frequency-domain
Aluminium
Aluminium
60
3
1st configuration
1st configuration
2nd configuration
50
2nd configuration
3rd configuration
3rd configuration
2
Upper limit (mm)
Lower limit (mm)
2,5
1,5
1
40
30
20
10
0,5
0
0
0
5
10
15
20
25
0
30
5
Frequency (GHz)
10
15
Frequency (GHz)
Copper
3
20
1st configuration
1st configuration
2nd configuration
2nd configuration
50
Upper limit (mm)
3rd configuration
Lower limit (mm)
30
Copper
60
2,5
25
2
1,5
1
3rd configuration
40
30
20
10
0,5
0
0
0
5
10
15
Frequency (GHz)
20
25
30
0
5
10
15
Frequency (GHz)
20
25
30
ILLUSTRATION OF
THEORETICAL LIMITS
in the frequency-domain
Frequency
Time domain
f 
1
tr
1
3
0,9
2,5
2
0,8
2
3
Voltage (V)
1
Relative module
4
1,5
0,7
0,6
1
0,5
0,5
0
0,4
0
0,3
100
200
300
Time (ps)
400
500
0,2
0,1
0
0
5
10
15
20
25
30
Frequency (GHz)
35
40
45
50
ILLUSTRATION OF
THEORETICAL LIMITS
in the time-domain
Aluminium
1.4
Aluminium
30
2nd configuration
1
3rd configuration
1st configuration
2nd configuration
25
Upper limit (mm)
Lower limit (mm)
1st configuration
1.2
0.8
0.6
0.4
3rd configuration
20
15
10
5
0.2
0
0
0
50
100
150
200
250
300
0
350
20
40
60
80
Copper
1.6
160
180
200
30
3rd configuration
Upper limit (mm)
Lower limit (mm)
140
35
2nd configuration
1.2
120
Copper
40
1st configuration
1.4
100
tr (ps)
tr (ps)
1
0.8
0.6
0.4
25
20
15
1st configuration
10
2nd configuration
5
0.2
3rd configuration
0
0
0
50
100
150
tr (ps)
200
250
300
350
0
20
40
60
80
100
tr (ps)
120
140
160
180
200
OUTLINE OF THE TALK
Introduction
Theoretical limits
Electromagnetic analysis :
- Methodology
- Application
Limits between RLC and RC models
Illustration of the theoretical limits :
- in frequency-domain
- in time domain
Comparison with previous work
Conclusion
COMPARISON
WITH PREVIOUS WORK
« Figures of Merit to characterize the Importance of On-chip Inductance »
DAC 98, June 1998
The two figures of merit can be combined into a two sided inequality
that determines the range of the length of interconnect in which
inductance effects are significant :
tr
2 L
l  
R C
2  L.C
1st configuration :
2nd configuration :
R = 17300 W/m
C = 170 pF/m
L = 490 nH/m
G#0
R = 17300 W/m
C = 63.6 pF/m
L = 655 nH/m
G#0
COMPARISON
WITH PREVIOUS WORK
1st configuration - Copper
25
1st configuration - L=1mm - Cu
4
Vin
3,5
Vout
20
3
15
Voltage (V)
Limit (mm)
Upper limit
Lower limit
DAC Limit
10
2,5
2
1,5
5
1
0,5
0
0
20
40
60
80
100
120
140
160
180
200
0
tr (ps)
0
50
st
1 configuration - L=2mm - Cu
4
Vin
Vout
3
2,5
3
1,5
200
250
300
Vin
3,5
2
150
Time (ps)
1st configuration - L=10mm - Cu
4
Voltage (V)
Voltage (V)
3,5
100
Vout
2,5
2
1
1,5
0,5
1
0,5
0
0
50
100
Time (ps)
150
200
250
0
0
100
200
Time (ps)
300
400
500
COMPARISON
WITH PREVIOUS WORK
2nd configuration - Copper
40
2
4
nd
configuration - L=2mm - Cu
Vin
3,5
30
Upper limit
25
Lower limit
Voltage (V)
Limit (mm)
35
3
2,5
DAC Limit
20
15
2
1,5
10
1
5
0,5
0
0
20
40
60
80
100
120
140
160
180
0
200
0
tr (ps)
50
2nd configuration - L=15mm - Cu
4
3,5
100
Time (ps)
150
200
250
2nd configuration - L=25mm - Cu
4
Vin
Vin
Vout
3,5
3
Vout
3
Voltage (V)
Voltage (V)
Vout
2,5
2
1,5
2,5
2
1,5
1
1
0,5
0,5
0
0
50
100
150
200
Time (ps)
250
300
350
400
0
0
100
200
300
400
Time (ps)
500
600
700
800
CONCLUSION
A full-wave electromagnetic analysis have been presented
to build accurate interconnect models,
including inductance effects.
New limits for signal reflections due to inductance
for on-chip interconnections have been proposed.
CONCLUSION
These limits have been illustrated
with typical interconnection geometries,
for Al and Cu wires.
This study shows evidence demonstrating that a range
exists for which inductance effects cannot be neglected
and requires a transmission line model.
CONCLUSION
FUTURE WORK :
Interconnect coupling : taking into account
not only the coupling capacitance, but also
the impact of inductance and mutual inductance.