Chapter 9
Computer Design Basics
9-2 Datapaths

Reminding
A digital system (or a simple computer)
contains datapath unit and control
unit.
 Datapath:

• A set of registers
• Microoperations on these registers
• Control interface
9-2 Datapaths



The arithmetic/logic unit (ALU) and
shifter are designed to perform the
microoperations (arithmetic and logic).
Shifter is often separated from ALU for
shift operation, but sometimes is
implemented in ALU.
The combination of a set of registers
with a shared ALU and shifter and
interconnecting path is the datapath of
the system.
Block diagram
of a generic
datapath (Fig.
9-1)
G select: S 2..0||Cin
Symbol for an n-bit ALU
(Fig. 9-2)
Requirements for ALU and
Shifter



The sets of values must be generated and
must become available on the corresponding
control lines early in the clock cycle.
Binary data from the two source registers must
be propagated through the multiplexers and
the ALU and on into the inputs of the
destination register, all during the remainder of
the same clock.
To achieve fast operations, ALU and shifter are
constructed with combinational logic having
limited number of levels.
9-3 The ALU

This section introduction the design of ALU

The basic component of an arithmetic circuit is a parallel adder
Fig. 9-3 Block diagram of an arithmetic circuit
Function of arithmetic circuit
G = X+Y+Cin
B input logic
The B input logic in Fig. 9-3 can be
implemented with n-bits 4-to-1 multiplexer
(How?).
 To reduce the gates number, it can be
implemented through logic design of one
bit (one stage) instead of using multiplexer.

B input logic
 logic design for B input logic (one stage)
Yi  Bi S0  Bi S1
Diagram of a 4-bit arithmetic
circuit (Fig. 9-5)
Logic Circuit Design
Fig 9-6 One stage of logic circuit
One stage of ALU (Fig. 9-7)
Gi
Function Table of ALU
(Table 9-2)
9-4 The Shifter


one bit is shifted in a clock
To shift an operant by m>1 bit positions, the shifter should
perform a series of m 1-bit position shift, taking m clock
cycle
 What is the operation when S is set as 00 (0), 01(1), 10 (2)?
Fig. 9-8
Barrel shifter


A combinational circuit
Shifts or rotates the input data by the number of bit
position specified by a binary value
4-bit Barrel shifter (Fig. 9-9)
Note: i positions of left rotation is the same
as 2n-i bits of right rotation
9-5 Datapath representation
Reduce the complexity of the
datapath in Fig. 9-1
 A computer with 32 or more registers
are common
 Register file: a set of registers having
common microoperations performed
on them

Datapath using register file and function unit
(Fig. 9-10)
Function select
 MF, G and H are
coded in terms
of FS
MF=F3.F2,
G3=F3, G2=F2,
G1=F1, G0=F0,
H1=F1, H0=F0