Nano-HEMTs Fabricated by utilizing Nebased Atomic Layer Etching Dong-Hyun Kim S.H. Shin1, T.W. Kim1, J.I. Song1, G.Y. Yeom2, and J.H. Jang1 High Mesa Waveguide Gwangju Institute of Science & Technology Department of Information & Communications Department of Materials Science and Engineering Gwangju Institute of S cience and Technology SKKU 1 Department of Information and Communications Outline Introduction 1. High speed electronic devices 2. Key fabrication processes for Nano-HEMTs 3. Two step recess technology employing atomic layer etching Atomic Layer Etching 9 Properties of the etched surface (Selectivity, XPS, and AFM) 9 Characteristics of Vertical Schottky Diodes DC and RF Characteristics of Nano-HEMTs 9 Depletion-mode InAs Composite Channel p-HEMTs 9 Enhancement-mode InAs Composite Channel pHEMTs Conclusions Gwangju Institute of Science and Technology Department of Information and Communications 2 Overview of Ultra-fast Electronic Devices State of the Art Electronic Devices Record High fT of III-V HEMTs 700 800 600 Cutoff frequency fT (GHz) III-V HBTs Cutoff Frequency [GHz] 628 GHz for 30-nm p-HEMTs IEEE EDL, 2008 610 GHz for 15-nm p-HEMTs IEEE IEDM, 2007 InP-based HEMT III-V HEMTs 400 200 SiGe HBTs 0 1985 1990 600 562 GHz for 25-nm P-HEMTs IEEE EDL, 23, 573 547 GHz for 30-nm P-HEMTs 500 IEEE EDL, 25, 241 472 GHz for 30-nm LM-HEMTs JJAP, 41, 4B, 437 400 GHz for 45-nm P-HEMT 400 IEEE EDL, 22, 507 Si CMOS 1995 2000 2005 2010 Year 2000 2002 2004 Year < Ref. : Shinohara et al. (IPRM 2004) > Gwangju Institute of Science and Technology Department of Information and Communications 300 1998 3 2006 2008 Gate Recess: Critical Process for NanoHEMT Two-step recess for HEMT fabrication • 1st step: wet etch Æn+ InGaAs/InAlAs multi-layer cap removal • 2nd step: dry etch Æ InP etch stop layer removal: • Ar-based RIE (Conventional) • or Ne-based atomic layer etching (ALET) Ar-based plasma & ALET Wet etching ZEP InP Cap Insulator ZEP InP Cap Insulator Channel Channel Buffer Buffer <Ref: Suemitsu et al. (IEDM 98)> • Problems of Conventional Ar-based RIE • Low etch selectivity • Electrical & physical damage: Å Ion bombardment Gwangju Institute of Science and Technology Department of Information and Communications 4 Atomic Layer Etching Technique (ALET) Cl2 gas InP layer Reactant Feed Reactant molecules adsorb onto a substrate surface. The etchant does not spontaneously etch the substrate. Ne neutron-beam Reactant Purge Excess reactant is purged Beam Irradiation Product Purge An energetic beam irradiates the surface, and surface atoms bonded with reactant are etched off owing to beaminduced chemical etching. Etching products are purged after which one cycle of digital etching is completed The expected advantages of Ne-based ALET over Ar-based RIE • The higher etch selectivity (ALET) • The lower electrical & physical damage Å Low energy neutral beam Gwangju Institute of Science and Technology Department of Information and Communications 5 Etching Property of ALET Selectivity of InP over In0.52Al0.48As 300 InP Bulk InP (80 Å )/InAlAs Epitaxial Structure 250 , , , 1.2 As/InAl ratio 200 150 100 50 Reference Atomic Layer Etching Reactive Ion Etching 1.5 1.2 0.9 0.9 0.6 0.6 0.3 0.3 0 0 50 100 150 200 0.0 20 40 take-off angle Number of Etch Cycles Very high selectivity of InP over InAlAs (~70) cf) Ar-based RIE (~20) Minimal surface modification Gwangju Institute of Science and Technology Department of Information and Communications 60 6 80 0.0 100 Al/In ratio Etch Depth ( Å ) 1.5 Composition of In0.52Al0.48As surface Surface Roughness AFM image Wet etching RIE ALET 7.77 Å 2.97 Å 1.37 Å The smallest rms roughness achieved by ALET process Gwangju Institute of Science and Technology Department of Information and Communications 7 Vertical Schottky Diode 0 ALET RIE 10 Ti/Pt/Au -2 2 I [ mA/mm ] 10 In0.52Al0.48As 3000Å N-type InP sub. Ni/Ge/Au -4 10 -6 10 -8 10 -10 10 -12 10 -1.0 -0.8 -0.6 -0.4 -0.2 0.0 V [V] RIE: ΦB = 0.56 eV, η = 1.25 Î ALET: ΦB = 0.64 eV, η = 1.17 Gwangju Institute of Science and Technology Department of Information and Communications 8 0.2 0.4 0.6 0.8 The Fabricated Devices Gwangju Institute of Science and Technology Department of Information and Communications 9 60-nm Depletion-Mode p-HEMTs DC Characteristics 500 0.4V ALET RIE 0.1V 200 0V 100 IDS [ mA / mm ] 0.2V 300 0.1 0.2 0.3 0.4 VDS [ V ] 600 400 0 -0.8 0.5 800 200 100 -0.2V 1000 300 -0.1V 0 0.0 ALET RIE 400 0.3V 1200 200 VDS=0.5V -0.6 GM [ mS / mm ] IDS [ mA / mm ] 400 500 -0.4 -0.2 0.0 0.2 0 VGS [ V ] •GM,Max of the p-HEMTs fabricated by the ALET process was larger than that of the p-HEMT fabricated by the Ar-based RIE by 21% →much lower plasma-induced damage characteristics of the ALET process Gwangju Institute of Science and Technology Department of Information and Communications 10 60-nm Depletion-Mode HEMTs RF Characteristics 60 50 ALET RIE H21 [ dB ] 40 30 20 10 VGS=0.05V,VDS=0.5V 0 1E8 1E9 fT=355GHz 1E10 Frequency [ Hz ] Gwangju Institute of Science and Technology Department of Information and Communications 11 1E11 398GHz 1E12 Enhancement-mode HEMT (EHEMTs) E-HEMTs were fabricated by utilizing buried-Pt gate • Gate metal stack: Pt(6 nm)/Ti/Pt/Au • Post-annealing was carried out to drive Pt into InAlAs 40 1600 500 1.0 Current gain H21 E-HEMT Unilateral gain Ug 200 400 100 0 -0.6 VDS = 0.5V -0.4 -0.2 0.0 0.2 0.4 20 0.4 fmax = 470 GHz 10 0.2 VGS =0.4 V, VDS = 0.6 V 1 10 fT = 403 GHz 100 Frequency [GHz] VGS [ V ] •VT = 0.07 V •FT of 403 GHz •Higher fT than D-HEMTs •ALET: gM,max = 1.38 S/mm •RIE: gM,max = 1.1 S/mm Gwangju Institute of Science and Technology Department of Information and Communications 0.6 0 0 0.6 12 0.8 K 800 Gain [dB] 300 MAG/MSG Stability factor K 30 1200 GM [ mS / mm ] IDS [ mA / mm ] 400 0.0 1000 Conclusions The effect of ALET in the two-step gate recess process • Higher InP etch selectivity against the underlying In0.52Al0.48As barrier layer Æ Better uniformity of device characteristics 9Less plasma-induced damage compared to conventional Arbased RIE process 9The smoother etched surface Æ Better gate diode characteristics The higher transconductance The lower subthreshold slope Buried Pt gate • The thinner effective Schottky layer thickness Æ Alleviation of short channel effect Æ Better gate modulation characteristics • The higher Schottky barrier height due to the annealed Pt Æ Positive shift of threshold voltage Æ The smaller gate leakage current Gwangju Institute of Science and Technology Department of Information and Communications 13 Other Interesting Stuffs !!! Ring resonator based Optical Filters and Biosensors Oxide Thin Film Transistors Gwangju Institute of Science and Technology Department of Information and Communications 14 Single Photon Detectors Thank You!! Gwangju Institute of Science & Technology Department of Information & Communications Gwangju Institute of Science and Technology Department of Information and Communications 15
© Copyright 2026 Paperzz