Fast nanoimprint lithography simulation for
process design  Hayden Taylor, UC Berkeley
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Resist
Substrate
Stamp’s load response
(bending, indentation)2
0
1
Density
Silicon
165
99
(nm)
10
Resist
0.5
Elastomer
103
102
Stamp
deflections
101
101 102 103 104
Simulation
size, N

Residual
thickness
Can ‘dummy fill’ accelerate
N
(RLT) nonuniformity
Stamp
Pattern abstraction
1
Simulations need to
Example questions:
be highly scalable
Stamp
Does changing
stamp material affect
Resist
~O(N2logN)
4
1,2
10
residual layer uniformity?
Wafer
Time (s)
Resist surface’s
impulse response
3
4
stamp cavity filling? 3
92
 Incomplete cavity filling
 At least 103 times
 Lateral resist flow
than FEM
 RLT faster
homogenization
 Can balance spatial
resolution and speed
Taylor NNT 2009, 2011; 2 Taylor SPIE 7641 2010; 3 Boning et al. NNT 2010
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