LiFePO4 Formula Hybrid Charger
Final Design Report
Design Team #09
Kevin Friedman
Michael Shepard
Jiaming Zhou
Faculty Advisors
Dr. Elbuluk
Dr. Madanayake
Date Submitted
11/29/2011
The University of Akron
Electrical and Computer Engineering Department
TABLE OF CONTENTS
LIST OF FIGURES .....................................................................................................ii ABSTRACT (MS) ........................................................................................................ 1 1. PROBLEM STATEMENT ............................................................................... 2 1.1 NEED (JZ).......................................................................................................... 2 1.2 OBJECTIVE (KV) ........................................................................................... 2 1.3 BACKGROUND (ALL) ................................................................................... 2 1.4 MARKETING REQUIREMENTS (ALL) ...................................................... 5 1.5 OBJECTIVE TREE (JZ) .................................................................................. 6 2 DESIGN REQUIREMENT SPECIFICATIONS (ALL) ............................... 6 3 ACCEPTED TECHNICAL DESIGN ............................................................. 8 3.1 HARDWARE ..................................................................................................... 8 3.1.1 HARDWARE LV 0 (JZ) ................................................................................... 8 3.1.2 HARDWARE LEVEL 1 (JZ) ........................................................................... 9 3.1.3 HARDWARE LEVEL 2/SCHEMATICS (MS)............................................ 11 3.2 SOFTWARE (KF) ........................................................................................... 39 3.2.1 CONTROLLER AREA NETWORK ............................................................ 39 3.2.2 SOFTWARE LEVEL 0 (KF) ......................................................................... 41 3.2.3 SOFTWARE LEVEL 1 (KF) ......................................................................... 42 3.2.4 SOFTWARE FLOWCHART (KF) ............................................................... 46 3.2.5 SOFTWARE PWM GENERATOR PSEUDO CODE (MS) ....................... 46 3.2.5 MECHANICAL DRAWINGS (KF) .............................................................. 48 4. PARTS LIST .................................................................................................... 49 5. PROJECT SCHEDULES ............................................................................... 50 5.1 FINAL GANTT CHART (JZ,MS)................................................................. 50 5.2 IMPLEMENTATION GANTT CHART (KV,JZ) ....................................... 52 6. DESIGN TEAM INFORMATION (JZ)........................................................ 53 7. CONCLUSION (ALL) .................................................................................... 53 8. REFERENCES ................................................................................................ 53 i
LIST OF FIGURES
Figure 1: Internal Structure of a LiFePO4 Battery (Internal). ........................................................... 3 Figure 2: Objective Tree of the LiFePO4 Charging System. ............................................................. 6 Figure 3: Level 0 Hardware Block Diagram. .................................................................................... 8 Figure 4: Level 1 Hardware Block Diagram. .................................................................................... 9 Figure 5: Level 2 Hardware (AC/DC Converter) Block Diagram. ................................................. 11 Figure 6: Schematic of the GFI circuit. ........................................................................................... 12 Figure 7: Simulation output of The GFI circuit at a leakage current of 15mA. .............................. 14 Figure 8: Voltage waveform of power input. .................................................................................. 14 Figure 9: Rectifier and Filter Schematic. ........................................................................................ 15 Figure 10: Rectifier and Filter Simulation. ..................................................................................... 16 Figure 11: Schematic of Relay/Fuse Circuit. .................................................................................. 16 Figure 12: Level 2 Hardware (Charger) Block Diagram. ............................................................... 18 Figure 13: Equivalent circuit of a LiFePO4 battery cell. ................................................................. 19 Figure 14: Current, voltage, and state of charge during charging process ...................................... 20 Figure 15: Topology of the buck converter. .................................................................................... 22 Figure 16: Schematic of the buck converter.................................................................................... 24 Figure 17: Simulation Output of the Buck Converter. .................................................................... 24 Figure 18: PWM Generator Circuit ................................................................................................. 25 Figure 19: Current Sensing Circuit. ................................................................................................ 25 Figure 20:Hall Effect Sensor Output Voltage versus Sensed Current(at 77°F). ............................. 26 Figure 21: Level 2 Hardware (Controller) Block Diagram. ............................................................ 27 Figure 22: Controller Hardware. ..................................................................................................... 29 Figure 23: Voltage and current waveform of the buck converter inductor. .................................... 30 Figure 24: Block diagram of the buck converter model.................................................................. 31 Figure 25: Root locus plot of the plant transfer function. ............................................................... 32 Figure 26: Frequency response of the closed-loop system.............................................................. 33 Figure 27: Step response of the closed-loop system. ...................................................................... 33 Figure 28: Implementation of the control system. .......................................................................... 34 Figure 29: LabVIEW block diagram of closed loop controller....................................................... 35 Figure 30: Complete Battery Charger Schematic............................................................................ 37 Figure 31: Level 0 Software Block Diagram .................................................................................. 41 Figure 32: Level 1 Software Block Diagram .................................................................................. 42 Figure 33: National Instruments Devices ........................................................................................ 44 Figure 34: Software Flowchart ........................................................................................................ 46 Figure 35: Mechanical Drawing (Enclosed) ................................................................................... 48 Figure 36: Mechanical Drawing (Exploded) ................................................................................... 48 ii
LIST OF TABLES
Table 1: Technical Specification of a typical LiFePO4 Battery. ....................................................... 3 Table 2: Cell Count Table. ................................................................................................................ 4 Table 3: Battery Cell Charging Properties. ....................................................................................... 4 Table 4: Level 0 Hardware Modules. ................................................................................................ 8 Table 5: Level 1 Hardware Modules. ................................................................................................ 9 Table 6: Level 2 Hardware (AC/DC Converter) Modules. ............................................................. 11 Table 7: Cell Count Table. .............................................................................................................. 17 Table 8: Level 2 Hardware (Charger) Modules. ............................................................................. 18 Table 9: Measurement of internal resistance of the battery cell...................................................... 20 Table 10: Theoretical output voltage and duty ratio at different battery voltages. ......................... 25 Table 11: Level 2 Hardware (Controller) Modules. ........................................................................ 27 Table 12: Parts list for the proposed battery charger....................................................................... 38 Table 13: Level 0 Software Modules .............................................................................................. 41 Table 14: Level 1 Software Modules .............................................................................................. 42 Table 15: Budget for the proposed battery charger. ........................................................................ 49 Table 16: Midterm Gantt Chart ....................................................................................................... 50 Table 17: Implementation Gantt chart............................................................................................. 52 iii
ABSTRACT (MS)
A design is presented for a lithium iron phosphate (LiFePO4) battery charger for a hybrid
vehicle to be entered into the SAE Formula Hybrid International Competition at
Dartmouth. The charger is designed to protect the user from potential hazards such as
electric shock in addition to protecting the LiFePO4 battery cells themselves from damage
due to overheating or over charging. The goal is to provide an easier and safer charge for
the hybrid battery cells than a typical, “off the shelf” battery charger which simply charges
without regard to individual cell status.
Key Features:
•
Connects to the Controller Area Network on the vehicle
•
Automatically shuts off during charger or battery faults
•
Displays battery status via user interface
•
Uses standard 120V input
•
Portable
•
Simple to use with intuitive interface
1
1.
PROBLEM STATEMENT
1.1
NEED (JZ)
The University of Akron will be competing in the 2012 SAE Formula Hybrid
competition. The chassis will be constructed by a team of mechanical engineers. The
electrical and electronics system was designed by a team of 2011 Akron graduates. The
battery pack is the only power supply of the vehicle, and so a specially designed charging
system which monitors the individual cells in the battery pack is needed to ensure safety
and reliability in the charging process.
1.2
OBJECTIVE (KV)
The objective of this project is to implement a system which will charge a multi-
cell battery pack while monitoring each individual cell’s voltage and temperature. Each
cell must have protection to prevent overcharging and overheating with the capability of
disconnecting from the circuit in the case of a critical fault. This will maximize the cycle
life of batteries, which is essentially the number of times they can be recharged before
needing replaced. The system must display information on temperature, current, and
voltage to the user. Controller Area Network (CAN) is the standard communication
network used for the devices of the hybrid electric vehicle. The charging system must
convert this data into a form easily viewable by any casual user able to read a simple
display.
1.3
BACKGROUND (ALL)
The SAE Formula Hybrid Competition is an engineering and design challenge for
undergraduate and graduate level students. Over the last few years several teams at Akron
have worked on a formula hybrid car. The car designed for the 2012 competition uses
LiFePO4 rechargeable batteries. The 2012 formula hybrid team is planning to race an
electric-only vehicle and therefore needs a charger that is able to charge these batteries
(Formula).
According to the 2012 formula hybrid rules the charger must derive its power from a
120V outlet and deliver power to a high voltage battery bank through a connector meeting
the SAE J1772 standard. For safety reasons the rules also state that high voltage
2
conductors (Voltage exceeding 30V) must be covered to prevent an electrical hazard. In
addition to the formula hybrid requirements, this charger also needs to have a system that
prevents the overcharging of batteries based on the data collected from the CAN bus.
Figure 1: Internal Structure of a LiFePO4 Battery (Internal).
Table 1: Technical Specification of a typical LiFePO4 Battery.
Nominal Voltage
Energy Density
Charge Rating
Discharge Rating
Charging Voltage
Discharge Cut-Off Voltage
Cycle Life
Memory Effect
3
3.2V
130mAh/g
0.2-1.5C
0.5-10C
3.6V
2.0V
>95%
500 Times
No
The time it takes to charge is an important issue for the formula hybrid since it may have
to be charged during competition. The amount of time it takes for the batteries to charge is
found by
!
!= ,
!
where C is the current rating of the battery cells and I is the current supplied to the
battery pack in Amperes. The total time required to charge the bank of batteries depends
on the power supply and battery ratings. The total power delivered by the bank of batteries
is listed in Error! Not a valid bookmark self-reference.. The time required to charge for
various charge currents is listed in
Table 3.
Table 2: Cell Count Table.
1C
Rating
C/20
Rating
60A
20A
Nominal
Voltage
(per cell)
3.3V
# of cells
24
Total
Nominal
Voltage
79.2V
Total WH
5227.2
Total W-H
for charge
(10% loss)
5749.92
Table 3: Battery Cell Charging Properties.
Input Current [A] 10 11 12 13 14 15 16 17 18 19 20 Time to reach 100% Time to reach 75% charge [Hours] charge [Hours] 6.00 5.45 5.00 4.62 4.29 4.00 3.75 3.53 3.33 3.16 3.00 Time to reach 50% charge [Hours] 4.50 4.09 3.75 3.46 3.21 3.00 2.81 2.65 2.50 2.37 2.25 3.00 2.73 2.50 2.31 2.14 2.00 1.88 1.76 1.67 1.58 1.50 The LiFePO4 battery has advantages as well as disadvantages. Typical parameters are
4
included in Table 1. This battery chemistry has advantages over a typical lithium-ion
battery, which is why it was chosen for this application. The LiFePO4 battery is thermally
and chemically more stable and has a longer cycle life than typical lithium-ion batteries.
These cells are low in cost and contain no toxic elements. The discharge current is high
enough to motivate the induction motor of the hybrid car. The disadvantage is that the
parameters of each cell vary from one to the next due to the manufacturing process. This
means that the cells will all charge at different rates in a bank, so a unique charger is
required for this application (Building Safer).
The battery’s total cycle life can be affected by two major factors: the battery cell
voltage and the battery cell temperature during charging. While charging, it is critical that
the battery voltage not exceed 4.0V and the cell temperature not exceed its maximum
rating. These two parameters can be lowered by decreasing the charging current going to
the battery cells. A “smart” battery charger that prevents these adverse operating
conditions will allow the batteries to be used much longer in the vehicle, thus saving costs.
1.4
MARKETING REQUIREMENTS (ALL)
The charging system should:
●
Charge the battery-pack in a reasonably short time.
●
Be able to monitor each single cell.
●
Include user safety features to prevent electric shock
●
Feedback the fault information of the battery.
●
Be compatible with the CAN network.
●
Have a user friendly output display and input device.
●
Be small and easy to move.
●
Use a normal residential AC power supply.
●
Maximize battery life cycles.
●
Be disconnected automatically when critical fault occurs
5
1.5
OBJECTIVE TREE (JZ)
Figure 2: Objective Tree of the LiFePO4 Charging System.
2
DESIGN REQUIREMENT SPECIFICATIONS (ALL)
Marketing
Engineering Requirements
Justification
Requirements
1 Must charge 75% of the battery in less During the competition, quick
than 4 hours.
battery charge times are needed.
2,5,6 The user display must in decimal A user should not have to decode
number
format
using
proper CAN data to be able to read and
engineering units for voltage, current use the charger.
and temperature levels.
9 The charger must reduce the output If the current is more than 1A
current to 1A once a single battery when the Cell reaches 3.9V, the
cell reaches 3.9V and is shunted by battery risks overcharging.
the battery controller.
6
8 The charger must accept a 120V AC, This is a standard rating for
15A power input.
residential outlets.
7 The entire charger must be movable The charger will need to be
by a single person and have simple moved with the vehicle in order
connections to the car/ power source.
to charge its batteries.
9,10 The charger must remove all power to One second should be enough
the battery within 1 second during a time for even a very slow relay
fault or over-current situation.
to trip and disconnect power.
3 The charger must contain a 20A fuse These safety features greatly
and a GFI be able to detect a leakage reduce the risk of electric shock.
current of at least 15mA.
4,6 The charger must display specific Specific errors allow the user
errors including loss of CAN signal, some
insight
into
why
over-current, over-temperature, and charger is not operating.
GFI fault.
Marketing Requirements
1.
Charge the battery-pack in a reasonably short time.
2.
Be able to monitor each single cell.
3.
Include user safety features to prevent electric shock.
4.
Feedback the fault information of the battery.
5.
Be compatible with the CAN network.
6.
Have a user friendly output display and input device.
7.
Be small and easy to move.
8.
Use a normal residential AC power supply.
9.
Maximize battery life cycles.
10. Be disconnected automatically when critical fault occurs.
7
the
3
ACCEPTED TECHNICAL DESIGN
3.1
HARDWARE
3.1.1
HARDWARE LV 0 (JZ)
Hardware Block Diagram (level 0)
Figure 3: Level 0 Hardware Block Diagram.
Table 4: Level 0 Hardware Modules.
Module
LiFePO4 Charger
Inputs
CAN bus, 120VAC, User Controls, Power Switch
Outputs
DC output voltage, User Display
The charger will be connected to the onboard CAN system of the
Functionality
vehicle through a wire bus and have some means of delivering charge
status to the user.
Theory of Operation: Hardware Block Level 0.
The LiFePO4 charger accepts a CAN bus signal containing voltage and temperature
readings of the battery cells. Based on these readings, the charger will adjust the output
current to prevent overcharging and resultant cell damage. In addition, the user will be
able to monitor the status of each cell using a simple display and user interface. The
charger will be supplied by a typical 120VAC outlet.
8
3.1.2
HARDWARE LEVEL 1 (JZ)
Hardware Block Diagram (level 1)
Figure 4: Level 1 Hardware Block Diagram.
Table 5: Level 1 Hardware Modules.
Module
Controller
Inputs
CAN Bus, Charger Status
Outputs
Command
The controller coordinates all the processes for the battery charger. The
controller accepts input information from the CAN bus and determines
Functionality
the appropriate output current to the battery. The amount of current to
the battery cells is sent to the charger module, and if a fault occurs in
the charger an error message is sent to the controller. The controller
will also show the user the status of the batteries/charger.
9
Module
AC/DC Converter
Inputs
High Voltage(120VAC)
Outputs
High Voltage(170VDC)
Functionality
Module
Inputs
Outputs
Converts the AC power supply to 170VDC as well as a DC output to
supply the variable charger.
Variable DC/DC Charger
High Voltage (170VDC), Low Voltage (5-12VDC), Charging Voltage
and Current data
?-96V ?-20A DC Output, Present voltage and current data
Convert the 170VDC power supply to a variable DC output according
to the command received from the controller to charge the battery.
Functionality
The output Charging Voltage varies according to the A-h rating and
state of charge of the cells in order to get a constant current output
during the charging. The Low Voltage output energizes low voltage
components such as relays.
Theory of Operation: Hardware Block Level 1.
There are two major components to the level 1 hardware diagram. The first
component is an AC to DC converter, which will convert the 120V input into a fixed
170VDC output. The second component is a controller, which will accept the CAN bus
signal and measured values from the current sensor circuit and display these values to the
user. It will calculate the appropriate action based on the conditions. The controller would
send a signal to the DC/DC converter to vary the output or to cut off the current output to
the battery entirely.
10
3.1.3
HARDWARE LEVEL 2/SCHEMATICS (MS)
Hardware Block Diagram (level 2)
Figure 5: Level 2 Hardware (AC/DC Converter) Block Diagram.
Table 6: Level 2 Hardware (AC/DC Converter) Modules.
Module
Relay/Fuse
Inputs
High Voltage (170V DC), Cut-off Signal
Outputs
High Voltage (170V DC)
The relay cuts off the charging circuit when an unexpected large
Functionality
current is flowing through the cells or when a cut-off signal is received
from the controller in case a critical error occurs.
Module
GFI
Inputs
High Voltage(120VAC)
Outputs
High Voltage(120VAC), Fault Signal
Functionality
The GFI module monitors the current of the AC input. A fault signal is
sent to the controller and the relay when a current leakage occurs.
11
Module
Full-wave Rectifier
Inputs
High Voltage (120VAC)
Outputs
High Voltage (170VDC)
Functionality
The rectifier converts the 120VAC input to a 170VDC output to supply
the charging system.
Module
Filter
Inputs
High Voltage (170VDC)
Outputs
High Voltage (170VDC)
Functionality
The filter removes the voltage ripple in the 170VDC input. The output
DC voltage ripple must be less than 1%.
Theory of Operation: AC/DC Converter.
GFI-Schematic (MS)
Figure 6: Schematic of the GFI circuit.
The primary purpose of this circuit is to eliminate the risk of electric shock to the
user. The circuit is designed to detect a leakage current of 15mA. The schematic for this
circuit can be seen in Figure 6 above. The idea behind the GFI is that it will measure the
difference between the input and output current (i.e. leakage current). To measure the
leakage current a current transformer will be used; this transformer allows the primary
wires going to the battery charger to pass through the transformer. The leakage current
will be converted to a voltage on the secondary side of the transformer via a burden
resistor (a resistor that is placed across the leads of the current transformer). The
manufacturer specifies a maximum burden resistance of 200Ω to ensure the core will not
12
be saturated. The output voltage of the current transformer is found by
!!
!!"#,!" =
!"#$%
!!"#$%& =
!!
!"!!
200Ω = !! ×0.1978Ω.
The output voltage from the current transformer is connected to a low pass filter
which will remove noise that has entered from the current transformer. Since the GFI will
be measuring leakage currents at 60Hz it was decided to make the cut-off frequency of the
filter to be 100Hz. The capacitor and resistor values used in the filter were found by
!!"#$%% = 100!" =
!
!=
!∗!∗!!"∗!""!"
!
!∗!∗!∗!
, !"# ! = 1!",
= 1.592!! → !! = 1.58!! (!"#$%#&% 1% !"#$%).
At low leakage currents a very low voltage will be developed across the burden
resistor; for example, at a leakage current of 15mA only 3mV will be developed. To
increase the signal a basic non-inverting amplifier will be used. Implementing a gain of
101V/V will raise the 3mV signal to 300mV which will be sufficient to detect a fault. The
equation below shows the equation to determining the resistor values of the amplifier.
!!"#$"#
!!
!!
= 1+
, !"# !! = 182!! → !! =
= 1.82!!
!!"
!!
101 − 1
The final part of the GFI circuit is the Schmitt trigger the output of the amplifier
connected directly into the Schmitt trigger. This circuit outputs a logic high (5V) when the
input voltage reaches a upper hysteresis set point and will remain high until the input goes
below the lower hysteresis set point. This circuit is being used to keep the output high for
a set voltage range. The reference voltage and resistor values to set the upper and lower set
points are listed below. The upper set point was selected to be 0.25V since the input signal
will peek at 0.30V for a 15mA leakage current. However at this point it is now possible to
detect leakage currents down to 12.5mA. The lower set point was selected at 0.10V and
the set points are determined by
!!"!"#$%# = !
!!
! !!!
×5! =
!
!"!Ω
!"!Ω!!!Ω
×5! = 0.2426!,
!
!!" = !!"#!"$%" × 1 + !! − !! ×!! = 0.2426× 1 +
!
!
!
!
!!" = !!"#!"$%" × 1 + !! − !! ×!! = 0.2426× 1 +
!
!
!""Ω
!"!Ω
!""Ω
!"!Ω
−
−
!""Ω
!"!Ω
!""Ω
!"!Ω
×5! = 0.10!,
×0! = 0.250!.
Where !!"#!"$%" is the Input Reference Voltage, !!" is the Lower Hysteresis Set Point,
13
!!" is the Higher Hysteresis Set Point, !! is the Positive Supply on Op-amp (5V), and !!
is the Negative Supply on Op-amp (0V).
Figure 7 below shows the simulation of the GFI circuit at 15mA leakage current;
the top plot shows the input current and the lower plot shows the output from the Schmitt
trigger. This shows that it took a total of 12mS for the circuit to detect and signal a ground
fault. The output of the GFI circuit will be connected to switch/cut-off circuit where it will
be latched and a GFI notification will be sent to LABVIEW and the safety switch will be
turned on to cut power from the charger. The GFI fault will latch until the user hits the rest
button or until the unit is restarted.
Figure 7: Simulation output of The GFI circuit at a leakage current of 15mA.
Rectifier/Filter-Schematic (MS)
Figure 8: Voltage waveform of power input.
A rectifier is a device commonly used to convert the AC voltage to a DC voltage. The
14
sinusoidal AC voltage travels across a bridge of diodes which reverse the negative half of
the AC voltage to positive. Each diode only let the current pass while the voltage across it
is forward biased, so the combination of diodes will convert the AC input to positive
voltage output. Figure 8 shows the waveform of the voltage before and after a full-wave
rectifier.
In this design the AC/DC converter produces a constant DC voltage on its output. The
output DC voltage value was calculated using
!! = !!"# × 2 = 120× 2 = 169.705!!" ≅ 170!!" ,
where Vrms is the root mean square input voltage.
Figure 9: Rectifier and Filter Schematic.
Figure 9 shows the schematic for the rectifier and filter circuits. An integrated
bridge rectifier will be used for diodes D1-D4; this ensures the properties of the diodes are
nearly identical. To filter the rectifier a pi filter will be used, this filters the harmonics
created by the DC/DC converter and also smoothes the 60Hz fundamental frequency. The
components of this filter are limited by the budget of this project; this filter consists of two
2.2mF capacitors and a 15µH inductor. The cut-off frequency is calculated by
!!"#$%% =
1
!× !"
=
1
!× 15µμH×2.2mF
= 1752!"
Figure 10 shows the simulation of the rectifier circuit, there is about 18% voltage ripple
and 20% current ripple. The average output voltage changes slightly compared to the
calculated value of 169V due to this filter.
15
Figure 10: Rectifier and Filter Simulation.
Relay/Fuse-Schematic (MS)
Figure 11: Schematic of Relay/Fuse Circuit.
The purpose of the relay/fuse circuit is to provide additional safety to the user of
this
charger.
Figure 11 shows the schematic for this circuit. This circuit will automatically disconnect
16
power (using a relay (S1)) to the charger during an over-current or GFI event even if
LABVIEW loses communication to the charger. In addition LABVIEW can also control
the relay and disconnect power to the charger under dangerous conditions. In addition 20A
fast acting fuse is inserted to provide backup in case all other of failure of the relay circuit.
The primary IC of this circuit is the latch (IC5). This latch inputs a GFI or Over
current fault on the “set” pins. The output of the latch goes high (5V) when a fault occurs;
the latch will continue to output a high until the fault clears and buttons SW2 (GFI) and
SW3 (Over Current) are manually pushed to clear the respective fault. SW2 and SW3 are
connected to the reset pins of the latch; Table 7: Cell Count Table. shows the logic for the
latch IC, note that the enable pin is connected to 5V and therefore is always high.
Table 7: Cell Count Table.
Set
Reset
Enable
Q(output)
1
0
1
1
0
1
1
0
1
1
1
1
The output of the latch circuit is connected to a transistor to turn on LEDS to
indicate that a fault has occurred. D8 illuminates for a GFI fault and D9 illuminates for an
over current fault. The transistor is only drawing about 75µA at its base in order to allow
20mA to flow through the LEDS. The output of the latch is also connected to a mosfet
driver circuit IC (IC6), the outputs for the two faults are “or”ed together using D6 and D7.
In addition, a LABVIEW output is also “or”ed to turn on the relay. When the driver circuit
receives a circuit it will turn on the mosfet (Q1) and cause the normally closed relay to
open disconnected power to the charger. The driver IC was implemented to ensure the
mosfet fully turns on; even if the input to the driver circuit IC is 3V the driver will output
5V to the mosfet gate.
17
Figure 12: Level 2 Hardware (Charger) Block Diagram.
Table 8: Level 2 Hardware (Charger) Modules.
Module
Variable DC/DC Converter
Inputs
High Voltage(170V DC), PWM
Outputs
High Voltage( 67.2-96V 1-20A DC)
The Buck-Boost converter is controlled by a PWM (pulse-width
modulation) signal sent from the supervisor controller. The input DC
Functionality
voltage is converted to a constant current output to charge the battery.
The output voltage depends on the number of cells used, and the
output current depends on the state of charge of the battery pack.
Module
Current Sensor
Inputs
High Voltage ( 67.2-96V 1-20A DC)
Outputs
Measured Current Value
The current sensor measures the output current of the charger. The
Functionality
current value is transferred to the supervisor controller as an output
voltage value proportional to the measured current.
18
Module
PWM Generator
Inputs
LABVIEW PWM Signal
Outputs
PWM Signal
Functionality
Since LABVIEW cannot directly drive a 100kHz PWM signal an
intermediary circuit will be used to implement this.
Theory of operation: Charger.
DC voltage regulator overview (JZ,MS)
This module is used to energize the sensors and control chips in the charging system.
A non-isolated DC/DC converter uses the duty ratio of the switches to determine the ratio
of output voltage and input voltage. As the input and output voltage are defined for this
particular converter, a step-down DC/DC converter with a fixed duty ratio can satisfy the
design requirement.
Battery
As the LiFePO4 battery pack is the load of the charging system, the modeling of
the battery is necessary for designing the charger and charging processes. The Lithium ion
battery can be considered as a DC voltage source with internal resistance and capacitance.
Figure 13: Equivalent circuit of a LiFePO4 battery cell.
During the charging period, the internal capacitance of the battery cells could be
19
ignored as a dc current is always applied. Therefore, the model of the battery cell consists
of a DC voltage source and an internal resistance. The internal resistance of the battery
cell is then determined experimentally by using ohms law.
Table 9: Measurement of internal resistance of the battery cell.
charge V
11
11.5
12
12.5
13
13.5
14
battery V
9.73
10.4
10.9
11.4
11.95
12.23
12.63
R total
0.1814
0.1571
0.1571
0.1571
0.1500
0.1814
0.1957
R wire
0.0243
0.0243
0.0243
0.0243
0.0243
0.0243
0.0243
R battery
0.0393
0.0332
0.0332
0.0332
0.0314
0.0393
0.0429
Table 9 shows that the internal resistance of each battery cell is approximately 0.04Ω.
This value will be used later to simulate the variable DC/DC converter.
Figure 14: Current, voltage, and state of charge during charging process
Figure 14 shows the expected current, voltage, and state of charge during the full
charging process of the battery pack. When the battery cells are at low voltage levels, the
best charging current rate applied is C/3, which is 20A. Once any of the battery cells
reaches the bypass voltage of the monitoring board, the output current will be reduced to
20
4A to prevent any damage to the battery cells and the monitoring board. The shunt resistor
used to bypass the current could only handle about 1A current. Therefore it is necessary to
reduce the charging current. It is expected that most of the battery cells are likely to be
charged to a high state of charge. After the total voltage of the battery pack reaches 93.6V,
which indicate that most of battery cells are charged to the bypass voltage, the output
current will further decreased to 1A. The charging process will be terminated in 15
minutes. This charging process could guarantee the battery pack can be charged in a
reasonable short time and prevents any damage to the cells.
Variable DC/DC Converter
This module is used to charge the battery pack. The output from this module varies
according to the current status of charge of the battery pack. Therefore, a pulse-width
modulation (PWM) controlled switch is required to adjust the output current and voltage
to the desired value. This converter operates as a current source with several different
current levels, so the value of output voltage of the converter is obtained from the
controller in order to maintain a constant output current. The PMW signal received is the
duty ratio of the converter. The relationship between the output voltage and the duty ratio
can be dependent on which type of DC/DC converter is chosen.
The output voltage of the DC/DC converter depends on the total voltage across the
battery cells. The maximum output current is 20A. By using ohms law, the maximum
output voltage is 115V. As the input voltage from the AC/DC converter is 169V, the buck
converter topology is chosen to construct the variable DC/DC converter.
21
Figure 15: Topology of the buck converter.
The output voltage of the buck converter is related to the input voltage by the duty
ratio of the gate switch of the MOSFET. The relationship can be expressed as
!!
!!
= !,
where Vo is the output voltage, Vs is the input voltage, and D is the duty ratio.
The inductance value is chosen to minimize the output current ripple. The
inductance is calculated by
!=
!! !!!
∆!! !
!,
where ΔiL is the current ripple, f is the gate switching frequency of the MOSFET, and D is
the duty ratio. For the worst case, the output voltage is equal to
!! = !!"##$%& + !! Σ! = 3.9×24 + 20×1.96 = 132.8!,
and the duty ratio is
!=
!!
!!
=
!"#.!
!"#
= 0.786.
The switching frequency is selected to be 100kHz, which is normally used in power
circuits. The minimum inductance value to ensure continuous current is calculated as
!!"# =
!!! ∗!
!!
=
(!!!)×!
!""×!"!
= 10µμ!.
The largest inductor we could find that would meet our specifications and budget is a
15µμ! inductor.
The capacitance value is chosen to minimize the output voltage ripple. This
capacitance is calculated by
22
!=
!!!
∆!
!!( ! )! !
!!
=
!!!.!"#
! !.!×!"!! !% (!"×!"! )!
= 8.73!".
Therefore, the minimum capacitance value is 8.73uF for a voltage ripple of 2%. A
larger value capacitor is selected to ensure the expected performance. To further improve
the output performance of the buck converter a pi filter containing 2 capacitors and an
inductor will be implemented. The components of this filter are limited by the budget of
this project; this filter consists of two 2.2mF capacitors and a 15µH inductor. The cut-off
frequency is calculated by
!!"#$%% =
!
!× !"
=
!
!× !"#$×!.!"#
= 1752!".
The pi filter will almost completely filter the harmonics (at 100 kHz) and some of the
fundamental frequency.
Figure 16 is the schematic of the buck converter which includes the output pi filter.
Figure 17 below shows the simulation for the converter at 90.25V output at 20A. The
output shows that there is about a 20% voltage and current ripple which was expected. In
addition Table 10 shows the theoretical output voltage and duty ration assuming a 169V
input. On the schematic, pin 3 of IC6 (mosfet driver IC) is connected to a PWM source.
The mosfet driver circuit accepts a logic level (5V) PWM, and will drive the switching
MOSFET (Q1) with a 12V PWM signal which means the FET will reach the saturation
region.
23
Figure 16: Schematic of the buck converter.
Figure 17: Simulation Output of the Buck Converter.
24
Table 10: Theoretical output voltage and duty ratio at different battery voltages.
Vs
Vo
D
Io
Vbat
r
169
79.2
0.468639
20
60
0.96
169
89.2
0.527811
20
70
0.96
169
99.2
0.586982
20
80
0.96
169
109.2
0.646154
20
90
0.96
169
115.2
0.681657
20
96
0.96
PWM Generator (MS)
Figure 18: PWM Generator Circuit
Figure 18 is the schematic for the PWM generator circuit. This circuit accepts a
signal from LABVIEW and will output a 100 kHz PWM signal to the DC/DC converter
switch. The signal from LABVIEW varies from 0-5V which is proportional to the duty
ratio where 5V equivalent to a duty ration of 1.0, 2.5V is equivalent to 0.5 duty ratio, etc.
Hall Effect Sensor (MS)
Figure 19: Current Sensing Circuit.
Figure 19 above shows the schematic for the current sensing circuit. The current
25
will be sensed using a Hall Effect sensor (IC7). It was decided to use this sensor because it
provides good isolation between the sensing and output sides (protection up to 2.1kV) and
it has a low current measuring error (1.5% or less). This unit also dissipates very little heat
since the internal resistance for the current path is only 1.2mΩ. The power dissipation in
the sensor is
P!"#!$%,!"# = I!"#!"$,!"# ! ×1.2mΩ = 20A! ×1.2mΩ = 0.48W.
Since this sensor is handling large amount of current there is two current input pins and
two current output pins.
An added benefit of the Hall Effect used in the charger (ACS715) is that is the bandwidth
can be set by using the filtering pin on the IC. In the case of measuring DC current the
manufacturer recommends placing a 1nF capacitor between the filter pin and ground. The
graph in Figure 20 below shows the relationship between the sensed current and output
voltage. It can be seen that the there is a linear response from this Hall Effect sensor.
Output Voltage (V) Hall Effect Sensor Output Voltage versus Sensed Current(at 77°F) 4.5 4 3.5 3 2.5 2 1.5 1 0.5 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 Sensed Current (A) Figure 20:Hall Effect Sensor Output Voltage versus Sensed Current(at 77°F).
For added safety the output of the Hall Effect sensor is connected to a comparator.
When the output of the sensor reaches 3.8V (equivalent to 25A output current) the
comparator will go high indicating over current. This signal is connected to the switch/cutoff circuit where the signal is latched and will stay latched until the current decreases and
26
the user pushes the reset button. When this signal is latched it will also turn switch the
relay cutting power to the charger.
Figure 21: Level 2 Hardware (Controller) Block Diagram.
Table 11: Level 2 Hardware (Controller) Modules.
Module
User Interface
Inputs
Display Out
Outputs
User Input
This device will allow the user to a setting that will be available in the
Functionality
controller device. In addition this device will also display the battery
cell parameters (voltage and temperature) as well as any errors on an
easy to read display.
27
Module
Supervisor Controller
Inputs
ADC In, Decoded Data Input, User Input
Outputs
Display Output, Duty Ratio Command, ADC Out
This device will be a computer running LabVIEW. It accepts the GFI
status, Current output of the charger, and data received on the CAN
Functionality
bus. With this information the control module calculates the signal
sent to the DC/DC Module. If the output current is over the max range
then the GFI trips. If the device losses the CAN signal then the control
block will send a signal that cuts the power to the charger.
Module
CAN bus
Inputs
CAN signal
Outputs
Decoded Data Input
This module performs the most important task for the charger. The
Functionality
module converts the CAN bus signal from the vehicle into a signal that
can be accepted by the control module.
Module
Digital/Analog I/O
Inputs
Measured Current Value, GFI
Outputs
Cut-Off Signal, Duty Ratio Value
This module serves as a way for the chargers’ I/O signals to be
Functionality
connected to the controller. The device creates a PWM with data from
the Control Block for the DC/DC module to utilize.
Theory of Operation: Controller
Controller Hardware/Schematic (MS,JZ)
28
Figure 22: Controller Hardware.
Figure 22 above shows the schematic of the LABVIEW hardware and Power
Supply Connected to the charger circuit. LV1 is the NI USB 6009 data acquisition unit,
for this charger 2 pins from this DAQ will be used as an analog input and 2 pins will be
used as an analog output.LV2 is the NI USB 8473 CAN-USB adaptor CAN_Low,
CAN_HIGH, and CAN_V- are the only three signals that are required to be connected to
this adaptor in order to read the Can signals. Both of these devices are connected to the
LABVIEW computer via USB.
Controller Overview (JZ)
The output of the buck converter is normally a constant voltage when the duty
ratio of the switch is fixed. And the battery cell is a variable load at different state of
charge. Furthermore, when the shunt of the battery monitoring board is turned on to
prevent overcharging, the load resistance also changes. Therefore, a closed-loop control
system is required to keep the output current to be constant.
29
Figure 23: Voltage and current waveform of the buck converter inductor.
Figure 23: Voltage and current waveform of the buck converter inductor. shows the Voltage
and current waveform of the inductor of the buck converter for one period. The output
current of the buck converter is the same as the current flowing through the inductor. A
transfer function could be built to estimate the current at the end of one period according
to the current at the beginning of the period. The equation is found to be
!! !" = !! 0 +
!"!!"
!
!",
which leads to
!! ! = !! 0 +
!"!!"
!
!" +
!
!"
!
!
−!" !" = !! 0 +
!"#$!!"#
!
,
where iL(0) is the inductor current at the beginning of the period, iL(T) is the inductor
current at the end of the period, Vs is the input voltage, Vo is the output voltage of the
buck converter, L is the inductance, T is the period, and D is the duty ratio of the switch of
the converter. The duty ratio is the only parameter used to control the buck converter.
Therefore, the modeling of the buck converter needs to relate the inductor current to the
change of the duty ratio using the equations
!" = !! + ∆!,
!! =
!!
!!
30
!,
!! ! = !! !! ,
!! ! = !! 0 +
!! (!" !!! )
!
,
and
!! ! = !! 0 +
!! ∆!
!
,
where T1 is the nominal period, and Δt is the change of the pulse width. This equation
shows that the inductor current at the end of the period equals to the summation of
inductor current at the beginning of the period and a function linearly proportional to the
change of the pulse width. A state equation of the inductor current could be derived from
the calculation
!! ! + 1 = !! ! +
!! (!)
!
∆!.
However, the sampling period of the closed-loop controller is slower than the gate
switching period of the buck converter. This also needs to be taken in to account for the
state equation as the change in pulse width within one sampling period will cause n times
change in current. This is represented as
!! ! + 1 = !! ! + !
!! (!)
!
∆!,
where n is the number of switching periods per sampling period. The modeling of the
buck converter is then established based on this state equation.
Figure 24: Block diagram of the buck converter model.
The z domain transfer function of the buck converter derived from the state
equation is
31
!" ! =
!! (!)
∆!(!)
=
!"#(!)/!
!!!
.
The sampling period of the LABVIEW software is 1ms, and the switching frequency is
100kHz. So n in this case is 100 times per sampling period. By substituting Vs = 169V
and L=0.9mH, the transfer function of the buck converter is
!" ! =
!.!"×!"!
!!!
.
Based on this plant transfer function, the compensator could be designed to control the
output current.
Figure 25: Root locus plot of the plant transfer function.
Figure 25 shows the root locus plot of the model of the buck converter. A
proportional control compensator will be able to bring the closed-loop pole inside the unit
circle to stabilize the control system.
32
Figure 26: Frequency response of the closed-loop system.
Figure 27: Step response of the closed-loop system.
33
Figure 26 and Figure 27 show the frequency response and step response of the
compensated closed-loop control system with a proportional gain of Kp. The compensated
system has a good phase margin and rising time. And there is no steady state error for this
system.
Figure 28: Implementation of the control system.
Figure 28 shows the implementation of the entire control system with the buck
converter. By comparing the desired current and measured output current from the current
sensor, the control system will determine the amount of change of the pulse width to reach
a constant output current. The nominal period T1 could be calculated by !! =
!"
!"
!. Where
Vo and Vs are the output and input voltage of the buck converter respectively. The input
voltage and switching period T is constant. And the output voltage could be obtained from
the CAN signal from the monitoring board mounted on the battery cells.
Pseudo Code of the closed-loop control system:
INFINITE LOOP
READ value of desired current
READ value of current sensor voltage
COMPUTE value of measured current as V/I factor times current sensor voltage
COMPUTE value of current difference as desired current – measured current
COMPUTE pulse width difference as current difference times proportional control
34
gain Kp
READ value of total output voltage
COMPUTE nominal duty ratio as total output voltage divided by input voltage of
DC/DC converter
COMPUTE value of nominal pulse width as nominal duty ratio times switching
period
COMPUTE value of pulse width as pulse width as nominal pulse width + pulse
width difference
COMPUTE value of duty ratio as pulse width divided by switching period
WHILE duty ratio > 0.8
duty ratio = 0.8
ENDWHILE
COMPUTE value of PWM command voltage represents the duty ratio
PRINT value of PWM command voltage
UNTIL cut-off signal = high
Figure 29: LabVIEW block diagram of closed loop controller.
Cycle life
The cycle life of the battery pack mostly depends on the charging capacity. It is
assumed that the battery cells will not experience negative effects from overcharge, over-
35
discharge, or over current. According to the data provided by the manufacture of the
LiFePO4 battery, the cycle life of the battery varies according to the percentage of the
charge and discharge capacity. The cycle life should be more than 3000 times at 80%
depth of discharge (DOD), and more than 5000 times at 70% DOD.
The charge termination voltage used in the charger system is 3.9V, where 4.0V is the
termination voltage of 100% charge capacity. Although the charge capacity is not linearly
proportional to the termination voltage, this serves as an adequate approximation. The
percentage of the charge capacity at 3.9V is therefore
! !!
P! = ! ! ×100% =
(! !! )
!
!
!.!!!.!
!.!!!.!
×100% = 91.7%,
where Vp is the partial charge termination voltage, Vc is the full charge termination voltage
and Vd is the discharge termination voltage.
The cycle life of the battery cells could be much less than 3000 times for the worst
case scenario that the battery is discharged to its discharge termination voltage every time.
However, this is not a realistic presumption. The cycle life of the battery can be extended
if the charge termination value is set lower. The number, space and weight of the battery
cells are limited, so the battery is desired to have a higher charge capacity. The selection
of charge capacity is a tradeoff between performance and durability.
Safety consideration
As the battery cells are connected in series, the overall voltage of the charger could
get to as high as 96V (24cells x 4V/cell), which is more than enough to cause a ventricular
fibrillation. In order to prevent a critical damage caused by the electric shock, the ground
fault interrupter (GFI) installed at the power supply must be able to cut-off the power
within 40 milliseconds when a leakage current of 15mA is detected.
36
Complete Battery Charger Schematic
Figure 30: Complete Battery Charger Schematic.
37
Table 12: Parts list for the proposed battery charger
Qty.
1
1
3
2
2
1
2
1
1
1
1
1
1
1
2
2
1
1
4
Refdes
Part Num.
D1-D4
D5
D6,D7,D10
D8,D9
R12,R17
R1
R18,R19
R5
R2
R3
R6
R13
R14
R7
R20,R21
R15,R16
R4
R8
C1,C4,C15,C16
C7,C8,C10C14
C9
C2
C3
L1-L3
IC1,IC3
IC2
IC4,IC6
IC5
IC7
IC8
SW1
SW2,SW3
SW4
Q1
Q2
Q3,Q4
T1
GBJ2504-F
APT30S20BG
1N5821RL
C503B-BCN-CV0Z0461
CMF5010R000FHEB
CMF50200R00FHEB
CMF50221R00FHEB
CMF50301R00FHEB
CMF501K5800FHEB
CMF1.82KQFCT-ND
CMF5010K000FHEB
CMF5012K100FHEB
CMF5039K200FHEB
CMF5024R900FHEB
CMF5057K600FHEB
CMF50100K00FHEB
CMF182KQFCT-ND
CMF50499K00FHEB
EET-UQ2E222LA
RECT BRIDGE GPP 400V 25A GBJ
DIODE SCHOTTKY 45A 200V TO-247
DIODE SCHOTTKY 30V 3A DO-201AD
LED 5MM BLUE CLEAR 470NM 30DEG
RES 10.0 OHM 1% 50PPM 1/4W
RES 200 OHM 1% 50PPM 1/4W
RES 221 OHM 1% 50PPM 1/4W
RES 301 OHM 1% 50PPM 1/4W
RES 1.58K OHM 1% 50PPM 1/4W
RES 1.82K OHM 1% 50PPM 1/4W
RES 10.0K OHM 1% 50PPM 1/4W
RES 12.1K OHM 1% 50PPM 1/4W
RES 39.2K OHM 1% 50PPM 1/4W
RES 24.9 OHM 1% 50PPM 1/4W
RES 57.6K OHM 1% 50PPM 1/4W
RES 100K OHM 1% 50PPM 1/4W
RES 182K OHM 1% 50PPM 1/4W
RES 499K OHM 1% 50PPM 1/4W
CAP ALUM 2200UF 250V 20% SNAP
FK28X7R1H104K
445-2409-ND
FK28X5R1A105K
EKXG251ELL101ML25S
535-11401-ND
LMC6484IN-ND
RV350
FAN3111ESXCT-ND
CD4044BE
ACS715ELCTR-30A-T
PIC12F617-I/P
781XAXM4L-12D
PS1023ARED
R5BBLKREDFF1
NTD4963N-35G
IRFP260MPBF
BC547BTA
CR8410-1000
1
1
1
1
J1
J3
61400413321
HH-201S
J2
EC11.0001.001
1
1
1
1
Cable
Heatsink
F1
Fuse Holder
233082-06
WV-T247-101E
0314020.HXP
03420004H
CAP CER 0.1UF 50V 10% RADIAL
CAP CER 1000PF 250V 20% RADIAL
CAP CER 1UF 10V 10% RADIAL
CAP ALUM 100UF 250V 20% RADIAL
INDUCTOR PWR DRUM CORE 15UH
IC OP AMP QUAD CMOS R-R 14-DIP
Rosewill RV350 350W ATX 1.3 Power Supply
IC GATE DVR SGL 1A EXTER SOT23-5
IC QUAD NAND R/S LATCH 16-DIP
SENSOR CURRENT 30A 5V UNI 8-SOI
nIC MCU 8BIT 3.5KB FLASH 8DIP
General Purpose / Industrial Relays SPDT, 20A
SWITCH PUSH SPST-NO 3A 125
SWITCH ROCKER DPST 20A 125V
MOSFET N-CH 30V 8.1A IPAK
MOSFET N-CH 200V 50A TO-247AC
TRANS NPN 45V 100MA TO-92
TRANSFORMER CURRENT GP WIRE LEA
USB Connectors Interface Connectors USB B
CONN 4 RCPT
DCT Factory HH-201S 4 Ports USB 2.0 Hub
From Previous List
MOD PWR ENTRY 2PL SW QC SCRW PN
AC Power Cords 10' GRAY/GRAY PLUG 3 X 14
AWG HOSP
Heat Sinks Heatsink for TO-247 DEGREASED
FUSE CERAMIC 250V FAST 3AB 20A
FUSEHOLDER 3AG FLUTED RT ANGLE
NI USB 8473
NI USB 6009
10
1
1
1
5
2
1
2
1
1
1
1
2
1
1
1
2
1
Description
38
3.2
SOFTWARE (KF)
3.2.1
CONTROLLER AREA NETWORK
The Controller Area Network (CAN) is a standard developed by Bosch in 1983
with the intended application of vehicle systems interfacing. It reduces wiring required by
establishing a common line connecting all subsystems. The maximum speed of data
transfer with this standard is 1Mbit/s, which is only practical for lengths less than 40m.
This is because it takes time for the signal to actually travel along the wire, where
additional length means additional delay of transmission. If there is too much delay
between the transmission and subsequent reception of the signal, there could be aliasing
problems; devices on the network would misinterpret bits and the message would
essentially be lost. It is common for automobiles to operate at half of this maximum rated
speed, or 500kbits/s. This allows for longer lengths of wire to reach every part of the
vehicle.
The CAN standard sends information on two wires: CAN high and CAN low. The
dominant logical state is a zero, wherein the CAN high is 5Vdc and CAN low is 0Vdc.
The recessive logical state is a one, wherein the CAN high and CAN low are both
approximately 2.5Vdc. A sequence of particular logical high and low states is referred to
as a message or frame. To begin sending a message, a dominant (zero) bit is sent to let all
devices on the network know the line is being used. After this zero bit, an identifier string
of eleven bits is sent. Each message has a prioritized numerical identifier, with lower
numbers signifying a higher priority. In the event that two devices attempt to send a
message at exactly the same instant, the message with the higher identifier will cease its
transmission, allowing the prioritized message to transmit instead.
Following the identification of the message is a remote transmit request (RTR) bit.
This bit differentiates between data frames (dominant zero) and remote frames (recessive
one). Data frames are messages being sent by some device on the network. Remote frames
are requests made with a particular message identifier for that message to be sent. By this
means a device may request data to be sent rather than waiting for a device to send it. This
feature will be very useful to the project because all CAN data will be received by Lab
39
View.
Following the RTR bit is the identifier extension bit, which differentiates between
a standard 11-bit identifier (dominant zero) and an extended 29-bit identifier (recessive
one). In the case that this bit is a one, the 18 bits that follow will be continued
identification bits. This is useful if the system has many messages it needs to send with
unique identifiers for each.
After the identifier extension bit, as well as the 18-bit extended identifier in the
case that it was recessive, a data length code (DLC) is sent. This code is 4 bits long,
indicating how many bytes are in the data frame. A valid range for this DLC lies between
0 and 8. The data bytes themselves then follow this DLC. A cyclic redundancy check
(CRC) is a 15-bit value calculated by the transmitter of the message based on the bits
preceding it in the message. This value is recalculated by each receiving device, and
reliability is therefore quite good. If the value differs between any devices, an error is sent.
Further verification comes in the form of an acknowledge bit, which is a dominant
zero sent by every receiving device on the line. If it so happens that there is only one
device on the line, no acknowledge bit can be sent and the transmitter will therefore
continuously send and resend its message awaiting verification. At the termination of a
message, assuming acknowledgement has been achieved, the transmitter sends a series of
6 recessive bits. To make sure this only occurs at the end of a message, CAN messaging
adopts the practice of bit stuffing. This means that every 5 consecutive bits of information,
a dummy bit is “stuffed” into the frame of opposite logical value. The receiver then
effectively de-stuffs these anticipated dummy bits from the message to read it (Bosch).
40
3.2.2
SOFTWARE LEVEL 0 (KF)
Voltage to Control Current
CAN message
Car
NI USB-8473
Computer with
LabVIEW
NI-USB-6009
Charger
Shutdown Signal
Analog Current
Figure 31: Level 0 Software Block Diagram
Table 13: Level 0 Software Modules
Module
Computer with LabVIEW
Inputs
CAN message, Analog Current
Outputs
Voltage to Control Current, Shutdown Signal
The software accepts the current sensor reading and CAN message,
Functionality
which it decodes into cell temperature and voltage readings. Using
these values, it determines at what rate to charge the batteries, or
whether to send a shutdown signal.
Theory of Operation: Software Block Level 0.
The software takes in the measured current value from the charger circuit and the
CAN bus message, which contains cell voltage and temperature readings. These values are
then converted into a format that is simple to read on a display. The software will
determine the appropriate output current value based on these inputs. It will additionally
decide whether the charger needs to be turned off if the values are in extreme.
41
3.2.3
SOFTWARE LEVEL 1 (KF)
Read ADC
Store Current
Sensor Reading
Read CAN
Store decoded
CAN message
values
Compare Values
Output Voltage to
Control Current
Trigger Shutdown
Count
Figure 32: Level 1 Software Block Diagram
Table 14: Level 1 Software Modules
module
Read CAN
inputs
CAN data from existing hybrid vehicle control
outputs
Cell voltage and cell temperature data
function
Retrieves CAN data from the vehicle.
module
Store decoded CAN message values
inputs
Cell voltage and temperature data
outputs
Cell voltage and temperature data
function
Stores voltage and temperature values into memory.
module
Read ADC
inputs
Analog signal from current sensor
outputs
Digital current level
function
Converts the analog current to digital for processing.
module
Store Current Sensor Reading
inputs
Charging current
outputs
Charging current
function
Stores current level into memory.
42
module
Compare Values
inputs
Cell voltage, cell temperature, digital current
outputs
Control current signal, shutdown signal
function
Compares levels with predefined warning levels; cuts power if these levels
are dangerous for the batteries. Sends a current control signal according to
battery voltage of the cell with the highest reading.
module
Output Voltage to Control Current
inputs
Control current signal
outputs
Reduce charge current signal
function
Cuts back the current charging the batteries when one cell reaches 3.7VDC,
and again when a cell reaches 3.9VDC.
module
Count
inputs
Reduce charge current signal
outputs
Shutdown signal
function
When the second current reduction happens, a timer begins counting for
approximately one hour, after which the charger shuts down.
module
Trigger Shutdown
inputs
Shutdown signal
outputs
Trip relay signal
function
Physically disconnects power in case of a fault or completion of charging.
43
Theory of Operation: Software Block Level 1. (KF)
Figure 33: National Instruments Devices
The Read ADC and Read CAN functions are implemented via National
Instruments USB devices. These devices can be seen in Figure 33. The NI USB-8473
gathers the CAN information to be stored in an array in LabVIEW, while the NI USB
6009 gathers analog information from the current sensor to be converted into a digital
signal. It additionally provides analog and digital output capabilities for driving a PWM to
change the battery charging current, and to trip relays to cut power to the batteries.
Once the values are collected and stored into LabVIEW, they must be compared to
some levels of interest. The maximum battery voltage is 4.0VDC, but exceeding this
voltage by even a small amount will greatly reduce the cycle life. It was therefore decided
that 3.7 VDC is an appropriate level at which to reduce the charge current from 15-20A to a
mere 4A. The current will reduce once a single cell has reached this voltage level. This
will ensure that other batteries in the pack have a chance to “catch up” with this cell. Once
a single cell reaches 3.7 VDC, the charge current is further reduced to match that of the
44
shunt current which is 1A. These current reductions are performed by outputting a voltage
via the NI USB 6009 which will control a PWM, in turn controlling the charging current
to the battery pack.
When the charging current is cut back to 1A, a timer must be set. The battery
chemistry of lithium polymer cells does not allow for so-called “trickle charging”, and this
will eventually damage them. If all of the cells reach at least 3.8VDC, the trigger shutdown
will occur. If it has been a considerable length of time (approximately one hour) and all
cells are not yet at 3.8VDC, the trigger shutdown will also occur. Figure 32 shows the
software level 1 block diagram, with Table 14 describing each module. Figure 34 shows
the software flowchart to further clarify system operation.
45
3.2.4
SOFTWARE FLOWCHART (KF)
Analog Current
A/D
Conversion
Digital Current
Compare to
Warning
Presets
No
Out of Bounds?
Yes
Shutdown
signal
Cut Power
Yes
Yes
Any Temp
Over Limit?
No
CAN data
Decode
Temp/Voltage
No
Compare to
Warning
Presets
Any Cells
Over 3.7V?
Timer
Overflow?
Yes
Reduce
Charging
Current to
4Amps
No
Count
Yes
Any Cells
Over 3.9V?
Figure 34: Software Flowchart
3.2.5
SOFTWARE PWM GENERATOR PSEUDO CODE (MS)
Data
DUTY_ON
PWM_PERIOD
DUTY_OFF
PWM_voltage
PR2
DUTY_RATIO
46
Reduce
Charging
Current to
1Amp
Code
Configure PM0 for output
PWM_Voltage=ADC_PIN6
DUTY_RATIO= PWM_Voltage/5
PWM_PERIOD=(PR2+1)*4*Tosc
DUTY_ON= PWM_PERIOD*DUTY_RATIO
DUTY_OFF = PWM_PERIOD - DUTY_ON
WHILE (1)
{
turn on PIN 5
delay for DUTY_ON
turn off PIN 5
delay for DUTY_OFF
}
47
3.2.5
MECHANICAL DRAWINGS (KF)
Figure 35: Mechanical Drawing (Enclosed)
Figure 36: Mechanical Drawing (Exploded)
48
4.
PARTS LIST
Table 15: Budget for the proposed battery charger.
Qty.
Part Num.
Description
Cost
Cost
1
GBJ2504-F
RECT BRIDGE GPP 400V 25A GBJ
$2.02
$2.02
1
APT30S20BG
DIODE SCHOTTKY 45A 200V TO-247
3.67
3.67
3
1N5821RL
DIODE SCHOTTKY 30V 3A DO-201AD
0.07
0.21
2
C503B-BCN-CV0Z0461
LED 5MM BLUE CLEAR 470NM 30DEG
0.19
0.38
2
CMF5010R000FHEB
RES 10.0 OHM 1% 50PPM 1/4W
0.31
0.62
1
CMF50200R00FHEB
RES 200 OHM 1% 50PPM 1/4W
0.31
0.31
2
CMF50221R00FHEB
RES 221 OHM 1% 50PPM 1/4W
0.31
0.62
1
CMF50301R00FHEB
RES 301 OHM 1% 50PPM 1/4W
0.31
0.31
1
CMF501K5800FHEB
RES 1.58K OHM 1% 50PPM 1/4W
0.31
0.31
1
CMF1.82KQFCT-ND
RES 1.82K OHM 1% 50PPM 1/4W
0.31
0.31
1
CMF5010K000FHEB
RES 10.0K OHM 1% 50PPM 1/4W
0.31
0.31
1
CMF5012K100FHEB
RES 12.1K OHM 1% 50PPM 1/4W
0.31
0.31
1
CMF5039K200FHEB
RES 39.2K OHM 1% 50PPM 1/4W
0.31
0.31
1
CMF5024R900FHEB
RES 24.9 OHM 1% 50PPM 1/4W
0.31
0.31
2
CMF5057K600FHEB
RES 57.6K OHM 1% 50PPM 1/4W
0.31
0.62
2
CMF50100K00FHEB
RES 100K OHM 1% 50PPM 1/4W
0.31
0.62
1
CMF182KQFCT-ND
RES 182K OHM 1% 50PPM 1/4W
0.49
0.49
1
CMF50499K00FHEB
RES 499K OHM 1% 50PPM 1/4W
0.49
0.49
4
EET-UQ2E222LA
CAP ALUM 2200UF 250V 20% SNAP
9.83
39.32
10
FK28X7R1H104K
CAP CER 0.1UF 50V 10% RADIAL
0.32
3.20
1
445-2409-ND
CAP CER 1000PF 250V 20% RADIAL
0.29
0.29
1
FK28X5R1A105K
CAP CER 1UF 10V 10% RADIAL
0.43
0.43
1
EKXG251ELL101ML25S
CAP ALUM 100UF 250V 20% RADIAL
1.64
1.64
5
535-11401-ND
INDUCTOR PWR DRUM CORE 15UH
3.84
19.20
2
LMC6484IN-ND
IC OP AMP QUAD CMOS R-R 14-DIP
3.61
7.22
1
RV350
Rosewill RV350 350W ATX 1.3 Power Supply
24.99
24.99
2
FAN3111ESXCT-ND
IC GATE DVR SGL 1A EXTER SOT23-5
1.09
2.18
1
CD4044BE
IC QUAD NAND R/S LATCH 16-DIP
0.56
0.56
1
ACS715ELCTR-30A-T
SENSOR CURRENT 30A 5V UNI 8-SOI
4.66
4.66
1
PIC12F617-I/P
nIC MCU 8BIT 3.5KB FLASH 8DIP
1.16
1.16
1
781XAXM4L-12D
General Purpose / Industrial Relays SPDT, 20A
6.82
6.82
2
PS1023ARED
SWITCH PUSH SPST-NO 3A 125
1.81
3.62
1
R5BBLKREDFF1
SWITCH ROCKER DPST 20A 125V
2.75
2.75
1
NTD4963N-35G
MOSFET N-CH 30V 8.1A IPAK
0.45
0.45
1
IRFP260MPBF
MOSFET N-CH 200V 50A TO-247AC
3.05
3.05
2
BC547BTA
TRANS NPN 45V 100MA TO-92
0.42
0.84
1
CR8410-1000
TRANSFORMER CURRENT GP WIRE LEA
8.15
8.15
1
61400413321
USB Connectors Interface Connectors USB B CONN 4 RCPT
1.46
1.46
1
HH-201S
DCT Factory HH-201S 4 Ports USB 2.0 Hub
5.99
5.99
From Previous List
$150.20
$150.20
1
1
EC11.0001.001
MOD PWR ENTRY 2PL SW QC SCRW PN
16.68
16.68
1
233082-06
AC Power Cords 10' GRAY/GRAY PLUG 3 X 14 AWG HOSP
13.99
13.99
1
WV-T247-101E
Heat Sinks Heatsink for TO-247 DEGREASED
2.04
2.04
1
0314020.HXP
FUSE CERAMIC 250V FAST 3AB 20A
1.46
1.46
1
03420004H
FUSEHOLDER 3AG FLUTED RT ANGLE
3.98
3.98
Total
$188.35
NI USB 8473 and NI USB 6009
49
5.
PROJECT SCHEDULES
5.1
FINAL GANTT CHART (JZ,MS)
Table 16: Midterm Gantt Chart
50
51
5.2
IMPLEMENTATION GANTT CHART (KV,JZ)
Table 17: Implementation Gantt chart.
52
6.
DESIGN TEAM INFORMATION (JZ)
Kevin Friedman, Electrical Engineering
Michael Shepard, Electrical Engineering
Jiaming Zhou, Electrical Engineering
7.
CONCLUSION (ALL)
As a part of the University of Akron’s entry into the SAE Formula Hybrid
competition, the battery-pack is one of the most important parts of the electrical system of
the vehicle. After experiencing failures during charging the new type LiFePO4 battery
several times, the demand of a dedicated charging system is the created. This project is to
build the charging system so that each cell in the battery-pack is monitored and charged to
its best condition avoiding any charging failures. By learning and demonstrating the main
concepts of this project, Lithium iron phosphate batteries, power circuits, and CAN
protocol, the knowledge and skills as an electrical engineer can be practiced and expanded.
8.
REFERENCES
“Formula Hybrid” 12 September, 2011
<http://www.formula-hybrid.org/pdf/Formula-Hybrid-2010-Rules.pdf>
“Building Safer Li-Ion Batteries” House of Batteries 15. Spet. 2011
<http://www.houseofbatteries.com/articles.php?id=27>
"Internal structure and operation theory of LiFePO4 battery" kinglitech. kinglitech.
<http://www.kinglitech.com/info.asp?id=268>
“Bosch CAN Specification Version 2.0”
<http://esd.cs.ucr.edu/webres/can20.pdf>
DATA SHEETS (MS)
• Opamp
http://www.national.com/ds/LM/LMC6484.pdf
• Gate Driver
53
http://www.fairchildsemi.com/ds/FA%2FFAN3111E.pdf
• Latch
http://www.fairchildsemi.com/ds/FA%2FFAN3111E.pdf
• Current IC Sensor
http://www.allegromicro.com/en/Products/Part_Numbers/0715/0715.pdf
• Microcontroller
http://ww1.microchip.com/downloads/en/DeviceDoc/41302D.pdf
• Relay
http://www.allegromicro.com/en/Products/Part_Numbers/0715/0715.pdf
• Current Transformer
http://media.digikey.com/pdf/Data%20Sheets/CR%20Magnetics%20Inc%20PDFs/CR
8400%20Series.pdf
54