‫ﺗﻤﺮﻳﻦ ﺗﺌﻮﺭﻱ ﺳﻮﻡ‬
‫ﺑﺴﻢ ﺍﷲ ﺍﻟﺮﺣﻤﻦ ﺍﻟﺮﺣﻴﻢ‬
‫‪CMOS‬‬
‫‪ - 1‬ﺑﺎ ﺍﺳﺘﻔﺎﺩﻩ ﺍﺯ ﺗﻜﻨﻮﻟﻮژﻱ ‪ ،CMOS‬ﻣﺪﺍﺭ ‪ (A xnor ~B).C‬ﺭﺍ ﺑﻪﮔﻮﻧﻪﺍﻱ ﭘﻴﺎﺩﻩﺳﺎﺯﻱ ﻛﻨﻴﺪ ﻭ ﺳﺎﻳﺰ ﺗﺮﺍﻧﺰﻳﺴﺘﻮﺭﻫﺎ ﺭﺍ ﺑﻪﮔﻮﻧﻪﺍﻱ‬
‫ﺑﻪﺩﺳﺖ ﺁﻭﺭﻳﺪ ﻛﻪ ﺟﺮﻳﺎﻥ ﺑﺎﻻ ﺭﻭﻧﺪﻩ ﺑﺎ ﺟﺮﻳﺎﻥ ﭘﺎﻳﻴﻦ ﺭﻭﻧﺪﻩ ﻳﻜﻲ ﺑﺎﺷﺪ‪(K=μ.Cox.W/L) .‬‬
‫‪ - 2‬ﻫﻨﮕﺎﻣﻲ ﻛﻪ ﻭﺍﺭﻭﻧﮕﺮ ﻳﻚ ﺧﺎﻧﻮﺍﺩﻩﻱ ﺧﺎﺹ ﺑﺎ ﻣﺪﺍﺭ ﻣﺸﺎﺑﻪ ﺑﺎﺭ ﻣﻲﺷﻮﺩ‪ ،‬ﺩﺍﺭﺍﻱ ﺗﺎﺧﻴﺮ ﺍﻧﺘﺸﺎﺭ ‪ 1.2‬ﻧﺎﻧﻮ ﺛﺎﻧﻴﻪ ﻣﻲﺷﻮﺩ‪.‬‬
‫‪ o‬ﺍﮔﺮ ﺟﺮﻳﺎﻥ ﻣﻮﺟﻮﺩ ﺑﺮﺍﻱ ﭘﺮ ﺷﺪﻥ ﺧﺎﺯﻥ ﻧﺼﻒ ﺟﺮﻳﺎﻥ ﺗﺨﻠﻴﻪ ﺑﺎﺷﺪ‪ ،‬ﺍﺗﻈﺎﺭ ﺩﺍﺭﻳﺪ ‪ tphl‬ﻭ ‪ tplh‬ﭼﻘﺪﺭ ﺑﺎﺷﻨﺪ؟‬
‫‪ o‬ﺍﮔﺮ ﺑﻪ ﻋﻠﺖ ﺍﺿﺎﻓﻪﺷﺪﻥ ﻳﻚ ﺑﺎﺭ ﺧﺎﺯﻧﻲ ﺧﺎﺭﺟﻲ ﺑﺎ ﺍﻧﺪﺍﺯﻩﻱ ‪ 1‬ﭘﻴﻜﻮ ﻓﺎﺭﺍﺩ ﺑﻪ ﺧﺮﻭﺟﻲ ﻭﺍﺭﻭﻧﮕﺮ‪ ،‬ﺗﺎﺧﻴﺮ ﺍﻧﺘﺸﺎﺭ ﺁﻥ ‪70 %‬‬
‫ﺍﻓﺰﺍﻳﺶ ﻳﺎﺑﺪ‪ ،‬ﻣﻘﺎﺩﻳﺮ ﻇﺮﻓﻴﺖ ﺧﺎﺯﻧﻲ ﺗﺮﻛﻴﺒﻲ ﺩﺭ ﻭﺭﻭﺩﻱ ﻭ ﺧﺮﻭﺟﻲ ﺭﺍ ﺑﻪﺩﺳﺖ ﺁﻭﺭﻳﺪ‪.‬‬
‫‪ o‬ﺍﮔﺮ ﺑﺪﻭﻥ ﺍﺗﺼﺎﻝ ﺑﺎﺭ ﺧﺎﺯﻧﻲ‪ ،‬ﻭﺍﺭﻭﻧﮕﺮ ﺑﺎﺭ ﺣﺬﻑ ﺷﻮﺩ ﻭ ﺗﺎﺧﻴﺮﻫﺎﻱ ﺍﻧﺘﺸﺎﺭ ‪ 40 %‬ﻛﻢ ﺷﻮﺩ‪ ،‬ﺩﻭ ﻣﻮﻟﻔﻪﻱ ﺧﺎﺯﻧﻲ ﺑﺨﺶ ﻗﺒﻞ ﺭﺍ‬
‫ﺑﻪﺩﺳﺖ ﺁﻭﺭﻳﺪ‪.‬‬
‫‪ - 3‬ﻣﺪﺍﺭ ‪ (AB+C)AD‬ﺭﺍ ﺑﺎ ﺍﺳﺘﻔﺎﺩﻩ ﺍﺯ ﺗﻜﻨﻮﻟﻮژﻱ ‪ CMOS‬ﭘﻴﺎﺩﻩﺳﺎﺯﻱ ﻛﻨﻴﺪ‪ ،‬ﻫﻤﭽﻨﻴﻦ ﻧﺴﺒﺖ ‪ W/L‬ﺭﺍ ﺑﺮﺍﻱ ﺗﺮﺍﻧﺰﻳﺴﺘﻮﺭﻫﺎ ﻃﻮﺭﻱ‬
‫ﺗﻌﻴﻴﻦ ﻛﻨﻴﺪ ﻛﻪ ‪ tphl‬ﺍﻳﻦ ﻣﺪﺍﺭ ﺑﺮﺍﺑﺮ ‪ tphl‬ﻳﻚ ﻣﻌﻜﻮﺱﻛﻨﻨﺪﻩﻱ ‪ CMOS‬ﺑﺎ ﺍﺑﻌﺎﺩ ﺗﺮﺍﻧﺰﺳﺘﻮﺭ ﭘﺎﻳﻴﻦ ‪ (W/L)=2‬ﺑﺎﺷﺪ‪.‬‬
‫‪ - 4‬ﻓﺮﺽ ﻛﻨﻴﺪ ﺗﻤﺎﻡ ﺍﺑﻌﺎﺩ ﻓﺮﺁﻳﻨﺪ ‪ CMOS‬ﺍﺯ ﺟﻤﻠﻪ ﻗﻄﺮ ﺍﻛﺴﻴﺪ ‪ 20 %‬ﻛﺎﻫﺶ ﻳﺎﺑﺪ‪.‬‬
‫‪ o‬ﭘﺎﺭﺍﻣﺘﺮﻫﺎﻱ ﺯﻳﺮ ﺑﺎ ﭼﻪ ﺿﺮﻳﺒﻲ ﺗﻐﻴﻴﺮ ﻣﻲﻛﻨﻨﺪ؟‬
‫ﺳﻄﺢ ﺗﺮﺍﺷﻪ‪ ،‬ﺟﺮﻳﺎﻥ‪ ،‬ﻇﺮﻓﻴﺖ ﺧﺎﺯﻧﻲ ﻣﻮﺛﺮ‪ ،‬ﺗﺎﺧﻴﺮ ﺍﻧﺘﺸﺎﺭ‪ ،‬ﺗﻮﺍﻥ ﻣﺼﺮﻓﻲ ﮔﺬﺭﺍ‪ ،‬ﺑﻴﺶﺗﺮﻳﻦ ﻓﺮﻛﺎﻧﺲ ﻛﺎﺭ‬
‫‪ o‬ﺍﮔﺮ ﻭﻟﺘﺎژ ﺗﻐﺬﻳﻪ ‪ 20 %‬ﻛﺎﻫﺶ ﻳﺎﺑﺪ‪ ،‬ﭼﻪ ﺗﻐﻴﻴﺮ ﺩﻳﮕﺮﻱ ﺩﺭ ﭘﺎﺭﺍﻣﺘﺮﻫﺎﻱ ﺑﺎﻻ ﺣﺎﺻﻞ ﻣﻲﺷﻮﺩ؟‬
‫‪ - 5‬ﺩﺭ ﻳﻚ ﻣﺪﺍﺭ ‪ NAND‬ﻛﻪ ﺑﺎ ﺗﻜﻨﻮﻟﻮژﻱ ‪ CMOS‬ﺳﺎﺧﺘﻪﺷﺪﻩﺍﺳﺖ ﻣﻲﺧﻮﺍﻫﻴﻢ ﺩﺭ ﺑﺪﺗﺮﻳﻦ ﺷﺮﺍﻳﻂ ﺩﺍﺷﺘﻪ ﺑﺎﺷﻴﻢ‪:‬‬
‫‪tplh=0.75 tphl‬‬
‫‪ o‬ﻧﺴﺒﺖ ‪ (W/L)p‬ﺑﻪ ‪ (W/L)n‬ﺭﺍ ﺗﻌﻴﻴﻦ ﻛﻨﻴﺪ‪(µn=3µp) .‬‬
‫‪ o‬ﺑﺎ ﻓﺮﺽ ‪ CL=1PF ،Vt=1V ،VDD=5V ،µnCox=3 mA/V2 ،(W/L)n=1.5‬ﻭ ‪ µn=3µp‬ﻣﻘﺪﺍﺭ ‪ tp‬ﺭﺍ ﺣﺴﺎﺏ ﻛﻨﻴﺪ‪.‬‬
‫ﺗﻤﺮﻳﻦ ﺗﺌﻮﺭﻱ ﺳﻮﻡ‬
‫‪ - 6‬ﻣﺸﻜﻞ ﺑﺎﻓﺮ ﭘﻴﺎﺩﻩﺳﺎﺯﻱ ﺷﺪﻩ ﺩﺭ ﻣﺪﺍﺭ ﺷﻜﻞ ﺯﻳﺮ ﭼﻴﺴﺖ ﻭ ﭼﻪ ﺭﺍﻩﺣﻠﻲ ﺭﺍ ﺑﺮﺍﻱ ﺣﻞ ﺍﻳﻦ ﻣﺸﻜﻞ ﭘﻴﺸﻨﻬﺎﺩ ﻣﻲﻛﻨﻴﺪ؟‬
‫‪VDD‬‬
‫‪VDD‬‬
‫‪ɸ‬‬
‫‪ɸ‬‬
‫‪y‬‬
‫‪A‬‬
‫‪ɸ‬‬
‫‪ɸ‬‬
‫‪ - 7‬ﺑﺮﺍﻱ ﺳﻪ ﺣﺎﻟﺘﻪ ﻛﺮﺩﻥ ﻣﺪﺍﺭ ﺯﻳﺮ ﻛﺪﺍﻡ ﻣﺪﺍﺭ ﺭﺍ ﭘﻴﺸﻨﻬﺎﺩ ﻣﻲﻛﻨﻴﺪ؟ ﭼﺮﺍ؟‬
‫‪x‬‬
‫‪y‬‬
‫ﺗﻤﺮﻳﻦ ﺗﺌﻮﺭﻱ ﺳﻮﻡ‬
‫‪~C‬‬
‫‪~C‬‬
‫‪x‬‬
‫‪y‬‬
‫‪C‬‬
‫‪C‬‬
‫‪ - 8‬ﻣﻨﻄﻖ ‪ static CMOS‬ﻭ ‪ Dynamic CMOS‬ﺭﺍ ﺍﺯ ﻧﻈﺮ ‪ delay, power, area‬ﻣﻘﺎﻳﺴﻪ ﻛﻨﻴﺪ‪.‬‬
‫‪Pass transistor‬‬
‫‪ - 9‬ﺩﺭ ﻣﺪﺍﺭ ﺷﻜﻞ ﺯﻳﺮ ﺑﺎ ﻓﺮﺽ ‪ Vdd=5V‬ﻭ ‪ Vtp=-1V‬ﻭ ‪ Vtn=1V‬ﻣﻘﺪﺍﺭ ﺧﺮﻭﺟﻲ ﺭﺍ ﺑﻪﺍﺯﺍﻱ ‪ Vin=0‬ﻭ ‪ Vin=4‬ﺑﻪﺩﺳﺖ ﺁﻭﺭﻳﺪ‪.‬‬
‫)ﻣﺸﺨﺼﻪﻱ ﻣﻌﻜﻮﺱﻛﻨﻨﺪﻩﻱ ﻣﺪﺍﺭ ﺑﻪ ﺷﻜﻞ ﺯﻳﺮ ﺍﺳﺖ‪(.‬‬
‫ﺗﻤﺮﻳﻦ ﺗﺌﻮﺭﻱ ﺳﻮﻡ‬
‫‪- 10‬ﭘﺲ ﺍﺯ ﺍﻋﻤﺎﻝ ﻭﺭﻭﺩﻱ ‪ in‬ﺑﻪ ﻣﺪﺍﺭ ﺯﻳﺮ ﺷﻜﻞ ﺯﻳﺮ ﺑﺎ ﻓﺮﺽ ﺍﻳﻨﻜﻪ ‪ Vtn=|Vtp|=1V‬ﺧﺮﻭﺟﻲ ‪ out‬ﭼﻪ ﻣﻲﺑﺎﺷﺪ؟‬
‫‪ - 11‬ﺩﺭ ﻣﺪﺍﺭﻫﺎﻱ ﺯﻳﺮ ﻭﻟﺘﺎژ ﻧﻘﺎﻁ ﻣﺸﺨﺺ ﺷﺪﻩ ﺭﺍ ﺑﺎ ﻓﺮﺽ ‪ Vt=1V‬ﻭ ‪ VDD=5V‬ﺑﻪﺩﺳﺖ ﺁﻭﺭﻳﺪ‪.‬‬
‫‪VDD‬‬
‫‪C‬‬
‫‪VDD‬‬
‫‪B‬‬
‫‪VDD‬‬
‫‪VDD‬‬
‫‪A‬‬
‫‪VDD‬‬
‫‪A‬‬
‫‪B‬‬
‫‪VDD‬‬
‫‪VDD‬‬
‫ﺗﻤﺮﻳﻦ ﺗﺌﻮﺭﻱ ﺳﻮﻡ‬
‫‪ - 12‬ﺧﺮﻭﺟﻲ ﺗﺎﺑﻊ ﺯﻳﺮ ﺭﺍ ﺑﺮ ﺣﺴﺐ ‪ A, B‬ﻣﺸﺨﺺ ﻛﻨﻴﺪ‪.‬‬
‫‪y‬‬
‫‪A‬‬
‫‪B‬‬
‫‪ - 13‬ﺩﺭ ﻣﺪﺍﺭ ﺷﻜﻞ ﺯﻳﺮ ﻓﺎﺻﻠﻪﻱ ﺯﻣﺎﻧﻲ ﺁﻣﺎﺩﻩ ﺷﺪﻥ ﺩﻳﺘﺎﻱ ﺧﺮﻭﺟﻲ ﺩﺭﺳﺖ ﻭ ﺗﺎﺑﻊ ﻣﻨﻄﻘﻲ ﭘﻴﺎﺩﻩ ﺷﺪﻩ ﺩﺭ ﺧﺮﻭﺟﻲ ‪ Vout‬ﺭﺍ ﺑﻴﺎﺑﻴﺪ‪.‬‬
‫ﺗﻤﺮﻳﻦ ﺗﺌﻮﺭﻱ ﺳﻮﻡ‬
‫‪ - 14‬ﺩﺭ ﻫﺮ ﻳﻚ ﺍﺯ ﻣﺪﺍﺭﻫﺎﻱ ﺷﻜﻞ ﺯﻳﺮ ﭼﻪ ﺗﺎﺑﻌﻲ ﺍﺯ ﻭﺭﻭﺩﻱﻫﺎ ﺩﺭ ﺧﺮﻭﺟﻲ ﭘﻴﺎﺩﻩﺳﺎﺯﻱ ﺷﺪﻩ ﺍﺳﺖ؟‬
‫ﺗﻤﺮﻳﻦ ﺗﺌﻮﺭﻱ ﺳﻮﻡ‬