Processes in SystemC:
Examples and Exercises
Part of
HW/SW Codesign of Embedded
Systems Course (CE 40-226)
Winter-Spring 2001
Codesign of Embedded Systems
1
Today programme

Example on structural design
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Example on Explicit state machine

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101 Sequence Detector
Example on Implicit state machine
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Ripple Counter
The same Sequence Detector
Your in-class exercises
Quiz!
Winter-Spring 2001
Codesign of Embedded Systems
2
Structural Design Example:
Ripple Counter
VCC
T
Q
TFF
Winter-Spring 2001
T
Q
TFF
Codesign of Embedded Systems
T
Q
TFF
3
Ripple Counter
(cont’d)
#ifndef __TFF_H__
#define __TFF_H__
#include <systemc.h>
SC_MODULE(tff) {
sc_in<bool> t;
sc_in<bool> clk;
sc_out<bool> q;
bool val;
TFF
TFF
TFF
SC_CTOR(tff) {
SC_METHOD(toggle);
sensitive_neg(clk);
val = false;
}
};
#endif
void toggle()
{
if (t==true)
val = !val;
q = val;
}
Winter-Spring 2001
Codesign of Embedded Systems
4
Ripple Counter
(cont’d)
TFF
TFF
TFF
...
SC_MODULE(rc) {
sc_in<bool> clk;
sc_out<bool> q[CNTR_WIDTH];
tff *ff[CNTR_WIDTH];
sc_signal<bool> vcc;
SC_CTOR(rc) {
char name[10];
vcc = true;
ff[0] = new tff( "Bit0");
(*ff[0])<< vcc<< clk<< q[0];
for(int i=1; i<CNTR_WIDTH; i++) {
ff[i] = new tff( itoa(i, name, 10));
(*ff[i])<< vcc<< q[i-1]<< q[i];
}
}
};
Winter-Spring 2001
Codesign of Embedded Systems
5
SystemC_Win output
Winter-Spring 2001
Codesign of Embedded Systems
6
Explicit State-Machine:
101 Sequence Detector
0
Start
1
1
S1
0
Winter-Spring 2001
0
0
S10
1
S101
1
Codesign of Embedded Systems
7
0
101 Seq. Det.
(cont’d)
enum states {
START, S1, S10, S101
};
SC_MODULE(seq_det) {
sc_in_clk
clk;
sc_in<bool> s;
sc_out<bool> z;
states current_state,
next_state;
void change_state() {
z = false;
switch(current_state) {
Winter-Spring 2001
Start
1
1
S1
0
0
0
S10
1
S101
1
case START:
if (s==true)
next_state = S1;
else
next_state = START;
break;
case S1: ...
case S10: ...
case S101:
z = 1;
if (s==(bool)1) next_state = S1;
else next_state = S10;
}
current_state = next_state;
}
...
}
Codesign of Embedded Systems
8
SystemC_Win output
Winter-Spring 2001
Codesign of Embedded Systems
9
101 Seq. Det.:
IMPLICIT state-machine
void change_state_thread() {
while (true) {
z = 0;
while (s==(bool)0)
wait();
// 1 is detected up to now
do wait();
while (s==(bool)1);
// 10 is detected up to now
do wait();
while (s==false);
// The complete sequence (101) is detected now
z = 1;
wait();
}}
Winter-Spring 2001
Codesign of Embedded Systems
10
101 Seq. Det.:
IMPLICIT state-mach. (cont’d)

Changes required in SC_MODULE
constructor:
SC_CTOR(seq_det) {
/*
SC_THREAD(change_state_thread);
sensitive_pos<<clk;
*/
SC_CTHREAD(change_state_thread, clk.pos());
}
Winter-Spring 2001
Codesign of Embedded Systems
11
SystemC_Win output
Winter-Spring 2001
Codesign of Embedded Systems
12
Your in-class exercises:
Hierarchical design (cont’d)
Pipelined
Multiplier
RShift Reg +
parallel load
Shift Reg
shl/shr input
Barrel Shifter
Array
Multiplier
Serial Adder
RShift Reg
Register
One Stage
of Pipelined
Multiplier
N-bit Adder
Single bit Full Adder
Gates
DFF
Winter-Spring 2001
Codesign of Embedded Systems
13
Complementary notes:
Extra classes

“VHDL Short Course” by A.M. Ghare-Baghi
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
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First session date-time: Monday, Ordibehes 10th, 18 O’clock
Place: Kwarizmi Hall, CE Dept.
“HW Synthesis Techniques Seminar” by S. Safari


Date-Time: Saturday, Ordibehesht 8th, 13 O’clock
Place: Kwarizmi Hall, CE Dept.
Winter-Spring 2001
Codesign of Embedded Systems
14
Second Quiz

Design a ?
Winter-Spring 2001
Codesign of Embedded Systems
15