irf740

IRF740, SiHF740
Vishay Siliconix
Power MOSFET
FEATURES
PRODUCT SUMMARY
VDS (V)
• Dynamic dV/dt Rating
400
RDS(on) (Ω)
VGS = 10 V
Qg (Max.) (nC)
63
• Fast Switching
Qgs (nC)
9.0
• Ease of Paralleling
32
• Simple Drive Requirements
Qgd (nC)
Configuration
Single
COMPLIANT
DESCRIPTION
TO-220
Third generation Power MOSFETs from Vishay provide the
designer with the best combination of fast switching,
ruggedized device design, low on-resistance and
cost-effectiveness.
The TO-220 package is universally preferred for all
commercial-industrial applications at power dissipation
levels to approximately 50 W. The low thermal resistance
and low package cost of the TO-220 contribute to its wide
acceptance throughout the industry.
G
S
D
RoHS*
• Lead (Pb)-free Available
D
G
Available
• Repetitive Avalanche Rated
0.55
S
N-Channel MOSFET
ORDERING INFORMATION
Package
TO-220
IRF740PbF
SiHF740-E3
IRF740
SiHF740
Lead (Pb)-free
SnPb
ABSOLUTE MAXIMUM RATINGS TC = 25 °C, unless otherwise noted
PARAMETER
SYMBOL
LIMIT
Drain-Source Voltage
VDS
400
Gate-Source Voltage
VGS
± 20
Continuous Drain Current
VGS at 10 V
TC = 25 °C
TC = 100 °C
Pulsed Drain Currenta
ID
IDM
Linear Derating Factor
Energyb
UNIT
V
10
6.3
A
40
1.0
W/°C
mJ
EAS
520
Repetitive Avalanche Currenta
IAR
10
A
Repetitive Avalanche Energya
EAR
13
mJ
Single Pulse Avalanche
Maximum Power Dissipation
TC = 25 °C
Peak Diode Recovery dV/dtc
Operating Junction and Storage Temperature Range
Soldering Recommendations (Peak Temperature)
Mounting Torque
for 10 s
6-32 or M3 screw
PD
125
W
dV/dt
4.0
V/ns
TJ, Tstg
- 55 to + 150
300d
°C
10
lbf · in
1.1
N·m
Notes
a. Repetitive rating; pulse width limited by maximum junction temperature (see fig. 11).
b. VDD = 50 V, starting TJ = 25 °C, L = 9.1 mH, RG = 25 Ω, IAS = 10 A (see fig. 12).
c. ISD ≤ 10 A, dI/dt ≤ 120 A/µs, VDD ≤ VDS, TJ ≤ 150 °C.
d. 1.6 mm from case.
* Pb containing terminations are not RoHS compliant, exemptions may apply
Document Number: 91054
S09-0267-Rev. B, 23-Feb-09
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IRF740, SiHF740
Vishay Siliconix
THERMAL RESISTANCE RATINGS
PARAMETER
SYMBOL
TYP.
MAX.
Maximum Junction-to-Ambient
RthJA
-
62
Case-to-Sink, Flat, Greased Surface
RthCS
0.50
-
Maximum Junction-to-Case (Drain)
RthJC
-
1.0
UNIT
°C/W
SPECIFICATIONS TJ = 25 °C, unless otherwise noted
PARAMETER
SYMBOL
TEST CONDITIONS
MIN.
TYP.
MAX.
UNIT
VDS
VGS = 0 V, ID = 250 µA
400
-
-
V
ΔVDS/TJ
Reference to 25 °C, ID = 1 mA
-
0.49
-
V/°C
VGS(th)
VDS = VGS, ID = 250 µA
2.0
-
4.0
V
Gate-Source Leakage
IGSS
VGS = ± 20 V
-
-
± 100
nA
Zero Gate Voltage Drain Current
IDSS
VDS = 400 V, VGS = 0 V
-
-
25
VDS = 320 V, VGS = 0 V, TJ = 125 °C
-
-
250
Static
Drain-Source Breakdown Voltage
VDS Temperature Coefficient
Gate-Source Threshold Voltage
µA
-
-
0.55
Ω
gfs
VDS = 50 V, ID = 6.0 Ab
5.8
-
-
S
Input Capacitance
Ciss
VGS = 0 V,
-
1400
-
Output Capacitance
Coss
VDS = 25 V,
-
330
-
Reverse Transfer Capacitance
Crss
f = 1.0 MHz, see fig. 5
-
120
-
Total Gate Charge
Qg
-
-
63
-
-
9.0
Drain-Source On-State Resistance
Forward Transconductance
RDS(on)
ID = 6.0 Ab
VGS = 10 V
Dynamic
VGS = 10 V
ID = 10 A, VDS = 320 V,
Gate-Source Charge
Qgs
Gate-Drain Charge
Qgd
-
-
32
Turn-On Delay Time
td(on)
-
14
-
Rise Time
Turn-Off Delay Time
Fall Time
tr
td(off)
see fig. 6 and 13b
LD
Internal Source Inductance
LS
nC
VDD = 200 V, ID = 10 A
-
27
-
RG = 9.1 Ω, RD = 20 Ω, see fig. 10b
-
50
-
-
24
-
-
4.5
-
-
7.5
-
-
-
10
-
-
40
-
-
2.0
-
370
790
ns
-
3.8
8.2
µC
tf
Internal Drain Inductance
pF
Between lead,
6 mm (0.25") from
package and center of
die contact
D
ns
nH
G
S
Drain-Source Body Diode Characteristics
Continuous Source-Drain Diode Current
IS
Pulsed Diode Forward Currenta
ISM
Body Diode Voltage
VSD
Body Diode Reverse Recovery Time
trr
Body Diode Reverse Recovery Charge
Qrr
Forward Turn-On Time
ton
MOSFET symbol
showing the
integral reverse
p - n junction diode
D
A
G
TJ = 25 °C, IS = 10 A, VGS = 0
S
Vb
TJ = 25 °C, IF = 10 A, dI/dt = 100 A/µsb
V
Intrinsic turn-on time is negligible (turn-on is dominated by LS and LD)
Notes
a. Repetitive rating; pulse width limited by maximum junction temperature (see fig. 11).
b. Pulse width ≤ 300 µs; duty cycle ≤ 2 %.
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Document Number: 91054
S09-0267-Rev. B, 23-Feb-09
IRF740, SiHF740
Vishay Siliconix
TYPICAL CHARACTERISTICS 25 °C, unless otherwise noted
VGS
15 V
10 V
8.0 V
7.0 V
6.0 V
5.5 V
5.0 V
Bottom 4.5 V
101
100
4.5 V
25 °C
100
20 µs Pulse Width
VDS = 50 V
20 µs Pulse Width
TC = 25 °C
100
10-1
10-1
101
4
VDS, Drain-to-Source Voltage (V)
91054_01
ID, Drain Current (A)
101
4.5 V
100
20 µs Pulse Width
TC = 150 °C
10-1
91054_02
100
Fig. 2 - Typical Output Characteristics, TC = 150 °C
Document Number: 91054
S09-0267-Rev. B, 23-Feb-09
3.0
2.5
7
8
9
10
ID = 10 A
VGS = 10 V
2.0
1.5
1.0
0.5
0.0
- 60 - 40 - 20 0
101
VDS, Drain-to-Source Voltage (V)
6
Fig. 3 - Typical Transfer Characteristics
RDS(on), Drain-to-Source On Resistance
(Normalized)
Top
5
VGS, Gate-to-Source Voltage (V)
91054_03
Fig. 1 - Typical Output Characteristics, TC = 25 °C
VGS
15 V
10 V
8.0 V
7.0 V
6.0 V
5.5 V
5.0 V
Bottom 4.5 V
150 °C
101
ID, Drain Current (A)
ID, Drain Current (A)
Top
91054_04
20 40 60 80 100 120 140 160
TJ, Junction Temperature (°C)
Fig. 4 - Normalized On-Resistance vs. Temperature
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IRF740, SiHF740
Vishay Siliconix
2500
Capacitance (pF)
2000
1500
ISD, Reverse Drain Current (A)
VGS = 0 V, f = 1 MHz
Ciss = Cgs + Cgd, Cds Shorted
Crss = Cgd
Coss = Cds + Cgd
Ciss
1000
Coss
500
Crss
101
VDS, Drain-to-Source Voltage (V)
91054_05
VGS = 0 V
0.70
1.10
VSD, Source-to-Drain Voltage (V)
5
VDS = 320 V
Operation in this area limited
by RDS(on)
2
16
VDS = 200 V
VDS = 80 V
8
4
102
5
10 µs
2
10
100 µs
5
1 ms
2
1
10 ms
5
For test circuit
see figure 13
0
TC = 25 °C
TJ = 150 °C
Single Pulse
2
0.1
0
91054_06
15
30
45
60
75
QG, Total Gate Charge (nC)
Fig. 6 - Typical Gate Charge vs. Drain-to-Source Voltage
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1.50
1.30
103
ID = 10 A
12
0.90
Fig. 7 - Typical Source-Drain Diode Forward Voltage
ID, Drain Current (A)
VGS, Gate-to-Source Voltage (V)
100
91054_07
Fig. 5 - Typical Capacitance vs. Drain-to-Source Voltage
20
25 °C
10-1
0.50
0
100
150 °C
101
0.1
91054_08
2
5
1
2
5
10
2
5
102
2
5
103
VDS, Drain-to-Source Voltage (V)
Fig. 8 - Maximum Safe Operating Area
Document Number: 91054
S09-0267-Rev. B, 23-Feb-09
IRF740, SiHF740
Vishay Siliconix
RD
VDS
10
VGS
ID, Drain Current (A)
8
D.U.T.
RG
6
+
- VDD
10 V
Pulse width ≤ 1 µs
Duty factor ≤ 0.1 %
4
Fig. 10a - Switching Time Test Circuit
2
VDS
0
150
90 %
Fig. 9 - Maximum Drain Current vs. Case Temperature
10 %
VGS
25
50
75
100
125
TC, Case Temperature (°C)
91054_09
td(on)
td(off) tf
tr
Fig. 10b - Switching Time Waveforms
Thermal Response (ZthJC)
10
1
0 - 0.5
PDM
0.2
0.1
0.1
t1
0.05
t2
Notes:
1. Duty Factor, D = t1/t2
2. Peak Tj = PDM x ZthJC + TC
Single Pulse
(Thermal Response)
0.02
0.01
10-2
10-5
10-4
10-3
10-2
0.1
1
10
t1, Rectangular Pulse Duration (S)
91054_11
Fig. 11 - Maximum Effective Transient Thermal Impedance, Junction-to-Case
L
Vary tp to obtain
required IAS
VDS
VDS
tp
VDD
D.U.T
RG
+
-
IAS
V DD
VDS
10 V
tp
0.01 Ω
Fig. 12a - Unclamped Inductive Test Circuit
Document Number: 91054
S09-0267-Rev. B, 23-Feb-09
IAS
Fig. 12b - Unclamped Inductive Waveforms
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IRF740, SiHF740
Vishay Siliconix
EAS, Single Pulse Energy (mJ)
1200
ID
4.5 A
5.3 A
Bottom 10 A
Top
1000
800
600
400
200
0
VDD = 50 V
25
91054_12c
50
75
100
125
150
Starting TJ, Junction Temperature (°C)
Fig. 12c - Maximum Avalanche Energy vs. Drain Current
Current regulator
Same type as D.U.T.
50 kΩ
QG
10 V
12 V
0.2 µF
0.3 µF
QGS
QGD
+
D.U.T.
VG
-
VDS
VGS
3 mA
Charge
IG
ID
Current sampling resistors
Fig. 13a - Basic Gate Charge Waveform
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Fig. 13b - Gate Charge Test Circuit
Document Number: 91054
S09-0267-Rev. B, 23-Feb-09
IRF740, SiHF740
Vishay Siliconix
Peak Diode Recovery dV/dt Test Circuit
+
D.U.T.
Circuit layout considerations
• Low stray inductance
• Ground plane
• Low leakage inductance
current transformer
+
-
-
RG
•
•
•
•
dV/dt controlled by RG
Driver same type as D.U.T.
ISD controlled by duty factor "D"
D.U.T. - device under test
Driver gate drive
P.W.
+
Period
D=
+
-
VDD
P.W.
Period
VGS = 10 V*
D.U.T. ISD waveform
Reverse
recovery
current
Body diode forward
current
dI/dt
D.U.T. VDS waveform
Diode recovery
dV/dt
Re-applied
voltage
VDD
Body diode forward drop
Inductor current
Ripple ≤ 5 %
ISD
* VGS = 5 V for logic level devices
Fig. 14 - For N-Channel
Vishay Siliconix maintains worldwide manufacturing capability. Products may be manufactured at one of several qualified locations. Reliability data for Silicon
Technology and Package Reliability represent a composite of all qualified locations. For related documents such as package/tape drawings, part marking, and
reliability data, see www.vishay.com/ppg?91054.
Document Number: 91054
S09-0267-Rev. B, 23-Feb-09
www.vishay.com
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Legal Disclaimer Notice
Vishay
Disclaimer
All product specifications and data are subject to change without notice.
Vishay Intertechnology, Inc., its affiliates, agents, and employees, and all persons acting on its or their behalf
(collectively, “Vishay”), disclaim any and all liability for any errors, inaccuracies or incompleteness contained herein
or in any other disclosure relating to any product.
Vishay disclaims any and all liability arising out of the use or application of any product described herein or of any
information provided herein to the maximum extent permitted by law. The product specifications do not expand or
otherwise modify Vishay’s terms and conditions of purchase, including but not limited to the warranty expressed
therein, which apply to these products.
No license, express or implied, by estoppel or otherwise, to any intellectual property rights is granted by this
document or by any conduct of Vishay.
The products shown herein are not designed for use in medical, life-saving, or life-sustaining applications unless
otherwise expressly indicated. Customers using or selling Vishay products not expressly indicated for use in such
applications do so entirely at their own risk and agree to fully indemnify Vishay for any damages arising or resulting
from such use or sale. Please contact authorized Vishay personnel to obtain written terms and conditions regarding
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Product names and markings noted herein may be trademarks of their respective owners.
Document Number: 91000
Revision: 18-Jul-08
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