dsPIC30F
Language Tools
Quick Reference
Card
™
ASM30
MPLAB® ASM30 Assembler
Assembler Command Line Options
pic30-as [options|sourcefiles]...
Listing Output
Option
Description
The -a option supports the following suboptions:
Omit false conditionals
Omit debugging directives
Include high-level source
Include assembly
Include macro expansions
Omit forms processing
Include symbols
Include section information
-a[sub-option][=file]
c
d
h
l
m
n
s
i
Informational Output
Option
Description
Warnings treated as errors
Suppress warnings
Warnings issued (default)
No signed overflow warnings
Show help
Show target-specific help
Show statistics after assembly
Show version number
Maximum message output
--fatal-warnings
--no-warn
--warn
-J
--help
--target-help
--statistics
--version
--verbose
Output File Creation
Option
Description
Set name of output to objfile
Set output file type. Coff is default.
Substitute short branches where possible
Don’t substitute short branches (default)
Generate object file even after errors
Write dependency information to file
-o objfile
-omf={coff|elf}
--relax
--no-relax
-Z
-MD file
Other Options
Option
Description
--defsym sym=value
-I dir
-p=proc
Define sym with value
Add dir to .include directories
Set target processor to proc
Special Operators
Operator
tblpage(name)
tbloffset(name)
psvpage(name)
psvoffset(name)
paddr(label)
handle(label)
.sizeof.(name)
.startof.(name)
Description
Get page for table read/write operations
Get pointer for table read/write operations
Get page for PSV data window operations
Get pointer for PSV data window operations
Get 24-bit address of label in program memory
Get 16-bit reference to label in program memory
Get size of section name in address units
Get starting address of section name
ASM30
ASM30
Reserved Symbol Names
Note: Reserved symbol names can be upper or lower case
W0
W8
WREG
LT
LTU
W1
W9
A
GT
GTU
W2
W10
B
LE
LEU
W3
W11
OV
NOV
OA
W4
W12
C
NC
OB
W5
W13
Z
NZ
SA
W6
W14
N
NN
SB
W7
W15
GE
GEU
Assembler Directives
Sections
Directive
Description
.section name [,type]
[,attr1,attr2,...,attrn]
.text
.bss
.data
Set section name with type and attr
type:
attr:
code
address(a)
data
near
bss
xmemory
persist
ymemory
psv
reverse(n)
eedata
align(n)
.section .text,code
.section .bss,bss
.section .data,data
Constant Initialization
Directive
.ascii
.asciz
.byte
.pbyte
.word
.pword
.long
.float
.double
Description
String with no trailing zero byte
String with trailing zero byte
8-bit value
8-bit value including upper byte of program memory
16-bit value
24-bit value including upper byte of program memory
32-bit value
32-bit single precision floating point
64-bit double precision floating point
Symbols
Directive
.bss sym, len
.comm sym, len
.extern sym
.global sym
.weak sym
.equ sym, expr
.equiv sym, expr
Description
Reserve len bytes for uninitialized symbols
Declare common
Defined as global in another module
Symbol available in other modules
Mark symbol as weak
Set value of sym to expr
Like .equ, but issues error if sym already defined
ASM30
ASM30
Section Location
Directive
Description
.align algn[,byte[,max-skip]]
.palign algn[,byte[,max-skip]]
.fill repeat[,size[,byte]]
.pfill repeat[,size[,byte]]
.org new-lc[,byte]
.porg new-lc[,byte]
.skip size[,byte]
.space size[,byte]
.pskip size[,byte]
.pspace size[,byte]
Pad to algn boundary
Pad to algn boundary in program
memory specifying upper byte
Fill repeat bytes
Fill repeat bytes in program
memory, specifying upper byte
Set location counter
Set location counter in code
section specifying upper byte
Fill bytes
Fill bytes in program memory
specifying upper byte
Conditional
Directive
.if expr
.ifdef sym
.ifndef sym
.else
.endif
.err msg
Description
Start of conditional
Conditional if sym defined
Conditional if sym not defined
Alternative to conditional
End of conditional
Print message
MPLAB LINK30 Object Linker
pic30-ld [options] file...
Command Line Options
Option
Description
-l libname
Search for library libname
-M
Print map file on standard output
-r
Generate relocatable output
-S
Strip debug symbols
-T file
Read linker script
-u sym
Start with undefined reference to sym
-v
Print version information
-( -llib1 ... -llibn -) Resolve circular references in libraries
--no-check-sections
Do not check section addresses overlap
--cref
Output cross reference table
--defsym sym=expr
Define symbol
--heap size
Set heap to size bytes
--help
Print list of command line options
-Map file
Write a map file
--no-data-init
Don’t create initialized data template
--no-handles
Don’t create handle jump table
--no-pack-data
Use only lower 16-bits for data storage
-omf={coff|elf}
Set output file type. Coff is default.
--report-mem
Write memory report to standard output
--stack size
Set minimum stack to size bytes (default=16)
--warn-once
Warn only once per undefined symbol
--warn-section-align
Warn if alignment changes start of section
LINK30
Utilities
Object File Utilities
Executables
Name
pic30-ar
pic30-bin2hex
pic30-nm
pic30-objdump
pic30-ranlib
pic30-strings
pic30-strip
pic30-lm
Description
Manage libraries
Convert executable to Intel HEX file
List symbols from an object file
Display information about object files
Generate library index
Print character sequences from file
Discard all symbols from an object or archive file
License manager
pic30-objdump Utility
pic30-objdump [ -options ] file
Options
Option
-a
-d
-D
-z
-f
-g
-h
-j name
-l
-S
-M symbolic
-omf={coff|elf}
-r
-s
-t
-x
--start-address=adr
--stop-address=adr
-V
-H
Description
Display archive header information
Disassemble sections that contain instructions
Disassemble all sections
Disassemble blocks, even if zeroes
Display summary information from headers
Display debugging information
Display summary information from section headers
Display information only for section name
Label display with file names and line numbers
Display source intermixed with disassembly
Perfom symbolic disassembly
Set output file type. Coff is default.
Print relocation entries of file
Display full contents of section(s)
Print symbol table entries of file
Display all available header information
same as: -a -f -h -r -t
Start displaying data at adr for -d, -r, -s
Stop displaying data at adr for -d, -r, -s
Print the version number
Print summary of options
MPLAB LIB30 Archiver/Librarian
pic30-ar option [mods [relpos] [count]] archive [member...]
Options
Option
d
p
r
t
x
Description
Delete modules from the archive
Print specified members of archive
Insert the files member... into archive (with replacement)
Display a table listing the contents of archive or files in member
Extract members from archive
Utilities
Utilities
Modifiers
Modifier
a
b
c
i
o
P
S
U
v
V
Description
Add new files after existing member of archive
Add new files before existing member of archive
Create the archive
Insert new files before existing member of archive
Preserve original dates of members when extracting
Use full path
Do not generate archive symbol table
Insert only those newer than existing
Verbose version
Show version number
MPLAB SIM30 Simulator
sim30
[command-file-name]
Commands
Command
LP
LF
DM
DF
DA
DB
DW
DC
DP
DH
DS
AF
MS
MC
FS
FC
BS
BC
RP
RC
VO
VF
IO
IF
PS
LD
LC
LS
Q
S
E
H
HE
HW
filename [adr]
filename [adr]
[start] [end]
[start] [end]
freq
start end/val[val]
start [end]
start end/val [val]
start [end]
adr1 ...[adrN]
adr1 ...[adrN]
value
devicename
filename
filename
Description
Load Program memory
Load File registers
Display program Memory
Display File registers
Display Accumulators
Display Breakpoints
Display W registers
Display pC disassembled
Display Profile
Display Help on all
Display Status register fields
Alter clock Frequency
Program Memory Set
Program Memory Clear
File register Set
File register Clear
Breakpoint Set
Breakpoint Clear
Reset Processor
Reset Clock
Verbose On
Verbose ofF
Turn simulated I/o file On
Turn simulated I/o file ofF
PC Set
Load Device
Load COFF or ELF file
Load SCL file
Quit
Step
Execute
Halt
Halt on Error
Halt on Warning
SIM30
C30
MPLAB C30 Compiler
pic30-gcc [options] files
Integer Data Types
Type
Bits
Min
char, signed char
8
-128
127
unsigned char
8
0
255
short, signed short
16
-32768
32767
unsigned short
16
0
65535
int, signed int
16
-32768
32767
unsigned int
16
0
65535
long, signed long
32
-231
231 - 1
unsigned long
32
0
232 - 1
63
Max
long long, signed long long
64
-2
263 - 1
unsigned long long
64
0
264 - 1
IEEE Floating Point Data Types
Bits
E min
E max
N min
N max
(approx)
float
32
-126
127
2-126
2128
double*
32
-126
127
2-126
2128
long double
64
-1022
1023
2-1022
21024
Type
* double is equivalent to long double if -fno-short-double is used.
Attributes of Variables
Option
Description
section (name)
near
far
space(xmemory)
space(ymemory)
space(auto_psv)
space(psv)
space(eedata)
address(addr)
reverse(n)
persistent
unordered
Specify that variable is located in section name.
Example: int x __attribute__
((section("foo")))=0;
Variable is allocated in first 8 KB of data memory
Variable can be located anywhere in data memory
Variable placed in X memory
Variable placed in Y memory
Variable placed in compiler managed PSV memory
Variable placed in PSV memory
Variable placed in EEDATA memory
Specify absolute address for variable
Align end on n- aligned boundary
uninitialized variable not zeroed at startup
allocate space on best-fit
Attributes of Functions
Option
noreturn
weak
near
far
shadow
interrupt
address(addr)
Description
Indicate the function cannot return
Declaration emitted as weak symbol rather than global
Function within 32K range
Function anywhere in memory
Use shadow registers rather than stack
for saving registers W0-W3
Specify function is an interrupt handler
Specify absolute address for function
C30
C30
General Options
Option
Description
Stop after assembly
Stop after preprocessing stage
Place output in file
Stop after compilation
Print commands executed during compilation
Description of the command line options
Define symbol name
Undefine symbol name
Pass options to linker
-c
-E
-o file
-S
-v
--help
-D name[=value]
-U name
-Wl,option1,...,optionN
Memory Model Command Line Options
Option
Memory Definition
-msmall-data
-msmall-scalar
-mlarge-data
-msmall-code
-mlarge-code
-mconst-in-data
-mconst-in-code
Put all data in first 8 KB of data memory (default)
Put all scalars in first 8 KB of data memory (default)
Greater than 8 KB of data memory
Up to 32 Kwords of program memory (default)
Greater than 32 Kwords of program memory
Local constants in data memory
Local constants in program memory (PSV) (default)
Options for Debugging
Option
Description
-g
Produce debugging information
-omf={coff|elf} Set output file type. Coff is default.
-save-temps
Do not delete intermediate files
Options for Controlling Optimization
NOTE: Enabling optimizations may affect debugging
Option
-O0
-O1
-O2
-O3
-Os
-mpa
Description
Do not optimize (default)
Minimal optimization
Optimize to balance size and speed
Optimize for speed
Optimize for size
Enable procedural abstraction optimization
Built-In Functions
Function
int __builtin_divsd(const long num, const int den);
unsigned __builtin_divud(const unsigned long num,
const unsigned den);
long __builtin_mulss(const int p0, const int p1);
long __builtin_mulsu(const int p0, const unsigned p1);
long __builtin_mulus(const unsigned p0, const int p1);
unsigned long __builtin_muluu(const unsigned p0,
const unsigned p1);
unsigned __builtin_tblpage(const void *p);
unsigned __builtin_tbloffset(const void *p);
unsigned __builtin_psvpage(const void *p);
unsigned __builtin_psvoffset(const void *p);
C30
dsPIC30F
Program Memory Map
RESET Instruction
User Memory
Space
Reserved
Oscillator Fail Trap Vector
Address Error Trap Vector
Stack Error Trap Vector
Math Error Trap Vector
Reserved
Reserved
Reserved
Interrupt 0 Vector
Interrupt 1 Vector
Interrupt 52 Vector
Interrupt 53 Vector
Alternate Vector Table
000002
000004
000014
00007E
000080
0000FE
000100
User Flash
Program Memory
017FFE
018000
Reserved
(Read 0’s)
7FEFFE
7FF000
Data Flash
7FFFFE
800000
Reserved
Configuration Memory
Space
Unit ID
8005BE
8005C0
8005FE
800600
Reserved
Configuration
Registers
F7FFFE
F80000
F8000E
F80010
Reserved
Device ID
dsPIC30F
FEFFFE
FF0000
FFFFFE
dsPIC30F
dsPIC30F Architecture
Indirect Mode Syntax
Function
Syntax
No Modification
Pre-Increment
Pre-Decrement
Post-Increment
Post-Decrement
Register Offset
[Wn]
[++Wn]
[--Wn]
[Wn++]
[Wn--]
[Wn+Wb]
Byte Inst
EA = [Wn]
EA = [Wn += 1]
EA = [Wn -= 1]
EA = [Wn] += 1
EA = [Wn] -= 1
EA = [Wn + Wb]
Word Inst
EA = [Wn]
EA = [Wn += 2]
EA = [Wn -= 2]
EA = [Wn] += 2
EA = [Wn] -= 2
EA = [Wn + Wb]
DSP MAC Indirect Addressing Modes
Addressing Mode
No Modification
Post-Inc by 2
Post-Inc by 4
Post-Inc by 6
Post-Dec by 2
Post-Dec by 4
Post-Dec by 6
Register Offset
X Memory
Y Memory
EA = [Wx]
EA = [Wx]+= 2
EA = [Wx]+= 4
EA = [Wx]+= 6
EA = [Wx]-= 2
EA = [Wx]-= 4
EA = [Wx]-= 6
EA = [W9 + W12]
EA = [Wy]
EA = [Wy]+= 2
EA = [Wy]+= 4
EA = [Wy]+= 6
EA = [Wy]-= 2
EA = [Wy]-= 4
EA = [Wy]-= 6
EA = [W11 + W12]
Registers
Register
ACCA, ACCB
CORCON
DCOUNT
DOEND
DOSTART
PC
PSVPAG
RCOUNT
SPLIM
SR
TBLPAG
W0 through W15
WREG
Description
40-bit DSP Accumulators
CPU Core Configuration register
DO Loop Count register
DO Loop End Address register
DO Loop Start Address register
Program Counter
Program Space Visibility Page Address register
Repeat Loop Count register
Stack Pointer Limit value register
ALU and DSP engine Status register
Table Memory Page Address register
Working register array
Synonym for W0
Symbols Used in Instruction Set Tables
Symbol
f
Wb
Wd
Wm,Wn
Wn
Wnd
Wns
Ws
Wx
Wxd
Wy
Wyd
Description
File Register Address
Base Working Register
Destination Working Register (direct and indirect)
Working Register Pair (dividend, divisor)
Both Source and Destination Working Register (direct)
Destination Working Register (direct)
Source Working Register (direct)
Source Working Register (direct and indirect)
Source Addressing Mode and Working Register for X Data
Destination Working Register for X Data
Source Addressing Mode and Working Register for Y Data
Destination Working Register for Y Data
dsPIC30F
dsPIC30F
Instruction Set
Asm
ADD
ADDC
AND
ASR
BCLR
BRA
BSET
BSW.C
BSW.Z
BTG
BTSC
BTSS
BTST
BTST.C
Operand
f{,WREG}
#lit10,Wn
Wb,#lit5,Wd
Wb,Ws,Wd
Acc
Ws,#Slit4,Acc
f{,WREG}
#lit10,Wn
Wb,#lit5,Wd
Wb,Ws,Wd
f{,WREG}
#lit10,Wn
Wb,#lit5,Wd
Wb,Ws,Wd
f{,WREG}
Ws,Wd
Wb,#lit4,Wnd
Wb,Wns,Wnd
f,#bit4
Ws,#bit4
Expr
Wn
C,Expr
GE,Expr
GEU,Expr
GT,Expr
GTU,Expr
LE,Expr
LEU,Expr
LT,Expr
LTU,Expr
N,Expr
NC,Expr
NN,Expr
NOV,Expr
NZ,Expr
OA,Expr
OB,Expr
OV,Expr
SA,Expr
SB,Expr
Z,Expr
f,#bit4
Ws,#bit4
Ws,Wb
Ws,Wb
f,#bit4
Ws,#bit4
f,#bit4
Ws,#bit4
f,#bit4
Ws,#bit4
f,#bit4
Ws,#bit4
Ws,Wb
Description
Destination = f + WREG
Wn = lit10 + Wn
Wd = Wb + lit5
Wd = Wb + Ws
Add Accumulators
Add signed lit4 to Accumulator
Dest = f + WREG + (C)
Wn = lit10 + Wn + (C)
Wd = Wb + lit5 + (C)
Wd = Wb + Ws +(C)
Destination = f .AND. WREG
Wn = lit10 .AND. Wn
Wd = Wb .AND. lit5
Wd = Wb .AND. Ws
Dest = arith right shift f
Wd = arith right shift Ws
Wnd = arith right shift Wb by lit4
Wnd = arith right shift Wb by Wns
Bit clear f
Bit clear Ws
Branch always
Computed branch
Branch if carry
Branch if >= 1
Branch if unsigned >=1
Branch if > 1
Branch if unsigned > 1
Branch if <= 1
Branch if unsigned <= 1
Branch if <1
Branch if unsigned < 1
Branch if negative
Branch if not carry
Branch if not negative
Branch if not overflow
Branch if not zero
Branch if Accumulator A overflow
Branch if Accumulator B overflow
Branch if overflow
Branch if Accumulator A saturated
Branch if Accumulator B saturated
Branch if zero
Bit set f
Bit set Ws
Write C bit to Ws<Wb>
Write Z bit to Ws<Wb>
Bit toggle f
Bit toggle Ws
Bit test f, skip if clear
Bit test Ws, skip if clear
Bit test f, skip if set
Bit test Ws, skip if set
Bit test f
Bit test Ws to C
Bit test Ws<Wb> to C
dsPIC30F
W
C
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
2
2
1-2
1-2
1-2
1-2
1-2
1-2
1-2
1-2
1-2
1-2
1-2
1-2
1-2
1-2
1-2
1-2
1-2
1-2
1-2
1-2
1
1
1
1
1
1
1-3
1-3
1-3
1-3
1
1
1
dsPIC30F
Instruction Set (Continued)
Asm
BTST.Z
Operand
Ws,#bit4
Ws,Wb
BTSTS
f,#bit4
BTSTS.C Ws,#bit4
BTSTS.Z Ws,#bit4
CALL
Expr
Wn
CLR
f
WREG
Wd
Acc,Wx,Wxd,Wy,
Wyd,AWB
CLRWDT
COM
f{,WREG}
Ws,Wd
CP
f
Wb,#lit5
Wb,Ws
CP0
f
Ws
CPB
f
Wb,#lit5
Wb,Ws
CPSEQ
Wb,Ws
CPSGT
Wb,Ws
CPSLT
Wb,Ws
CPSNE
Wb,Ws
DAW.B
Wn
DEC
f{,WREG}
Ws,Wd
DEC2
f{,WREG}
Ws,Wd
DISI
#lit14
DIV.SW
Wm,Wn
DIV.SD
Wm,Wn
DIV.UW
Wm,Wn
DIV.UD
Wm,Wn
DIVF
Wm,Wn
DO
#lit14,Expr
Wn,Expr
ED
Wm*Wm,Acc,Wx,
Wy,Wxd
EDAC
Wm*Wm,Acc,Wx,
Wy,Wxd
EXCH
Wns,Wnd
FBCL
Ws,Wnd
FF1L
Ws,Wnd
FF1R
Ws,Wnd
GOTO
Expr
Wn
INC
f{,WREG}
Ws,Wd
INC2
f{,WREG}
Ws,Wd
IOR
f{,WREG}
W
C
Bit test Ws to Z
Bit test Ws<Wb> to Z
Bit test f then set f
Bit test Ws to C then set Ws
Bit test Ws to Z then set Ws
Call subroutine
Call indirect subroutine
f = 0x0000
WREG = 0x0000
Wd = 0x0000
Clear Accumulator
Description
1
1
1
1
1
2
1
1
1
1
1
1
1
1
1
2
2
1
1
1
1
1
Clear watchdog timer
Destination = f
Wd = Ws
Compare (f – WREG)
Compare (Wb – lit5)
Compare (Wb – Ws)
Compare (f – 0)
Compare (Ws – 0)
Compare w/ Borrow (f – WREG – C)
Compare w/ Borrow (Wb – lit5 – C)
Compare w/ Borrow (Wb – Ws – C)
Compare (Wb - Ws), skip if =
Compare (Wb - Ws), skip if >
Compare (Wb - Ws), skip if <
Compare (Wb - Ws), skip if <>
Wn = decrement and adjust Wn
Destination = f – 1
Wd = Ws – 1
Destination = f – 2
Wd = Ws – 2
Disable interrupt for (lit14+1) cycles
Signed 16/16-bit integer divide
Signed 32/16-bit integer divide
Unsigned 16/16-bit integer divide
Unsigned 32/16-bit integer divide
Signed 16/16-bit fractional divide
Do thru PC+Expr(lit14+1) times
Do thru PC+Expr(Wn+1) times
Euclidean distance (no accumulate)
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
2
2
1
1
1
1
1
1
1
1
1
1
1
1-3
1-3
1-3
1-3
1
1
1
1
1
1
18
18
18
18
18
2
2
1
1
1
1
1
1
1
1
2
1
1
1
1
1
1
1
1
1
1
2
2
1
1
1
1
1
Euclidean distance
Swap Wns and Wnd
Find bit change from left (MSb)
Find first 1 from left (MSb)
Find first 1 from right (LSb)
Go to address
Go to address indirectly
Destination = f + 1
Wd = Ws + 1
Destination = f + 2
Wd = Ws + 2
Destination = f .IOR. WREG
dsPIC30F
dsPIC30F
Instruction Set (Continued)
Asm
IOR
LAC
LNK
LSR
MAC
MOV
MOV.B
MOV.D
MOVSAC
MPY
MPY
MPY.N
MSC
MUL
MUL.SS
MUL.SU
MUL.US
MUL.UU
NEG
NOP
NOPR
POP
POP.D
POP.S
PUSH
PUSH.D
PUSH.S
PWRSAV
Operand
#lit10,Wn
Wb,#lit5,Wd
Wb,Ws,Wd
Ws,#Slit4,Acc
#lit14
f{,WREG}
Ws,Wd
Wb,#lit4,Wnd
Wb,Wns,Wnd
Wm*Wn,Acc,Wx,
Wxd,Wy,Wyd,AWB
Wm*Wm,Acc,Wx,
Wxd, Wy,Wyd
f{,WREG}
WREG,f
f,Wnd
Wns,f
#lit16,Wnd
[Ws+Slit10],Wnd
Wns,[Wd+Slit10]
Ws,Wd
#lit8,Wnd
Ws,Wnd
Wns,Wd
Acc,Wx,Wxd,Wy,
Wyd,AWB
Wm*Wn,Acc,Wx,
Wxd,Wy,Wyd
Wm*Wm,Acc,Wx,
Wxd,Wy,Wyd
Wm*Wn,Acc,Wx,
Wxd,Wy,Wyd
Wm*Wn,Acc,Wx,
Wxd,Wy,Wyd,AWB
f
Wb,Ws,Wnd
Wb,#lit5,Wnd
Wb,Ws,Wnd
Wb,Ws,Wnd
Wb,#lit5,Wnd
Wb,Ws,Wnd
f{,WREG}
Ws,Wd
Acc
f
Wd
Wnd
f
Ws
Wns
#lit1
Description
W
C
Wn = lit10 .IOR. Wn
Wd = Wb .IOR. lit5
Wd = Wb .IOR. Ws
Load Accumulator
Link frame pointer
Destination = log right shift f
Wd = log right shift Ws
Wn = log right shift Wb by lit4
Wnd = log right shift Wb by Wns
Multiply Wm by Wn to Accumulator
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Square Wm to Accumulator
Move f to destination
Move WREG to f
Move f to Wnd
Move Wns to f
Move 16-bit literal to Wnd
Move [Ws + offset] to Wnd
Move Wns to [Wd + offset]
Move Ws to Wd
Move 8-bit literal to Wnd
Move double Ws to Wnd:Wnd+1
Move double Wns:Wns+1 to Wd
Move Wx to Wxd and Wy to Wyd
Multiply Wn by Wm to Accumulator
Square Wm to Accumulator
Negative Multiply Wn by Wm to
Accumulator
Multiply Wm by Wn and subtract
from Accumulator
W3:W2 = f ∗ WREG
{Wnd+1,Wnd} = sign(Wb)∗sign(Ws)
{Wnd+1,Wnd} = sign(Wb)∗uns(lit5)
{Wnd+1,Wnd} = sign(Wb)∗uns(Ws)
{Wnd+1,Wnd} = uns(Wb)∗sign(Ws)
{Wnd+1,Wnd} = uns(Wb)∗uns(lit5)
{Wnd+1,Wnd} = uns(Wb)∗uns(Ws)
Destination = f + 1
Wd = Ws + 1
Negate Accumulator
No operation
No operation
Pop top of stack to f
Pop top of stack to Wd
Double pop from top of stack
to Wnd:Wnd+1
Pop shadow registers
Push f to top of stack
Push Ws to top of stack
Push double Wns:Wns+1 to TOS
Push shadow registers
Enter power saving mode lit1
dsPIC30F
dsPIC30F
Instruction Set (Continued)
Asm
RCALL
REPEAT
RESET
RETFIE
RETLW
RETURN
RLC
RLNC
RRC
RRNC
SAC
SAC.R
SE
SETM
SFTAC
SL
SUB
SUBB
SUBBR
SUBR
SWAP
TBLRDH
TBLRDL
TBLWTH
TBLWTL
ULNK
XOR
ZE
Operand
Expr
Wn
#lit14
Wn
#lit10,Wn
f{,WREG}
Ws,Wd
f{,WREG}
Ws,Wd
f{,WREG}
Ws,Wd
f{,WREG}
Ws,Wd
Acc,#Slit4,Wd
Acc,#Slit4,Wd
Ws,Wnd
f
WREG
Wd
Acc,#Slit6
Acc,Wn
f{,WREG}
Ws,Wd
Wb,#lit4,Wnd
Wb,Wns,Wnd
f{,WREG}
#lit10,Wn
Wb,#lit5,Wd
Wb,Ws,Wd
Acc
f{,WREG}
#lit10,Wn
Wb,#lit5,Wd
Wb,Ws,Wd
f{,WREG}
Wb,#lit5,Wd
Wb,Ws,Wd
f{,WREG}
Wb,#lit5,Wd
Wb,Ws,Wd
Wn
Ws,Wd
Ws,Wd
Ws,Wd
Ws,Wd
f{,WREG}
#lit10,Wn
Wb,#lit5,Wd
Wb,Ws,Wd
Ws,Wnd
Description
W
C
Relative call
Computed call
Repeat next inst (lit14+1) times
Repeat next inst (Wn+1) times
Software RESET
Return with interrupt enabled
Return with literal10 in Wn
Return from subroutine
Destination = rotate left thru Carry f
Wd = rotate left thru Carry Ws
Destination = rotate left (no Carry) f
Wd = rotate left (no Carry) Ws
Destination= rotate right thru Carry f
Wd = rotate right thru Carry Ws
Destination= rotate right (no Carry) f
Wd = rotate right (no Carry) Ws
Store Accumulator
Store rounded Accumulator
Wnd = sign-extend Ws
Set f = 0xFFFF
Set WREG = 0xFFFF
Set Wd = 0xFFFF
Arith shift Accumulator by Slit6
Arith shift Accumulator by (Wn)
Destination = left shift f
Wd = left shift Ws
Wnd = left shift Wb by lit4
Wnd = left shift Wb by Wns
Destination = f – WREG
Wn = Wn – lit10
Wd = Wb – lit5
Wd = Wb – Ws
Subtract Accumulators
Destination = f–WREG–(C)
Wn = Wn – lit10–(C)
Wd = Wb – lit5–(C)
Wd = Wb – Ws–(C)
Destination = WREG–f–(C)
Wd = lit5 – Wb–(C)
Wd = Ws – Wb–(C)
Destination = WREG–f
Wd = lit5 – Wb
Wd = Ws – Wb
Wn = byte/nibble swap Wn
Read high program word to Wd
Read low program word to Wd
Write Ws to high program word
Write Ws to low program word
Unlink frame pointer
Destination = f .XOR. WREG
Wn = lit10 .XOR. Wn
Wd = Wb .XOR. lit5
Wd = Wb .XOR. Ws
Wnd = zero extend Ws
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dsPIC30F
dsPIC30F
Data Memory Map
MS Byte
Address
LS Byte
Address
16-bits
MSB
LSB
0x0000
0x0001
SFR Space
Near RAM
0x07FF
0x0801
0x07FE
0x0800
X Data RAM
Note 1
Note 2
0x1FFF
Y Data RAM
0x2800
0x8001
0x8000
Provides Program
Space Visibility
Note 3
0x2801
X Data RAM
Unimplemented
0xFFFE
0xFFFF
Note 1: Varies with part - Maximum = 0x17FF
Note 2: Varies with part - Always contiguous with end of X Data RAM
Note 3: Varies with part - Maximum = 0x27FF
dsPIC30F
Microchip Technology Inc.
2355 W. Chandler Blvd. · Chandler, AZ 85224 U.S.A.
Phone: 480-792-7200 · Fax: 480-792-7277
www.microchip.com
The Microchip name and logo, the Microchip logo,
dsPIC, MPLAB, PIC and PICmicro are registered
trademarks of Microchip Technology Incorporated
in the U.S.A. and other countries.
© 2004 Microchip Technology Incorporated
All rights reserved. Printed in the U.S.A. 10/04 DS51322D
*DS51322D*