2/14/2011
Register Indirect with Offset
Add to R1 using Register Indirect with Offset with R2 as the index
Last of Microcode?
bus IR resu bus bus bus PC bus R1 bus R2 bus bus M
B
→ adr lt → → → → → → → → → → →
R
IR → bus A opr PC bus R1 bus R2 bus MA M
bus
L nd
R
B
→
U
R bus
COMP375
Computer Architecture and Organization
X
X
A
L
U
fun
Mem
func
X
X
add
X
X
X
read
X
wait
X
X
X
add
X
Register Indirect with Offset
Register Indirect with Offset
Add to R1 using Register Indirect with Offset with R2 as the index
Add to R1 using Register Indirect with Offset with R2 as the index
Add
Read
bus IR resu bus bus bus PC bus R1 bus R2 bus bus M
B
→ adr lt → → → → → → → → → → →
R
IR → bus A opr PC bus R1 bus R2 bus MA M
bus
L nd
R
B
→
U
R bus
X
X
Mem
func
bus IR resu bus bus bus PC bus R1 bus R2 bus bus M
B
→ adr lt → → → → → → → → → → →
R
IR → bus A opr PC bus R1 bus R2 bus MA M
bus
L nd
R
B
→
U
R bus
X
X
X
add
X
X
X
X
X
read
X
X
X
Mem
func
add
X
add
A
L
U
fun
X
X
wait
X
X
X
read
X
X
X
A
L
U
fun
wait
X
add
X
1
2/14/2011
Register Indirect with Offset
Register Indirect with Offset
Add to R1 using Register Indirect with Offset with R2 as the index
Add to R1 using Register Indirect with Offset with R2 as the index
Add
Wait
bus IR resu bus bus bus PC bus R1 bus R2 bus bus M
B
→ adr lt → → → → → → → → → → →
R
IR → bus A opr PC bus R1 bus R2 bus MA M
bus
L nd
R
B
→
U
R bus
X
X
A
L
U
fun
Mem
func
X
X
X
add
X
X
X
X
read
X
X
X
X
X
Register Indirect with Offset
Add to R1 using Register Indirect with Offset with R2 as the index
read
X
wait
X
X
Mem
func
add
X
add
A
L
U
fun
X
X
wait
X
X
bus IR resu bus bus bus PC bus R1 bus R2 bus bus M
B
→ adr lt → → → → → → → → → → →
R
IR → bus A opr PC bus R1 bus R2 bus MA M
bus
L nd
R
B
→
U
R bus
X
add
X
Pop Instruction
• Read the memory location whose address is in th
the stack pointer
t k i t
bus IR resu bus bus bus PC bus R1 bus R2 bus bus M
B
→ adr lt → → → → → → → → → → →
R
IR → bus A opr PC bus R1 bus R2 bus MA M
bus
L nd
R
B
→
U
R bus
X
X
Mem
func
Current top of stack
…
…
…
X
X
add
X
X
X
Stack pointer, R2
read
X
X
X
A
L
U
fun
wait
X
add
X
2
2/14/2011
Pop R1
Pop Instruction
Read the address in R2 and decremented R2.
dec
• Decrement the stack pointer
Read
Stack pointer, R2
Current top of stack
p
…
…
bus IR resu bus bus bus PC bus R1 bus R2 bus bus M
B
→ adr lt → → → → → → → → → → →
R
IR → bus A opr PC bus R1 bus R2 bus MA M
bus
L nd
R
B
→
U
R bus
X
X
X
X
A
L
U
fun
Mem
func
dec
read
X
wait
X
X
Pop R1
Pop R1
Save result in R2. Wait for read.
Copy top of stack data to R1.
Wait
bus IR resu bus bus bus PC bus R1 bus R2 bus bus M
B
→ adr lt → → → → → → → → → → →
R
IR → bus A opr PC bus R1 bus R2 bus MA M
bus
L nd
R
B
→
U
R bus
X
X
X
X
X
X
A
L
U
fun
Mem
func
dec
read
wait
X
bus IR resu bus bus bus PC bus R1 bus R2 bus bus M
B
→ adr lt → → → → → → → → → → →
R
IR → bus A opr PC bus R1 bus R2 bus MA M
bus
L nd
R
B
→
U
R bus
X
X
X
X
X
X
A
L
U
fun
Mem
func
dec
read
wait
X
3
2/14/2011
Read memory location dog
Memory Operand Instruction
inc dog
• The value at the memory location (dog) is incremented by one.
• Direct memory addressing
• Calculations occur in the CPU
– Read memory value
– Increment number
– Store value back to memory
Read
bus IR resu bus bus bus PC bus R1 bus R2 bus bus M
B
→ adr lt → → → → → → → → → → →
R
IR → bus A opr PC bus R1 bus R2 bus MA M
bus
L nd
R
B
→
U
R bus
X
A
L
U
fun
X
Mem
func
read
wait
X
X
X
inc
X
write
wait
Wait for the read
Copy dog to the ALU and inc
Inc
Wait
bus IR resu bus bus bus PC bus R1 bus R2 bus bus M
B
→ adr lt → → → → → → → → → → →
R
IR → bus A opr PC bus R1 bus R2 bus MA M
bus
L nd
R
B
→
U
R bus
X
A
L
U
fun
X
Mem
func
read
bus IR resu bus bus bus PC bus R1 bus R2 bus bus M
B
→ adr lt → → → → → → → → → → →
R
IR → bus A opr PC bus R1 bus R2 bus MA M
bus
L nd
R
B
→
U
R bus
X
A
L
U
fun
X
read
wait
X
X
X
X
wait
inc
X
write
wait
Mem
func
X
X
X
inc
write
wait
4
2/14/2011
Write the results back to dog
inc dog
Write
Wait
bus IR resu bus bus bus PC bus R1 bus R2 bus bus M
B
→ adr lt → → → → → → → → → → →
R
IR → bus A opr PC bus R1 bus R2 bus MA M
bus
L nd
R
B
→
U
R bus
X
A
L
U
fun
X
Mem
func
read
bus IR resu bus bus bus PC bus R1 bus R2 bus bus M
B
→ adr lt → → → → → → → → → → →
R
IR → bus A opr PC bus R1 bus R2 bus MA M
bus
L nd
R
B
→
U
R bus
X
A
L
U
fun
X
read
wait
X
X
X
X
wait
inc
X
write
X
X
inc
X
write
wait
wait
Put the address in the MAR
store R2,camel
• A store instruction write the value of the register to address
i t t dd
• With direct memory addressing, the address is in the instruction
Mem
func
bus IR resu bus bus bus PC bus R1 bus R2 bus bus M
B
→ adr lt → → → → → → → → → → →
R
IR → bus A opr PC bus R1 bus R2 bus MA M
bus
L nd
R
B
→
U
R bus
X
A
L
U
fun
Mem
func
X
X
X
write
wait
5
2/14/2011
Write the data, R2
Wait for the Write to complete
Write
Wait
bus IR resu bus bus bus PC bus R1 bus R2 bus bus M
B
→ adr lt → → → → → → → → → → →
R
IR → bus A opr PC bus R1 bus R2 bus MA M
bus
L nd
R
B
→
U
R bus
X
A
L
U
fun
Mem
func
X
X
bus IR resu bus bus bus PC bus R1 bus R2 bus bus M
B
→ adr lt → → → → → → → → → → →
R
IR → bus A opr PC bus R1 bus R2 bus MA M
bus
L nd
R
B
→
U
R bus
X
X
write
wait
A
L
U
fun
Mem
func
X
X
X
write
wait
6