Microcode 3

Microcode Store
Addressing modes
Still
More on
More
Microcode
COMP375 Computer Architecture and
Organization
•
•
•
•
•
•
•
•
immediate
register
i t
memory direct
register indirect
register indirect with offset
memory indirect
register + offset memory indirect
displacement
Immediate
Register
• The data is part of the instruction.
• Immediate data items are read-only.
• There is usually a size limit.
Instruction
data register
address
Instruction
address
data
data register
data
memory
COMP375
• The data is in a CPU register.
• The instruction might indicate which register
memory
1
Microcode Store
Memory Direct
Register Indirect
• The data is in memory.
• The instruction contains the address of the
memory location.
• The address of the data is in a CPU
register.
i t
• Useful if the address is calculated.
Instruction
address
Instruction
address
data register
data
data register
data
memory
Register Indirect with Offset
Memory Indirect
• The address of the data is the sum of the
i t ti offset
instruction
ff t field
fi ld and
d a register
i t value.
l
• Useful when addressing an array.
• A memory location contains the address of
th data.
the
d t
• Useful for pointers.
Instruction
data register
address
Instruction
address
data
data register
data
memory
COMP375
memory
memory
2
Microcode Store
Displacement
Register Offset & Memory Indirect
• The sum of the instruction offset field and
a register value gives the location of the
address in memory.
• Useful when addressing ref parameters.
Instruction
data register
• The address of the data is the sum of the
instruction offset field and the program
counter.
• Used for short jumps
address
Instruction
data
Program Counter
memory
Stack Addressing
• The same as Register Indirect with Offset
using the stack pointer register
• Useful when addressing local variables or
parameters.
Instruction
stack pointer register
address
address
instruction
memory
The fastest addressing mode in
this list is
1.
1
2.
3.
4.
IImmediate
di
Direct
Memory Indirect
Register Indirect
with
ith Off
Offsett
data
memory
COMP375
3
Microcode Store
Microcode Steps
Microcode Store
• A microcode step is executed each clock
cycle.
l
• For each microcode step, the next line of
the microcode store is read.
• The microcode data determines the state
of the switches connecting registers to the
bus.
Microcode Controls Bus Connection
COMP375
Simple CPU
4
Microcode Store
Jump Instruction
Microcode Programs
Jump to the address given in the instruction
Direct Addressing
bus IR resu A bus bus PC bus R1 bus R2 bus bus M ALU Mem
→ adr lt → L
→ → → → → → → → → B func func
IR → bus U opr PC bus R1 bus R2 bus MA M R
bus
R
B →
→ nd
R bus
resu
lt
X
X
Opcode Determines Microcode Steps
• The sequence of switch settings in the
microcode
i
d store
t
iis a microcode
i
d program.
• Real microcode programs can
conditionally jump to another line in the
program.
• Often each line of the microcode contains
a field with the address of the next
microcode step.
Opcode and Microcode Step
• After the microcode steps to fetch the
i t ti and
instruction
d iincrementt th
the program
counter, the next microcode step executed
depends on the opcode of the instruction.
• Most of our microcode will ignore the
opcode and just concentrate on one
instruction at a time.
COMP375
5
Microcode Store
If each microcode instruction instruction
contains the address of the next instruction,
this can best be modeled by a:
1.
1
2.
3.
4.
5
5.
6.
Internal CPU Bus
• Only one register can put its value on the
b att a time.
bus
ti
• The value on the bus can be copied into
many registers at the same time.
Sequential
Seq
ential array
arra
Binary Tree
Linked List
Quad Tree
Heap
Data Structures
doesn’t apply to
architecture
Instruction Fetch &
Program Counter Increment
Optimizing Microcode
• The more microcode steps required, the
g an instruction will take to execute.
longer
• The value on the bus can be copied into
multiple registers
• Instead of copying A to B then B to C, the
value in A can be copied to both B and C.
• Unrelated microcode steps can be
executed before waiting for a memory
access to complete.
COMP375
bus IR resu A
A bus bus PC bus R1 bus R2 bus bus M Mem
L
→ adr lt → L
→ → → → → → → → → B func
IR → bus U
U opr PC bus R1 bus R2 bus MA M R
bus
R
B →
→ fun nd
resu
R bus
lt
X
X
read
wait
X
X
X
X
inc
X
X
6
Microcode Store
Instruction Fetch &
Program Counter Increment
Remember!
Combining
g steps
p to reduce total time
bus IR resu A
A bus bus PC bus R1 bus R2 bus bus M Mem
L
→ adr lt → L
→ → → → → → → → → B func
IR → bus U
U opr PC bus R1 bus R2 bus MA M R
bus
R
B →
→ fun nd
resu
R bus
lt
X
X
X
inc
X
X
read
X
wait
X
Follow the Fetch/Execute Cycle
• The steps of the fetch/execute cycle are
reflected
fl t d in
i th
the microcode
i
d
1. Read the instruction from memory
2. Increment the program counter
3. Get the operands
4. Execute the instruction
5. Save the results
COMP375
• The three lines of microcode required to
f t h an instruction
fetch
i t ti and
d increment
i
t the
th
program counter are common to all
instructions.
• These three lines will appear on the quiz
on Friday and on the next exam and
maybe even the final exam.
Write Some Microcode
Using the worksheet provided, write the
microcode to:
• Subtract R1, cow
memory direct
• Do not bother to show the instruction fetch
and program counter increment steps.
7
Microcode Store
Memory Direct
Subtract R1, cow
Memory Direct
Subtract R1, cow
Subtract memory location cow from R1
bus IR resu A
→ adr lt → L
IR → bus U
bus
→
resu
lt
Subtract memory location cow from R1 - Optimized
bus bus PC bus R1 bus R2 bus bus M ALU Mem
B
fun func
→ → → → → → → → →
R
opr PC bus R1 bus R2 bus MA M
nd
R
B
→
R bus
X
X
read
bus IR resu A
→ adr lt → L
IR → bus U
bus
→
resu
lt
X
X
wait
X
X
X
X
X
bus bus PC bus R1 bus R2 bus bus M ALU Mem
B
fun func
→ → → → → → → → →
R
opr PC bus R1 bus R2 bus MA M
nd
R
B
→
R bus
X
X
sub
read
X
wait
X
X
sub
X
X
Write Some Microcode
Using the worksheet provided, write the
microcode to:
• Jump with Program Counter Displacement
• Jump to the address that is the sum of the
address field and the PC
Jump Instruction
Jump to sum of the address field and the Program Counter
Relative Addressing
bus IR
→ adr
IR →
bus
res A
ult L
→ U
bus →
res
ult
X
bus bus PC bus R1 bus R2 bus bus M
A
L
→ → → → → → → → → B
opr PC bus R1 bus R2 bus MA M R
U
nd
R
B → fun
R bus
Mem
func
X
X
X
X
add
X
•Do not bother to show the instruction fetch and program
counter increment steps.
COMP375
8
Microcode Store
Write Some Microcode
Function Calls
• To call a function or method, the program
counter
t is
i pushed
h d on th
the stack
t k and
d th
then
the program counter is loaded with the
address of the function.
• This puts the address of the instruction
after the function call on the stack.
• To return the return address is popped
from the stack and loaded into the
program counter.
Call someplace
Using the worksheet provided, write the
microcode to:
• Call Instruction - Push the return address
on the stack and jump to the address of
the function. Assume R2 is stack pointer.
• IIncrementt R2 and
d putt th
the value
l iin th
the MAR
MAR.
Write the PC to that address and then load the
PC from the instruction address field.
•Do not bother to show the instruction fetch and program
counter increment steps.
Interrupts
R2 is the stack pointer
bus IR resu A
→ adr lt → L
IR → bus U
bus
→
resu
lt
bus bus PC bus R1 bus R2 bus bus M
→ → → → → → → → → B
opr PC bus R1 bus R2 bus MA M R
nd
R
B →
R bu
s
X
X
X
X
X
X
COMP375
X
A
L
U
fun
Mem
func
inc
X
X
write
wait
• Read only registers contain the fixed
address of special memory locations.
9
Microcode Store
Fetch and PC Increment
Microphobia
An unreasoning fear of
microcode
Jump Instructions
• The last microcode step of a jump is
almost
l
t always
l
copies
i a value
l iinto
t th
the
program counter.
• Jump instructions rarely access memory
unless they are pushing or popping
something on the stack.
COMP375
• The fetch/execute cycle always starts with
reading
di th
the iinstruction
t ti ffrom memory and
d
incrementing the program counter.
• In our simple computer, this takes three
lines of microcode.
Arithmetic
• Most arithmetic instructions have the steps
– Copy something into the operand reg.
– Put a value on the bus and do it.
– Copy the result register someplace
• In a more realistic system, the ALU
function would be determined by the
opcode of the instruction.
10