A Simplified Control Strategy for a High Power Low Distortion Synchronous Link Converter Var Compensator Kishore Chatterjee, B. G . Fernandes and Gopal K. Dubey and 3) the structure of control becomes complicated. The limitations of the multilevel converter topology are -1) as the number of harmonics t o be eliminated increases the performance/cost ratio falls, 2) voltage unbalance among the different levels of capacitors, 3) increase in active component count (diode clamp topology) or increase in passive element count (flying capacitor topology) and 4) complexity in control. Moreover in the above cases, the harmonics are eliminated in offline mode of control as a result of which, a relatively small error in the hardware realisation of device switching instants results in a significant increase in the harmonic content. In order to overcome the above mentioned limitations, a novel technique of harmonic elimination is proposed in I. INTRODUCTION [l]wherein low frequency high power devices and high freThe traditional methods of reactive volt-ampere com- quency low power devices are combined t o extract a supensation consisting of switched capacitor or fixed capaci- perior performance. The basic philosophy of the scheme tor and phase controlled reactor coupled with passive filters is that two converters sharing a common dc bus are used are increasingly being replaced by new approaches utilis- in parallel, of which one is realised by GTOs while the ing the concept of Synchronous Link Converters [2]. This other one is realised by high frequency devices like IGBTs, new class of compensators which have earned overwhelm- MOSFET or BJTs depending on the current level t o be ing response from ‘the researchers, is known by several ter- handled. The G T O converter (or the main converter) is minologies such as ‘Var Generators’ 131, ‘Advanced Static operated with PW.M control based on selective harmonic Var Generators’ 141, Synchronous Solid State Var Compen- elimination technique so that only few low order harmonsators’ [5], ‘PWM Inverter Var Compensator’ 161, ‘STAT- ics get eliminated. Since the number of harmonics t o be CON‘, etc. In this paper it is refered t o as Synchronous eliminated by this main converter are less, the switching Link Converter Var Compensator (SLCVC). Although this frequency also remains low. The high frequency parallel class of compensators provide improved performance over or auxiliary converter is operated in the current controlled the traditional methods of var compensation, it still has mode t o eliminate the next higher order harmonics genthe serious drawback of injecting low order harmonics into erated by the main compensator. The control methodolthe utility. The problem becomes acute at high power ogy ensures that the fundamental reactive current demand levels. Several PWM techniques of harmonic elimination is supplied only by the G T O based converter. The aux[5,6,7] cannot be realised at high power levels due t o switch- iliary converter compensates for the harmonics generated ing frequency limitation of high power devices. To reduce by the main converter. Since the auxilary converter does low frequency harmonics either parallelly operated convert- not handle the fundamental reactive current, its KVA raters [8,9,10,11,12] or multilevel converters [13,14,15,16,17] ing remains low. In [l],this scheme of harmonic eliminaare being used. The disadvantages of parallelly operated tion is validated through simulation studies. In this paconverter topology are 1) the transformer connection at per the experimental results of the scheme proposed in [l] the input side of the compensator becomes complicated are provided after presenting the underlying concept of the and bulky, 2) as the number of harmonics t o he eliminated scheme. The control scheme proposed in [l],requires an increases, the number of parallel units are also required involved procedure t o determine the reference current for to be increased which implies poor performance/cost ratio the auxiliary converter. In the scheme presented here, this reference current is determined by having a second closed Kishore Chatterjee and Gopal K . Dubey are with the Department loop around the converters. This results in reduction in of Electrical Engineering, UT,Kanpur 208 016, India. FaX:+91-512- hardware requirement and cost, and leads t o an overall im590063,email:gdubeyiitk.ac.in B . G. Fernandes is with the Department of Electical Engineering, provement in system reliability due t o simplicity in hardIIT, Powai, Mumbai, India. ware realisation. Effectiveness of the proposed scheme is Abstmet-A high power low distortion static var eompenis proposed in [I]. The harmonics are eliminated by incorporating a low power IGBT baaed controlled current auxiliary converter in conjunction with a high power GTO based converter. The current reference required by the auxiliary converter is calculated by an involved procedure which makes the overall Compensation process complicated. In this paper a simpliRed control scheme for the var compensator of 111 is proposed. Effectiveness of the proposed scheme is investigated for a case where the var compensator is speciflcally used for load compensation and also for the ease where it is used a s a general purpose var generator. Detailed simulation studies of the schemes are presented. Experimental results obtained from a laboratory prototype are provided to demonstrate the viability of the proposed method. KegwordSLCVC, SVC, Harmonic elimination, Load Compensator, Var Generator. sator ~ 0-7803-4879-6/98/$10.008 1998 IEEE 330 Authorized licensed use limited to: INDIAN INSTITUTE OF TECHNOLOGY BOMBAY. Downloaded on December 3, 2008 at 23:39 from IEEE Xplore. Restrictions apply. Fig. 1. Power Circuit Configuration. investigated for a case where it is specifically utilised for load compensation. The advantage of this mode of operation is that the load harmonics also get eliminated. The scheme is also studied for the case where it is used as a general purpose var generator which can be utilised either for load compensation or for bus voltage support. The viahility of the scheme is confirmed through detailed simulation and experimental studies. The idea of utilising a low power auxiliary converter in conjunction with a high power converter for harmonic elimination was first proposed in connection with Synchronous Link Voltage Source Converters [18,19]. Tlle idea of incorporating auxiliary compensator has also heen reported in [ZO]and [Zl]. The main limitation of the approach followed in [20] is that the control structure is quite involved. Also the presence of two reactive volt-ampere calculators and two filters in the control structure has a detrimental effect on the response of the system. Moreover, .there is a substantial increment in the passive and active component count. In 1211, the two converters having separate dc buses are controlled independently, as a result the control structure becomes complicated. The scheme presented here is -free from the above limitations. TRZ: Ph-A Source Current(lA/div), TR3: Ph-B Source Current(lA/div), TR4: Ph-A Aux. Comp. Current(lA/div). Time Scale: 5ma/div Source Voltage(GOV/div), increase :+), the lower device of phase-A of the auxiliary converter, SI is turned on so that the auxiliary compensator current, increases. Now from Figure 1, i.w = iC+) + ic+) + (1) therefore, i8(,,) increases with iCz(-,, When hits the 11. OPERATING PRINCIPLE upper hound of the hysteresis hand, S, is turned off and The power circuit configuration of the scheme is shown the upper device of phase-A of the auxiliary converter, SI The in Figure 1. The main converter is operated with selec- is turned on which decreases iCz(,,) and hence tive harmonic elimination technique, so as t o eliminate 5th, same technique is followed for controlling the current of the 7th, and 11th harmonics. Hence the switching frequency other phases. Thus by controlling the switching pattern of of the main compensator devices is 450Hz. The switch- the auxiliary converter, the source current is rendered near ing instants are fixed and the fundamental component of sinusoidal. As the source currents are forced to follow sithe compensator current is controlled by controlling the nusoidal references, the load harmonics if present also get magnitude of dc link voltage rather than controlling the eliminated. Oscillogram records of the various steady state modulation index. The auxiliary converter is operated in waveforms obtained are shown in Figures 2 t o 6. Figure 2 current controlled mode and provides on line elimination depicts the behaviour of the compensator when the auxof the higher order harmonics generated hy the main com- iliary compensator is disconnected while Figures 3 and 4 pensator. Three reference sinusoids, i,fln), i,f(a)and i,f(c) show the behaviour with the auxiliary compensator. Fighaving equal amplitude, I , f , and in phase with the line ure 5 shows the harmonic spectrum of the ph-A source curto neutral voltages, us(.), and v , ( ~ )are synthesised. rent with the auxiliary compensator while Figure 6 shows The source currents i s l e ) ,is(b) and i s ( = )are forced to fol- the spectrum without the auxiliary compensator. low these references within a hysteresis band. The source 111. CONTROL STRUCTURE currents are sensed and compared with the respective reference sinusoids. The error thus obtained decides the switchThe schematic control block diagram of the compensator ing pattern of the auxiliary converter devices. Suppose at is shown in Figure 7. Since var supplied by the compensome instant of time i 8 1 a ,is less than zr,(al. In order to sator is proportional to the magnitude of the dc link volt- 33 1 Authorized licensed use limited to: INDIAN INSTITUTE OF TECHNOLOGY BOMBAY. Downloaded on December 3, 2008 at 23:39 from IEEE Xplore. Restrictions apply. Fi:: .I. .\ux. Comp. Connected: TR1: Ph-A Line to Neutral Source Voltage(6OV/diu), TRZ: Ph-A Source Current(lA/div), TR3: Ph-B Sourrv Gumcnt(4Ajdiv). TR4: Ph-A Main Comp. Current(4Afdiv). Time Scale: Smsjdiv E Fig. 7. Control Block Diagram of the SLCVC as a Load Compensator. Fig. 5 . A u x . Comp. Connected: Harmonic Spectrum of the Ph-A Source Current. (FYrqn. Scale: ZBOHz/div) actual practice such a precise choice of the controller parameters is not possible. As a result, some part of the r e d power required t o maintain the dc link voltage will flow through the auxiliary compensator. Since the real power involved is insignificant and the auxiliary compensator handles only a fraction of this power, the increment in the V.4 rating of the auxiliary compensator is negligible. IV. SIMULATION STUDIES Detailed simulation studies are carried out t o predict the age. t.he w r demand of t,he load obtained from the var performance of the proposed compensator. A dedicated <.:ilculatoris used to set the reference dc link voltage com- computer program is developed for the purpose and simumand. l,&r,l. Thc dc link voltage is filtered and compared lation results are presented. The value of the dc link capacwith l,>c(rj). The error is used t o control 6 so that requi- itance is 400pF and the hysteresis window height is kept 1.0 site amount of real power is drawn from or supplied to the Amp. The values of the two inductors are L , = 20mH; ut.ility to change the magnitude of the d c link voltage. The Lo = 12mH. Figure 8 shows the transient behaviour of summation of the output, of the PI Controller-2 and the the three phase compensator for a step change in refernrnplit.ude of t,be real component of the load current, I L ~ ence dc link voltage from 1200V t o 19OOV and a simultadetermines the magnitude, I r j . Thus any change in Vdccyt, neous change in load from (1.67 + j6,936)KVA/phase to results in a simultaneous change in 6 and I,, leading t o an (1.67 jl'l.O)I<VA/phase. increase in the dc link voltage. If the parameters of the two From the simulated results it can he inferred that supePI controllers are chosen properly no real power from the rior compensation performance can be obtained by virtue source will flow rlmmgli the auxiliary compensator. But in of the proposed compensation technique. The steady state volt-ampere rating of the auxiliary converter is found t o be around 5% of the main converter. Moreover, it is found that the transient response of the scheme is superior. This is due t o the fact that during the transient period the auxiliary compensator supplies the necessary var demand of the load. This results in the increment of the auxiliary converter current during transient period and hence of its transient volt-ampere rating. This increment in transient volt-ampere rating of the auxiliary converter can he explained as follows: If there is an increment or decrement in var demand, the var calculator increases or decreases the dc link voltage reference. The actual dc link voltage responds t o this change with a finite response delay. But the controller is forcing the auxiliary converter t o control its Fig. 6. .Aux. Cump. Uiacunnrcted: Harmonic Spectrum of the Ph-A Source Currcut (i-irqn. Scale: 250Hz/divl own currents so that the source currents remain in phase + 332 Authorized licensed use limited to: INDIAN INSTITUTE OF TECHNOLOGY BOMBAY. Downloaded on December 3, 2008 at 23:39 from IEEE Xplore. Restrictions apply. Time (sec) I I - ! ~ 1. =z g 5 'U^ 6% &U- ; ,.. .," $ 3 - ;1 ha z& gU 5- I ~".. la I , o,, T i m (see ~* * * ~ *, Fig. 9. Power Circuit of the Proposed SLCVC as Var Generator. ) ;u@e<a..* :UP@ 2 :U- T i m ( I_ ) (d) Fig. 8. Transient Behaviour for an Incremental steb change in Reference DC Link Voltage and Load: (a) DC Link Voltage k Reference DC Link Voltage, (b) Ph-A Source Voltagi and Ph-A Source Current, ( c ) Ph-A Main Comp. Current and F'h-A Aux. Comp. Current, (d) Ph-A, Ph-B and Ph-C Aux. Comp. Current% with the respective source voltages. Thus during the transient period the deficit amount of var which the main compensator is not able to supply, is being supplied by the auxiliary compensator. As the peak current rating of a device is almost twice than that of its continuous current Fig. 10. Control Block Diagram for Var Generation rating, drawing of high current for a short, duration from the auxiliary converter is permissible. However, this can be detrimental for the high frequency devic=,in certain high compensator is sensed the power applications involving fast and l a w : change in MI and controlled so that the compensator compen. demand. This problem is addressed by operating the PISateS only the harmonics generated by the main compen. posed scheme as a var Source which is presented in Section sator, Further this approach of control ensures that there is v . no significant increase in the transient volt-ampere rating of the auxiliary converter. This control technique is disV . PROPOSED SLCVC AS VARGEYEFLATOR cussed in detail in this section. Here the propwed SLCVC The control strategy discussed in the previous section is kmked upon as a general Purpose MI generator which current by controlling +h,e can be used either for load compensation or for bus voltmaintains a sinusoidal auxiliary converter switchings. As a result, the load non- age support linearities if present also get compensated by the auxiliary A . Opemting compensator. Therefore, when the source is supplying a The power circuit configuration of the MI generator is nonlinear load, auxiliary compensator has to compensate load harmonics in addition to the harmonics generated by shown in Figure 9. The principle of operation remains the main compensator. Since in high power applications almost the same aa explained in Section 11. The currents the percentage of load harmonics is generally insignificant drawn by the compensator unit, ic(o), i,cb) and icp) are compared to the load reactive current, perc.entage increase sensed and made t o follow three reference currents, z , ~ ~ ( ~ ) , in the volt-ampere rating of the auxiliary converter will iTl+) and i,tc(<)by controlling the switchings of the awnot be considerable. However, if the load nonlinearities iliary compensator devices. The control block diagram of are Significant, the volt-ampere handled by the auxiliary the scheme acting as a var generator is shown in Figure 10. compensator may increase beyond the rating of high fre- The PI Controller-2 supplies the information regarding the quency devices. In that case, instead of controlling the amplitude of the real component of the overall compen- 333 Authorized licensed use limited to: INDIAN INSTITUTE OF TECHNOLOGY BOMBAY. Downloaded on December 3, 2008 at 23:39 from IEEE Xplore. Restrictions apply. sator current, I,,,,,,,) required to maintain.the necessary dc link voltage. As the reactive current handled by the compensator is proportional t o the magnitude of the dc link voltage, the amplitude of the quadrature component of the compensator current, is obtained by multiplying Vd, with a proportionality factor, K. The dc link voltage is compared with a threshold voltage, &h to get the data regarding the phase relationship (+SOo or - 9 O O ) h e tween the quadrature component of the compensator currents and the utility voltages. When Vd, < & h , the sign of Icq(pu.d) is reversed so that the reference current lags the utility voltages by 90'. For v d c > V,,, the sign of is left unchanged which ensures that the reference currents lead the utility voltages by 90°. The proportionality factor, K and depend on the system parameters, V. and L,. The reference currents are then given by: i ~ J c ( a= ) Icp[?eal) i,J.(a) = r,,,,,.,, cos(wt) + Icp(quod) cos(wt + 90') (2) cos(wt- ~ZO~)+I,,(,,.~) cos(wt+900-izo0) (3) i,,clc) = rcp,r..l, cos(wt+izoO)+i,,,v..d) cos(wt+90n+izo0) I! . (4) When the compensator is utilised for bus voltage control, the r.m.s bus voltage is sensed and compared with the reference bus voltage, and the error is utilised to set V,,,,J). While this scheme is to be used for load compensation, the reactive volt-ampere calculator sets V,[,J). .e . ~ a l om Simulation studies are carried out with Lm(o,b,c)=20mH, L,(e,b,c) = 12mH and dc link capacitor, C = 400pF. The transient response of the scheme for a step change in V,,(,J, from 1200V to 19OOV is shown in Figure 11. Fig. 11. ltamient Behaviour for I 0 VI. EXPERIMENTAL VERIFICATION The proposed control strategy is experimentally verified by operating the SLCVC as a load compensator. During testing, the load current of each phase is maintained a t (0.5 ij6.O)Amp and the reference dc link voltage is changed from 150V to 18OV. Figures 12 and 13 depict the compensator performance for this condition. It can be seen from Figure 12 that when the dc link voltage is 150V, the auxiliary compensator is drawing a leading current from the source. This is because the reference dc link voltage is inadequate for the main compensator to supply the full var demand of the load. But 18OV is almost adequate for the main compensator to fully compensate the load. Hence the auxiliary compensator draws reduced current at this voltage. Figures 14 and 15 show compensator performance when a step change of 18OV t o 150V is introduced in the reference dc link voltage. I 01 0.ll 02 *.U Time ( sec ) (d) a change in Reference DC Link Voltage from lZOOV to 19OOV: (a) DC Link Voltage k Reference DC Link Voltage ( b ) Ph-A Source Voltage and Ph-A Source Current, (c) Ph-A Main Comp. Current and Ph-A Aux. Comp. Current, (d) Ph-A, Ph-B and Ph-C Aux. Comp. Currents. VII. CONCLUSIONS A simplified control scheme of a high power low distortion SLCVC is proposed. Superior performance characteristics are obtained by effectively combining high power low frequency and low power high frequency switching devices. Detailed simulation studies are carried out to demonstrate the effectiveness of the scheme. Viability of the scheme Fig. 12. Transient Behaviour for &step change in Reference DC Link Voltage from 150V to l8OV ; TR1: DC Link Voltage(BOV/div), TW: Ph-A Main Comp. Current(lOA/div), TFl3: Ph-A Aux. Comp. Current(lOA/div). Time Scale: SOms/div. 334 Authorized licensed use limited to: INDIAN INSTITUTE OF TECHNOLOGY BOMBAY. Downloaded on December 3, 2008 at 23:39 from IEEE Xplore. Restrictions apply. 07 Fig. 13. TtanSient Behaviour for a step change in Reference DC Link Vollngc from 150V to 18OV : TRI: Ph-A Utility Voltage(50V/div), TR2: Ph-A Utility Currenl(l0:4/div). TR3: PhA Load Current( lOA/div). Time Scale: ZOms/div. Fig. 15. Transient Behaviour for a step change in Reference DC Link Voltage from 180V to 150V : TR1: Ph-A Utility Voltage(50V/div), TR2: Ph-A Utility Current(lOA/div), TR3: PhA Load Current(lOA/div). Time Scale: 20ms/div. Fig. 14. TTansient Behaviour for a itep change in Reference DC Link Voltage from l8OV to 150V : T R I : DC Link Voltage(3OV/div), TR2: Ph-A Main Comp. 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