postfile_9678.pdf

Computer Organization and Design
Third Exam. Solution
Class Room:50709
Date:2008/01/09
Time:1:30 p.m.- 3:10 p.m.
Range: Chapter 3 , Chapter 6 and chapter 7
Total Score:110 points
1. (10 points)
1 01111110 10000000000000000000
2. (10 points)
-7.5
3. (10 points)
Structural hazards: HW cannot support some combination of instructions
Control hazards: Pipelining of branches causes later instruction fetches to wait for the
result of the branch
Data hazards: Instruction depends on result of prior instruction still in the pipeline
4. (10 points)
(a.) It takes 100 ps * 10 6 instructions = 100 microseconds to execute on a
nonpipelined processor.
(b.) A perfect 20-stage pipeline would speed up the execution by 20 times.
5. (10 points)
1
6. (a.)(10 points)
It will take 8 cycles to execute this code, including a bubble of 1 cycle due to the
dependency between the lw and sub instructions.
(b.)(10 points)
(c.)(10 points)
7. (10 points)
• Offset
•
•
•
need to specify correct byte within a block
block contains 4 words
= 16 bytes
= 24 bytes
• need 4 bits to specify correct byte
Index: (~index into an “array of blocks”)
•
•
•
need to specify correct block in cache
cache contains 16 KB = 214 bytes
• block contains 24 bytes (4 words)
• # blocks/cache
• need 10 bits to specify this many blocks
Tag: use remaining bits as tag
2
•
tag length = addr length – offset - index
= 32 - 4 - 10 bits
= 18 bits
•
so tag is leftmost 18 bits of memory address
8. (10 points)
(a) cache
Mismatch between processor and memory speeds leads us to add a new level: a
memory cache. Cache is a copy of a subset of main memory.
(b) Spatial locality
The locality principle stating that if a data location is referenced, data locations
with nearby addresses will tend to be referenced soon.
(c) cache hit
Cache block is valid and contains proper address, so read desired word
(d) memory hierarchy
A structure that uses multiple levels of memories; as the distance from the CPU
increases, the size of the memories and the access time both increase.
3