CALIFORNIA STATE UNIVERSITY, NORTHRIDGE
TWO STAGE KA-BAND MINIMUM NOISE AMPLIFIER DESIGN
A graduate project submitted in partial fulfillment of the requirements
For the degree of Master of Science
In Electrical Engineering
By
Pridhvi Raju Penmetsa
May 2013
The graduate project of Pridhvi Raju Penmetsa is approved:
___________________________________________
___________
Dr.Ali Amini
Date
____________________________________________
___________
Dr. Ramin Roosta
Date
_____________________________________________
__________
Dr. Mattew Radmanesh, Chair
Date
California State University, Northridge
ii
Acknowledgement
I thank my professor Dr. Matthew Radmanesh for his care and guidance provided during
the period of my project; which wouldn’t have been done without him. He introduced me
to various corners of ‘RF and microwave design’ and helped me in dealing with various
tools. Without him, I couldn’t have interacted with real time people in the field of ‘Radio
Frequency’.
I would also like to thank my parents for supporting me to reach this far and everyone
who helped me through my journey.
The Electrical and Computer engineering (California State University, Northridge)
provided me with necessary materials and equipment to successfully complete this
project.
iii
TABLE OF CONTENTS
SIGNATURE PAGE...…………………………………………………………............... ii
ACKNOWLEDGEMENT………………………………………………………. ………iii
LIST OF FIGURES………………………………………………………………………vi
ABSTRACT ......................................................................................................................ix
CHAPTER 1 Introduction…………………………………………………………………1
CHAPTER 2 Theory……………………………………………………………................2
2.1 DC Biasing ………………………………………………..…...................2
2.1.1 FET Biasing Equations…………...…………….………........................3
2.2 Stability……………..................................................................................4
2.2.1 K – Δ test ……………………….……………………………………..4
2.2.2
- Parameter test …………………………………………………..…4
2.2.2 Stability Circle Equations ...…….…………..……………………..…..4
CHAPTER 3 Amplifier design and analyzing………………………………….................6
3.1 Stability verification..…………………………………….………………6
3.1.1 Stability circles………………………...……………...………………..6
3.2 Determination of ‘Reflection Coefficients’……..…………..…………...8
CHAPTER 4 Matching Networks ………………………………………………………10
CHAPTER 5 Biasing Circuit …………………………..………………………………..12
CHAPTER 6 Matching networks and solution…..………………………………….…...14
CHAPTER 7 Results…………………………………………………………………….26
CHAPTER 8 Conclusion…………………………………………………………….…..34
References……………..…………………………………………………………………36
iv
APPENDIX A……………………………………………………………………………37
APPENDIX B……………………………………………………………………………38
APPENDIX C……………………………………………………………………………39
APPENDIX D……………………………………………………………………………43
APPENDIX E……………………………………………………………………………44
v
LIST OF FIGURES
Figure 2.1: NEC_NEC321000 GaAs MESFET DC Bias curves……………..…..………2
Figure 2.2:
………………...….……………………………………..……...…..3
Figure 3.1: Load stability circle ……….……...…….………………………….……..…..7
Figure 3.2: Source stability circle……………………………………………………..…..8
Figure 4.1: Intermediate matching network……….………..………………….…..……10
Figure 6.1: Input matching network Block diagram………………………………….....14
Figure 6.2: sample circuit 1……………………………………………………..………15
Figure 6.3: sample circuit 2……………………………………………………..………15
Figure 6.4: sample circuit 3……………………………………………………..………16
Figure 6.5: sample circuit 4……………………………………………………….…….16
Figure 6.6: RFMW Design Essential Input Matching Network……………….….….…17
Figure 6.7: Input Matching network …………………………………………….……...18
Figure 6.8: Intermediate Matching Network Block Diagram…………...……….……...19
Figure 6.9: sample circuit 5...……………………………………………………………19
Figure 6.10: sample circuit 6...……………..……………………………………………20
Figure 6.11: RFMW Design Essential Intermediate Matching Network ….……………20
Figure 6.12: Intermediate Matching Network..………………………….……………....21
Figure 6.13: Output Matching Network block Diagram………………………...………22
Figure 6.14: Sample circuit 7………………..…………………………………………..22
Figure 6.15: Sample circuit 8……….………………….......................…………………23
vi
Figure 6.16: Sample circuit 9………………..……………….………………….……….23
Figure 6.17: Sample circuit 10…………...……...……………………………………….24
Figure 6.18: RFMW Design Essential Output Matching Network………………..……..24
Figure 6.19: Output Matching Network………………...………………………………..25
Figure 7.1: Final circuit layout………………...……………………………………..27/28
Figure 7.2: S parameters of the circuit………………...……………………..…………..29
Figure 7.3: S- parameters of transistors………………...………………………………..30
Figure 7.4: S-parameters of the circuit on smith chart………………...….……………..31
Figure 7.5: Gain of the circuit………………...……………………………...…………..32
Figure 7.6: Noise figure of the circuit………………...…………………...……………..33
vii
LIST OF TABLES
Table 7.1: One stage Transistor stability, Noise Figure & DC bias values……………..34
Table 7.2: Input Matching network ………………...…………………………………..35
Table 7.3: Intermediate Matching network …………..………………….……………..35
Table 7.4: Output Matching network ………………...………………….……………..35
viii
ABSTRACT
TWO STAGE KA BAND LOW NOISE AMPLIFIER DESIGN
By
Pridhvi Raju Penmetsa
Master of Science in Engineering,
Electrical Engineering
The project is about designing a Minimum Noise Amplifier (MNA) in Ka Band (26.5 –
40 GHz). The satellite communications are carried out in this band are better than others
in reducing noise at the receiving end and requiring high gain values. This two stage
design provides significant amount of gain with minimum noise.
The frequency at which the MNA works in the Ka Band is 30GHz with a 10%
bandwidth of 3GHz. The main concept of the design is to obtain low noise and
maximum possible power gain. The gain obtained is 25dB with a minimum noise figure
of 0.92dB. A DC biasing circuit is used to power the two stage FET amplifier.
ix
CHAPTER 1
Introduction
Minimum Noise Amplifier is a special case of ‘Low Noise Amplifier’.
The main application of a Minimum Noise Amplifier is in satellites. The incoming
signal is received from the satellite and is captured by the receiver antenna. Reducing
the noise is the main part of the receiver in a Minimum Noise Amplifier and the signal
should not be altered in its strength and signal characteristics [4].
The operations of Ka band are far more effective compared to the operations made under
other bands like Ku and C band. The Ka band allows high bandwidth communication and
will be used in the next series of Iridium satellites. Under rainy conditions it is more
susceptible to signal conditions compared to Ku and C bands.
The specifications taken in this project are taken from the NEC 321000 GaAs FET. A DC
biasing circuit is designed, which is used to drive the FET. The project is done
theoretically, where no practical implementations or loss factors like soldering,
component losses and cable losses are taken into consideration[4].
The stability of the transistor is known using the S parameters. The S parameters are
taken from the data sheet NEC_NE321000 GaAs FET in APPENDIX E – and will be
implemented in the design.
K and Δ factors are calculated to determine the stability of the transistor. Once we have
the stability factors we need to search for appropriate reflection coefficients.
to determine
and
is used
is calculated by conjugate matching of the output impedance. The
matching networks will have the lumped elements for design.
Once the design of matching networks is done, gain and noise figure for the multistage
amplifier are calculated. The total gain is obtained by multiplying the gain of each stage
together. The last step involves the DC biasing required to operate network and the
parameters are taken from the NEC_NE 321000 GaAs FET datasheet in APPENDIX E.
1
CHAPTER 2
Theory
This section provides required fundamentals to understand the design procedure. The
Minimum Noise Amplifier’s (MNA) is constructed by fulfilling the parameters for the
operating frequencies, gain and noise which is based on the reflection coefficients.
2.1 DC Biasing
The type of transistor we are using in this project is an FET. FET’s are most preferred in
the high frequency applications as they can handle high power. Biasing controlled by the
base voltage, speed and minimal capacitance between the terminals. GaAs NEC_NE
321000 MESFET is the device which will be used to design and the biasing curves
shown are bias the FET in the saturation mode where
≥
–
.[4]
Figure 2.1: NEC_NEC321000 GaAs MESFET DC Bias curves
The curves of Drain-Source Current to the Gate-Source Voltage is shown below
2
Figure 2.2:
2.1.1 FET Biasing Equations
The source resistor is used to bias the circuit and a voltage divider is used to set the
voltage for the gate in a self-biasing network. The gate to source junction is reverse
biased.[4]
=
(2.1)
is obtained from the datasheet in APPENDIX E or can also be calculated by
=K
(2.2)
Source voltage is given by
(2.3)
Gate voltage is obtained by adding a voltage divider if we know the
(2.4)
3
2.2 Stability
The S-parameters are used to determine the stability of the circuit and are implemented in
the circuit stability equations. The conditions at which FET is tested for its stability are
K – Δ test and the
parameter test.[1]
2.2.1 K – Δ test
Δ
(2.5)
K
(2.6)
Where K 1 and Δ 1 to have unconditional stability
If K and Δ does not satisfy the conditions then the system is forced to be stable. In the
case of an unilateral transistor, the
0. It implies that gain travels in one direction
,Δ
and has no reverse transducer gain. Then K
2.2.2
[1]
- Parameter test
The K – Δ test gives stability of one particular device. The
- Parameter test is used
when there are multiple devices.[1]
2.2.3 Stability Circle Equations
The stability circles helps to find the stability regions and locate the reflection
coefficients. If the stability regions are unable to locate the reflection coefficients, then
smith charts are used to locate the stability regions and the reflection coefficients. The
way the procedure is carried out will be shown in the design [1].
There are two stability circles namely load stability circle and source stability circles.
Load Stability Circle Equations
4
Δ
(2.7)
(2.8)
(2.9)
Source Stability Circle Equations
Δ
(2.10)
(2.11)
(2.12)
The shunt or series elements are required at source or load if the plotted circles intersect
the smith chart. If
> 1 and
> 1, then the system becomes potentially unstable.[1]
5
Chapter 3
Amplifier design and analyzing
As the theory explained in the previous section, the steps are thus followed3.1 Stability verification
The stability specifications ‘K’ and ‘Δ’ are found out using the formulae
Δ
(3.1)
K
(3.2)
The values got are Δ = 0.89∠125.7 and K = 0.897 where |Δ|<1 and K<1 which
assumes that the system is unstable.
3.1.1 Stability circles
To determine the stability regions we use smith charts to do it. We use the formulae to
determine the stability circle and the stability regions.
Output stability circle
Δ
(3.3)
(3.4)
Where
= -0.33
= 1.289
= 0.589∠15.173
And these are represented in Smith chart 1.
In this case the stability circle includes the center of the smith chart therefore the area of
smith chart which is cut by the stability circle is the stable region.
6
Output stability
circle
50Ω
Figure 3.1: Input stability circle
(3.5)
(3.6)
Where
= -0.091
= 4.68
= 3.8∠83.31
In this case the stability circle is enclosing the smith chart as shown in the figure below
7
Figure 3.2: Source stability circle [1]
Here the stability region is the smith chart.
3.2 Determination of ‘Reflection Coefficients’
For further advancement in design
The
=
and
are determined using the stability regions.
lie in the stability region of the input stability region.
is taken from
the data sheet of NE321000 which is in the APPENDIX E.
NOTE - The NE321000 datasheet does not provide the
at 30 GHz but for the project
we take the specifications of 26GHz, as companies are reluctant to give specifications
beyond 26GHz.
The
is determined using the formula
=
(3.7)
(3.8)
8
These are plotted and shown in the smith charts
To cross check either the reflection coefficients fall in the stability circle or not we use
the formulae from APPENDIX D
9
CHAPTER 4
Matching Networks
The matching networks with their components are determined using smith charts.
taken as the reflection coefficient for input matching network;
is
is taken as the
reflection coefficient for output matching network.[3]
For intermediate matching network smith chart is used and the following figure shows
the block diagram of the multi-stage amplifier.
Figure 4.1: Intermediate matching network [4]
The gain calculated is the transducer power gain (
Where
=
)
=
(4.1)
Next calculate the noise frequency of the amplifier is calculated by
F=
+
(4.2)
=
+
(4.3)
Here
10
So F =
F = 0.79dB or 1.1995
The transistors are same so they are cascaded and overall noise of the amplifier is
+1
(n = 2)
(4.4)
= 0.844 dB or 1.214
11
CHAPTER 5
Biasing Circuit
FET’s are most preferred in the high frequency applications as they can handle high
power, biasing controlled by the base voltage, speed and minimal capacitance between
the terminals. GaAs NEC_NE 321000 MESFET is the device which will be used to
design and the biasing curves shown are bias the FET in the saturation mode where
≥
–
.[4]
The source resistor is used to bias the circuit and a voltage divider is used to set the
voltage for the gate in a self-biasing network. The gate to source voltage
biased. The relation between gate current and source current is determined as
= 10mA
= 2V
= 0.6V
= [4]
= 4V
=
2=
is reverse
(5.1)
( 0.6)
= 1.4V
Now
(5.2)
= 200Ω
As
= 100
Are selected to be large:
Ω
Ω
The reactive elements of the biasing circuit are found
12
,
(Inductance of the RFC)
,
= 3Ω
(Capacitance of the RFC)
13
CHAPTER 6
Matching networks and solutions
The matching networks are designed using smith charts. The first smith chart helps to
design input matching network. The smith chart has four solutions, as the reflection
coefficient does not lie in any of the constant unity circles. The results are shown and
verified through smith chart and RFMW Design Essentials Software.
Input Matching Network: The input matching network is obtained from the source
reflection coefficient. The source reflection coefficient is equal to the optimum reflection
coefficient. The optimum reflection coefficient is taken from the datasheet. The plotting
of source reflection coefficient and the solutions obtained through are given below
Figure 6.1: Input matching network Block diagram [1]
The values from all the four solutions areSolution 1: Shunt L – 1.2 = 0.22nH Series L
14
0.4 = 0.106nH
Figure 6.2
Solution 2: Series L
0.4 = 0.318nH Shunt L
0.4 = 0.631nH
Figure 6.3
Solution 3: Shunt C – 1.2 = 0.12pF Series L – 1.4 = 0.371nH
15
Figure 6.4
Solution 4: Series C – 1.22 = 0.08pF Shunt L – 1.4 = 0.189nH
Figure 6.5
16
Figure 6.6: RFMW Design Essential Input Matching Network
17
Solution 1
Solution 2
50Ω
Solution 4
Solution 3
Figure 6.7: Input Matching Network
The intermediate matching network uses two reflection coefficients; the load reflection
coefficient of first matching network is taken as the input reflection coefficient and the
conjugate of source reflection coefficient as the output reflection coefficient. Both are
matched to get two solutions which are used in designing the matching network. The
intermediate matching network has two solutions and both the solutions are considered in
the design of the network; this can be seen in the smith chart’3’.
18
Figure 6.8: Intermediate Matching Network Block Diagram [1]
The values of the smith chart’3’ areSolution 1: Series L – 0.5 = 0.132nH Shunt L – 1.2 = 0.22nH
Figure 6.9
Solution 2: Series C – 2.0 = 0.05pF Shunt C – 0.18 = 0.02pF
19
Figure 6.10
Figure 6.11: RFMW Design Essential Intermediate Matching Network
20
50Ω
Solution 2
Solution 1
=
Figure 6.12: Intermediate Matching Network
Output Matching Network: The output matching network is obtained from the load
reflection coefficient. The plotting of load reflection coefficient and the solutions
obtained through are given below The final matching network also has four solutions as
the reflection coefficient lies out of the unity constant circles this can be seen in the smith
chart’4’.
21
Figure 6.13: Output Matching Network block Diagram [1]
The values of the smith chart ‘4’ areSolution 1: Shunt L – 1 = 0.265nH; Series C – 2.1 = 0.05pF
Figure 6.14
Solution 2: Series L – 1.9 = 0.5nH; Shunt C – 1= 0.106pF
22
Solution 3: Shunt C – 1 = 0.106pF; Series C – 0.9= 0.117pF
Figure 6.16
Solution 4: Series C – 2 = 0.05pF; Shunt C – 0.18 = 0.02pF
23
Figure 6.17
Figure 6.18: RFMW Design Essential Output Matching Network
The formulae used to solve for the values of inductors and capacitors are in APPENDIX
D
24
Solution 2
Solution 1
50Ω
Solution 4
Solution 3
Figure 6.19: Output Matching Network
25
CHAPTER 7
Results
The circuit layout is done with values obtained from smith charts. The solution consists
of a series inductor and shunt capacitor from both input and output matching network.
Values are first done analytically and then are verified using matlab and Microsoft excel
RFMW Design Essential Software. This is later implemented in AWR microwave office.
The values of K, Δ, the stability circle equations, noise frequency and DC bias elements
are first done analytically and later are verified using matlab which is shown in
APPENDIX C.
The input matching network (
matching network
), intermediate matching network (
) and output
) are designed using smith charts; the values are calculated
analytically and are later verified using Microsoft excel RFMW Design Essential
Software.
The verified values are used in the implementation of the circuit and are run using AWR
microwave office. The circuit designed and its corresponding results are shown in this
section.
26
27
Figure 7.1: Circuit layout
28
The gain, S- parameters and noise figure graphs simulated from above circuit are as
follows
The ‘s2p’ file which we was taken as “datafile1” in AWR is shown in APPENDIX B
Figure 7.2: S parameters of the circuit
29
Figure 7.3: S- parameters of transistors
30
Figure 7.4: S-parameters of the circuit on smith chart
31
Figure 7.5: Gain of the circuit
32
Figure 7.6: Noise figure of the circuit
33
CHAPTER 8
Conclusion
An effective design of Ka Band minimum noise amplifier is presented. The effective
frequency at which the amplifier is designed is 30GHz. The gain we obtained at this
frequency is 25dB with a noise figure of 0.92dB.These values show satisfactory results
and meet our design specifications.
The values obtained by using different tools are displayed below.
One stage Transistor stability, Noise Figure & DC bias values
Specifications
Analytical
matlab
method
RFMWDesign
AWR
Essential
Software
Software
Δ
0.89∠125.7
0.4737+0.6574i=
N/A
N/A
0.89∠125.7
K
0.89
0.8978
N/A
N/A
D_L
-0.33
-0.33
N/A
N/A
R_L
1.289
1.289
N/A
N/A
C_L
0.589∠15.173
0.5686+0.1542i=
N/A
N/A
0.589∠15.173
R_S
4.68
4.68
N/A
N/A
C_S
3.8∠83.31
0.4436+3.7828i=
N/A
N/A
∠
∠
N/A
0.3363-0.6192i=
N/A
N/A
3.8∠83.31
∠
∠
∠
NF/GAIN
0.84dB/17.17dB
0.844dB
N/A
0.92dB/25dB
Biasing
L = 2.12nH, C
L = 2.12nH, C =
N/A
N/A
circuit(L,C)
= 1.76pF
1.76pF
= 2V
=10mA
34
Table 7.1
Input Matching Network
Specifications
Analytical
matlab
RFMWDesign
AWR
Essential
Software
method
Software
C= 0.12pF, L=
0.371nH
N/A
Series C,
C= 0.08pF, L=
N/A
Shunt L
0.189nH
Shunt C,
Series L
C= 0.127pF, L=
N/A
0.371nH
C= 0.087pF, L=
N/A
0.189nH
Table 7.2
Intermediate Matching Network
Specifications
Analytical
matlab
RFMWDesign
AWR
Essential
Software
method
Software
Shunt C,
C= 0.05pF, C=
Series C
0.02pF
Shunt L,
L= 0.132nH,
Series L
L= 0.22nH
N/A
C= 0.053pF,
N/A
C= 0.019pF
N/A
L= 0.133nH,
N/A
L= 0.221nH
Table 7.3
Output Matching Network
Specifications
Analytical
matlab
method
RFMWDesign
AWR
Essential
Software
Software
Shunt C,
C= 0.106pF, L=
Series L
0.5nH
Series C,
C= 0.05pF, L=
Shunt L
0.265nH
N/A
C=0.106pF, L=
N/A
0.501nH
N/A
C= 0.051pF, L=
0.265nH
Table 7.4
35
N/A
References
1. Radmanesh,M.M.”Radio Frequency and Microwave Electronics Illustrated”,Upper
Saddle River: Prentice Hall,2001
2. Radmanesh, Matthew M.” Advanced RF & microwave circuit design: the ultimate
guide to superior design,” Bloomington, Indiana, AuthorHouse, 2009
3.Radmanesh, Matthew M.” RF & microwave design essentials,” Bloomington, Indiana,
AuthorHouse, 2007
4. Singh, Manpreet. “Multistage Minimum Noise Amplifier KU-Band” California State
University, Northridge; Oviatt Library : TA 153.Z953 2010 S57
5. http://www.youtube.com/watch?v=HuUAPNPSKto : July 11, 2012
36
Appendix A
put reflection coefficient
37
Appendix B
s2p datafile used
38
APPENDIX C
MATLAB CODE
39
40
41
42
APPENDIX D
Formulae
1. To add a series L: j
/
2. To add a series C: j
3. To add a shunt L:
j
4. To add a shunt C:
Where ω = 2πf; f = frequency
43
APPENDIX E
Datasheets
44
45
46
47
48