VLSI Implementation of the Pacemaker Unit of the Interstitial Cell of Cajal 1 2 3 4 5 Ganapathy Subramanium Sundar Department of Bioengineering University of California, San Diego San Diego,CA-92093 6 Abstract 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 The digestion of the food in the gastro-intestinal tract is aided by the peristaltic contractions of the gastric muscles. This gastric motility is a result of the sponta- neous rhythmic pacemaker activity produced by the interstitial cells of Cajal(ICC), which line the gastro-enteric system. The interstitial cells of Cajal are a special- ized group of neuro-muscular cells and are derived from fibroblasts. These cells generate periodic action potentials termed as slow waves, which are responsible for gastric motility. The objective of this project is to implement a VLSI model of a simple ICC network capable of producing slow waves generated by the ICC network of the stomach. The cells of the network are designed using a mathemat- ical model where the membrane voltage of the ICC is based on the flow of C a2+ ions and N a+ ions. 1 In trod u cti on : The human digestive system has the tasks of ingestion, digestion, absorption and assimilation of food. The food taken in is pushed through the alimentary canal by a series of rhythmic contractions of the smooth muscles lining the gastro-intestinal(GI)l tract called peristalsis. These contractions are caused by a set of electrical-signals called ”slow waves”. The slow-waves, in turn, are generated by the Interstitial cells of Cajal which also line the GI tract. The slow waves are a summation of a large number of various functional cell membrane fluctuations called “Unitary Potentials (UP)”. The unitary potentials are generated from a group of cell organelles called "Pacemaker Unit (PU)". The UP is generated by the flow of Ca2+ ions through the Pacemaker Unit. Abnormalities in the Interstitial Cells of Cajal could result in gastric diseases like Irritable Bowel Syndrome and Pylorus Dysfunction. In this project, a VLSI model of the Pacemaker Unit, which is the most fundamental unit of the ICC, is built using VHDL from a proven biophysical model. 2 B i op h ysi cal B ack grou n d : 2.1 The Interstitial Cell of Cajal: The Interstitial Cells of Cajal were first isolated by Santiago Ramon y Cajal. These cells are found along the entire gut -wall including the myenteric-plexus and at the interface between the circular muscle and the submucosa. These cells are neither neurons nor muscular cells 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 and are supposed to be derived from fibroblasts. The ICC are electrically coupled to the enteric muscle cells through gap junctions. The slow waves in the digestive system are generated by a large group of these cells. Each part of the digestive system has its own charactersitic slow-wave. For example, in the human digestive system, the frequency of the slow-waves is 3 cycles per minute in the stomach and 12 cycles per minute in the duodenum. This variation is largely attributed to the difference in the ICC population in the various digestive organs. Figure 1 shows the different population of the ICC in the rat stomach and the rat intestine. Figure 1: ICC distribution along the murine stomach and murine intestine[2] 2 . 2 T h e P a c e ma k e r U n i t : [2] suggests that the Interstitial Cell of Cajal is fundamentally made up of a number of small functional units which are responsible for the generation of the slow wa ves. These units are called the pacemaker units and essentially are made up of four components: 2.2.1 The Endoplasmic Reticulum(ER): It is the intracellular Ca 2+ store that cycles Ca 2+ by release via the IP 3R and is sequestered back again by the sarcoeondoplasmic reticulum calcium ATPase (SERCA) pump proteins. 2.2.2 The Mitochondrial Subspace (MT) : It regulates the cellular ATP production through the mitochondrial calcium uniporter(MCU) and the Mitrochondrial Sodium/Calcium Exchanger(NCX). 2.2.3 Cytosolic Subspace(S1 and S2): These two form the reamining of the pacemaker unit and includes the Non-Selective Cation conductance exchanger(NSCC) and the intracellular C a2+ fluxes(S1S2). 2.3 The Unitary Potential: The Unitary Potential is generated in the Pacemaker Unit as a consequence of the flow of C a2+ ions. Initially C a2+ ions flow into the S1 subspace which then diffuse to S2 .Sufficient C a2+ entry into S2 raises the IP3 R open probability causing a flow of C a2+ from the Endoplasmic Reticulum. The mitochondria also gets activated through the MCU channel, causing rapid mitochondrial C a2+ accumulation. To maintain ionic concentrations in the ER, the ER takes up C a2+ ions though the SERCA pump. The deficiency in the ions in S1 causes the NSCC channel to open up taking up both N a+ and C a2+ ions. This depolarization is then followed by a repolarization where mitochondria releases the excess 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 101 102 103 Ca2+ ions through NCX and S1 releases N a+ ions into the extracellular space. This process is cyclic and gives rise to a unitary potential cycle. Figure 2: The schematic diagram of the Pacemaker Unit and the flow of ions. 2.4 The Model Framework: [2] models the Unitary Potential as a state model of 5 differential equations governing the basic parameters. The state variables are: Vm: Membrane Potential C S1 : Ca2+ concentration in S1 C S2 : Ca2+ concentration in S2 C ER : Ca2+ concentration in ER C MT : Ca2+ concentration in MT N S1 : Na+ concentration in S1 H: opening gate variable Φ3: IP3R slow variable The state equations are given by: 104 105 106 Where the Ji is the Ca2+ flux due to the particular channel i, φ1 and φ2 are the opening and closing gate variables of I P3R and fm is the mitochondrial buffering rate. 107 108 109 110 3. System Implementation: 111 112 113 114 115 116 117 118 119 120 121 122 123 124 125 126 127 128 129 3.1 Basic Block Diagram: The Pacemaker Unit's digital VLSI model has two inputs viz. the Clock and the Reset and a 32 bit output for the output voltage generated. This is as shown in Figure 3 Figure 3: Black Box of Pacemaker Unit Figure 4: Block Diagram of the Pacemaker Unit The Pacemaker Unit's block diagram is shown in the following diagram. The constants and the parameters are stored in a memory block in the 32 bit IEEE-754 format. The main advantage of this format is that floating point numbers are easy to represent and compute. The membrane voltage and the other state parameters are calculated in the computation block. The system is a positive edge triggered system and consists of 32 bit floating point multipliers, adders and subtractors. To verify the accuracy of the model, the system was first simulated on MATLAB with a initial resting potential of -70.1 mV. The system was also simulated in MATLAB to determine the clock frequency required to run the system so as to obtain a unitary potential of 3 cycles/minute as the case with most mammals. The actual model was simulated using VHDL on Altera's FPGA software Quartus II. The output waveforms were analyzed using ModelSim and the Register Transfer Level (RTL) schematic was obtained. 130 131 132 133 134 135 136 137 138 139 140 141 142 143 144 4. Results: Figure 5 shows the MATLAB simulation of the system using MATLAB's ode23 solver. By a hit-and-trial method, the system was found to generate a unitary potential of the desired frequency when the samples were spaced at 1.54 ms. Thus it was decided that the clock frequency of the system to be at 6.4 kHz. Figure 6 shows the various Ca 2+ concentrations across the different parts of the Pacemaker Unit. F i g u r e 5 : M AT L A B : U n i t a r y P o t e n t i a l s ( A m p l i t u d e 3 m V p k - p k ) F i g u r e 6 : M AT L A B C a 2 + i o n f l o w i n v a r i o u s c o m p o n e n t s o f t h e P a c e m a k e r Unit 145 146 147 148 Figure 7 shows the waveform simulation using VHDL at a clock of 6.4 kHz. T he syste m was b uilt using the behavioural model and emplo yed the Euler's m e t h o d f o r s o l v i n g t h e d i f f e r e n t i a l e q u a t i o n s . A p p e n d i x A s h o w s t h e RT L sche matic synthesized for the Pacema ker Unit. 149 150 151 Figure 7: VHDL Simulation Output of the Pacemaker Unit 152 153 154 155 156 157 158 159 5. Con cl u si on and Fu tu re Wo rk : 160 161 162 163 164 165 166 167 168 169 170 171 172 173 174 175 R e f e re n c e s T hus the V LSI model o f the Pace m a ker Unit w as obtained using V H D L and v e r i f i e d w i t h M AT L A B s i m u l a t i o n s . T h e I n t e r s t i t i a l C e l l o f C a j a l h a s m o r e than o ne Pace maker U nit. Hence the collective summation of all the P a c e m a k e r u n i t s h a s t o b e s t u d i e d . A l s o t h e g a s t r i c wa l l i s l i n e d w i t h m o r e t h a n o n e I C C . H e n c e i t i s n e c e s s a r y t o s t u d y t h e e ff e c t s o f m a n y I C C s a n d the e ffect of t he ICC p opulation on t he charac teristics of t he slo w wa ve generated. [1] Sanders, K.M., T. Koh, S.D. and Ward., S.M., “Interstitial Cells of Cajal as pacemakers in the gastrointestinal tract”, Annu Rev. Physiol. 68:307-343. [2] Faville, R. , A. Pullan, K. Sanders and N. Smith.2008. A biophysically based mathematical model of unitary potential activity in interstitial cells of Cajal.”,Biophysical Journal 95(1):88-104. [3] Douglas L. Perry, VHDL- Programming by Example,McGraw-Hill Publishers. 176 Appendix A 177 RTL Schematic of the Pacemaker Unit V_out[31..0]~reg0 PRE fpresult~_OUT0 D Q V_out[31..0] ENA sign~27_OUT0 ufract~254_OUT0 CLR V_m[8..-23] PRE D Q V_m_OUT0 ENA CLR add~199_OUT0 fpresult~[9121..9090] C_ER[8..-23] SEL fpresult~_OUT0 0 PRE DATAA 32' h7F800001 -- OUT0 D Q sign~28_OUT0 1 DATAB sign~28 ENA MUX21 CLR ShiftLeft96 A[23..0] << ShiftLeft96_OUT COUNT [6..0] Add863_OUT find_leftmost~12576_OUT0 find_leftmost~12577_OUT0 find_leftmost~12578_OUT0 LEFT_SHIFT ShiftLeft92 A[23..0] << ShiftLeft92_OUT COUNT [6..0] Add825_OUT find_leftmost~12024_OUT0 find_leftmost~12025_OUT0 find_leftmost~12026_OUT0 LEFT_SHIFT ShiftLeft87 A[23..0] << ShiftLeft87_OUT COUNT [6..0] Add776_OUT find_leftmost~11328_OUT0 find_leftmost~11329_OUT0 find_leftmost~11330_OUT0 LEFT_SHIFT fract~65_OUT0 Result~4839_OUT0 Result~4843 Result~4859 Result~4859_OUT0 Result~4851_OUT0 Result~4818 Result~4818_OUT0 phi_3[8..-23] PRE fpresult~_OUT0 D Q phi_3_OUT0 ENA CLR orx~7827 orx~7827_OUT0 orx~7826_OUT0 orx~7823 orx~7823_OUT0 orx~7822_OUT0 orx~7801 orx~7801_OUT0 orx~7800_OUT0 orx~7797 orx~7797_OUT0 orx~7796_OUT0 orx~1955 orx~1955_OUT0 orx~1954_OUT0 orx~1951 orx~1951_OUT0 orx~1950_OUT0 orx~1929 orx~1929_OUT0 orx~1928_OUT0 orx~1925 orx~1925_OUT0 orx~1924_OUT0 H[8..-23] PRE fpresult~_OUT0 D Q ENA CLR 0 H_OUT0 ufract~254 C_S2_OUT0 C_ER_OUT0 ufract~254_OUT0 ufract~1026_OUT0 sign~108_OUT0 0 sign~109_OUT0 1 sign~109 leftright~39_OUT0 0 sign~27_OUT0 1 sign~27 1' h0 -- ShiftRight179 A[27..0] 3' h0 -- >> COUNT [8..0] Add1787_OUT ShiftRight179_OUT RIGHT_SHIFT Result~4851 Result~4851_OUT0 orx~7829 orx~7829_OUT0 orx~7828_OUT0 orx~7807 orx~7807_OUT0 orx~7806_OUT0 orx~7805 orx~7805_OUT0 orx~7804_OUT0 orx~7803 orx~7803_OUT0 orx~7802_OUT0 orx~1961 orx~1961_OUT0 orx~1960_OUT0 orx~1959 orx~1959_OUT0 orx~1958_OUT0 orx~1957 orx~1957_OUT0 orx~1956_OUT0 orx~1935 orx~1935_OUT0 orx~1934_OUT0 orx~1933 orx~1933_OUT0 orx~1931 fract~65_OUT0 orx~1932_OUT0 orx~1930_OUT0 fract~66_OUT0 fpresult~_OUT0 LessThan4559 orx~1931_OUT0 A[26..0] 3' h0 -B[26..0] < 0 3' h0 -- LESS_THAN 1 fracts~4949_OUT0 fracts~4949 0 1 fracts~4948_OUT0 fracts~4948 0 1 fracts~4947_OUT0 fracts~4947 0 1 fracts~4946_OUT0 fracts~4946 0 1 fracts~4945_OUT0 fracts~4945 0 1 fracts~4944_OUT0 fracts~4944 0 1 fracts~4943_OUT0 fracts~4943 0 1 fracts~4942_OUT0 fracts~4942 0 1 fracts~4941_OUT0 fracts~4941 0 1 fracts~1244_OUT0 fracts~1244 0 1 fracts~1243_OUT0 fracts~1243 0 1 fracts~1242_OUT0 fracts~1242 0 1 fracts~1241_OUT0 fracts~1241 0 1 fracts~1240_OUT0 fracts~1240 0 1 fracts~1239_OUT0 fracts~1239 0 1 LessThan1157_OUT fracts~1238 0 fracts~1238_OUT0 ufract~1026 ufract~1026_OUT0 leftright~147_OUT0 0 sign~108_OUT0 1 sign~108 1' h0 -- ShiftRight48 A[27..0] 3' h0 -- >> ShiftRight48_OUT COUNT [8..0] Add534_OUT RIGHT_SHIFT Result~17454 Result~17454_OUT0 Result~4839_OUT0 Result~4843_OUT0 Result~4836 Result~4836_OUT0 Result~4851_OUT0 orx~7811 orx~7811_OUT0 orx~7810_OUT0 orx~7809 orx~7809_OUT0 orx~7808_OUT0 orx~7785 orx~7785_OUT0 orx~7784_OUT0 orx~1941 orx~1941_OUT0 orx~1940_OUT0 orx~1939 orx~1939_OUT0 orx~1938_OUT0 orx~1937 orx~1937_OUT0 orx~1936_OUT0 Mux162 Add1787_OUT SEL[4..0] 5' h00 -- fract~65_OUT0 C_ER_OUT0 OUT Mux162_OUT OUT Mux42_OUT DATA[31..0] 3' h0 -- MUX Mux42 SEL[4..0] 5' h00 -DATA[31..0] 3' h0 -- MUX 0 1 fracts~4955_OUT0 fracts~4955 0 1 fracts~4954_OUT0 fracts~4954 0 1 fracts~4953_OUT0 fracts~4953 0 1 fracts~4952_OUT0 fracts~4952 LessThan4559_OUT fpresult~_OUT0 0 1 fracts~4951_OUT0 fracts~4951 0 LessThan1157 A[26..0] 3' h0 -- exp~1224_OUT0 C_S2_OUT0 B[26..0] < 1 fracts~4950 0 fracts~4950_OUT0 orx~7819 orx~7819_OUT0 orx~7818_OUT0 orx~7817 orx~7817_OUT0 orx~7816_OUT0 orx~7815 orx~7815_OUT0 orx~7814_OUT0 orx~7813 orx~7813_OUT0 orx~7812_OUT0 orx~7793 orx~7793_OUT0 orx~7792_OUT0 orx~7791 orx~7791_OUT0 orx~7790_OUT0 orx~7789 orx~7789_OUT0 orx~7788_OUT0 orx~7787 C_ER_OUT0 orx~7786_OUT0 orx~7787_OUT0 orx~1947 orx~1947_OUT0 orx~1946_OUT0 orx~1945 orx~1945_OUT0 orx~1944_OUT0 orx~1943 orx~1943_OUT0 orx~1942_OUT0 orx~1923 orx~1923_OUT0 orx~1922_OUT0 orx~1921 orx~1921_OUT0 orx~1920_OUT0 orx~1919 orx~1919_OUT0 orx~1918_OUT0 orx~1917 orx~1917_OUT0 orx~1916_OUT0 0 1 fracts~1256_OUT0 fracts~1256 0 1 fracts~1255_OUT0 fracts~1255 0 1 fracts~1254_OUT0 fracts~1254 LessThan1157_OUT C_S2_OUT0 0 1 find_leftmost~12561 fracts~1253_OUT0 fracts~1253 find_leftmost~12567 find_leftmost~12567_OUT0 find_leftmost~12555_OUT0 find_leftmost~12531 find_leftmost~12525 find_leftmost~12531_OUT0 find_leftmost~12519_OUT0 find_leftmost~12489 find_leftmost~12489_OUT0 find_leftmost~12483_OUT0 find_leftmost~12015 find_leftmost~12015_OUT0 find_leftmost~12009_OUT0 find_leftmost~11979 find_leftmost~11973 find_leftmost~11979_OUT0 find_leftmost~11967_OUT0 find_leftmost~11943 find_leftmost~11937 find_leftmost~11943_OUT0 find_leftmost~11931_OUT0 find_leftmost~11319 find_leftmost~11313 find_leftmost~11319_OUT0 find_leftmost~11307_OUT0 find_leftmost~11283 find_leftmost~11277 find_leftmost~11283_OUT0 find_leftmost~11271_OUT0 find_leftmost~11241 find_leftmost~11235 find_leftmost~11241_OUT0 find_leftmost~11231_OUT0 0 0 1 exp~2074_OUT0 exp~2074 0 0 1 exp~2073_OUT0 exp~2073 0 0 1 exp~2072_OUT0 exp~2072 0 0 exp~2071_OUT0 Result~17454_OUT0 Classfp~[837..834] fractr~[551..480] SEL Result~4836_OUT0 SEL Classfp~[833..832] 2' h0 -- DATAA exp~1943 SEL C_ER_OUT0 OUT0 1' h0 -- DATAA DATAA OUT0 2' h0 -- DATAB OUT0 fractr~_OUT0 1' h0 -- DATAB DATAB MUX21 find_leftmost~11907_OUT0 LessThan4559_OUT Equal36_OUT MUX21 MUX21 fractc~[3503..3480] fractc~[3479..3456] SEL SEL DATAA fract~65_OUT0 fpresult~_OUT0 fract~66_OUT0 DATAA OUT0 OUT0 fractc~_OUT0 DATAB DATAB MUX21 exp~1943_OUT0 MUX21 LessThan1157_OUT fractc~[911..888] fractc~[887..864] SEL SEL DATAA DATAA C_S2_OUT0 exp~1224_OUT0 OUT0 OUT0 fractc~_OUT0 DATAB DATAB MUX21 fpresult~[3937..3906] MUX21 find_leftmost~11909_OUT0 fpresult~_OUT0 SEL DATAA OUT0 find_leftmost~11915_OUT0 find_leftmost~11923_OUT0 find_leftmost~11931_OUT0 find_leftmost~11937_OUT0 find_leftmost~11955_OUT0 add~25_OUT0 Equal9_OUT ShiftLeft96_OUT ShiftLeft92_OUT ShiftLeft87_OUT multiply~156_OUT0 32' h7F800001 -- fpresult~_OUT0 DATAB MUX21 Classfp~[1926..1925] SEL DATAA OUT0 2' h0 -- Classfp~_OUT0 DATAB MUX21 Classfp~[879..878] SEL 2' h0 -- DATAA OUT0 DATAB Classfp~_OUT0 MUX21 Classfp~[563..559] SEL DATAA 2' h0 -- OUT0 Classfp~_OUT0 3' h0 -DATAB MUX21 Result~4839 Result~4839_OUT0 orx~7825 orx~7825_OUT0 orx~7824_OUT0 orx~7821 orx~7821_OUT0 orx~7820_OUT0 orx~7799 orx~7799_OUT0 orx~7798_OUT0 orx~7795 orx~7795_OUT0 orx~7794_OUT0 orx~1953 orx~1953_OUT0 orx~1952_OUT0 orx~1949 orx~1949_OUT0 orx~1948_OUT0 orx~1927 orx~1927_OUT0 orx~1926_OUT0 0 1 fracts~4935_OUT0 fracts~4935 0 1 fracts~4933_OUT0 fracts~4933 find_leftmost~12573 find_leftmost~12573_OUT0 find_leftmost~12567_OUT0 find_leftmost~12501 find_leftmost~12495 find_leftmost~12501_OUT0 find_leftmost~12489_OUT0 find_leftmost~12021 find_leftmost~12015_OUT0 find_leftmost~12021_OUT0 find_leftmost~11949 find_leftmost~11949_OUT0 find_leftmost~11943_OUT0 0 1 0 1 0 1 find_leftmost~11927_OUT0 find_leftmost~11912_OUT0 1 0 1 find_leftmost~11960 0 0 0 find_leftmost~11960_OUT0 1 1 find_leftmost~11954 1 find_leftmost~11948 find_leftmost~11942 find_leftmost~11936 find_leftmost~11930 0 0 1 find_leftmost~11926 1 0 1 find_leftmost~11922 1 find_leftmost~11918 1 find_leftmost~11914 find_leftmost~11911 find_leftmost~11908 0 1 0 1 find_leftmost~11919_OUT0 0 0 0 0 0 0 find_leftmost~12495_OUT0 1 1 1 0 0 1 find_leftmost~11910_OUT0 find_leftmost~11910 find_leftmost~11325 find_leftmost~11325_OUT0 find_leftmost~11319_OUT0 find_leftmost~11247 find_leftmost~11247_OUT0 find_leftmost~11241_OUT0 1 0 1 exp~2077_OUT0 exp~2077 0 0 1 exp~2069_OUT0 exp~2076_OUT0 exp~2076 0 0 1 exp~2075_OUT0 exp~2075 1 0 1 exp~1951_OUT0 exp~1951 1 0 1 exp~1804_OUT0 exp~1804 0 0 1 exp~1802_OUT0 exp~1802 0 0 1 exp~1796_OUT0 exp~1801_OUT0 exp~1801 0 0 1 exp~1800_OUT0 exp~1800 182 Classfp~_OUT0 183 184 185 186 187 188 Mult16 ShiftRight70 A[23..0] 24' h9D4952 -B[23..0] fractr~_OUT0 10' h001 -- Add781 + B[9..0] + 9' h0F9 -- SEL Add784 1' h1 -B[12..0] 13' h0001 -- rfract~[1034..1012] 1 SEL DATAA OUT0 DATAB SEL DATAA OUT0 LessThan1691 DATAA DATAB OUT0 DATAB DATAB 11' h000 -B[11..0] 1' h0 -- < MUX21 0 check_round~75 Add786 1 MUX21 ADDER ADDER stickyx~67 1' h1 -B[13..0] 14' h1FFD -- + Add786_OUT Add782 LessThan1689 A[9..0] B[9..0] Add777 0 1 1 0 1 find_leftmost~11966 1 0 1' h1 -B[14..0] 15' h0001 -- Add778 1' h1 -B[10..0] DATAA 0 + Add785_OUT ADDER + 1 1 1' h1 -- 1 find_leftmost~12026 0 0 1 find_leftmost~12020 1 0 1 find_leftmost~12014 0 0 1 find_leftmost~12008 1 0 1 find_leftmost~12002 0 0 1 find_leftmost~11996 1 find_leftmost~11990 1 find_leftmost~11984 find_leftmost~11978 find_leftmost~11972 ADDER LessThan1688 CIN 1 A[9..0] OUT0 < 1' h1 -B[9..0] DATAB 9' h180 -- LessThan1688_OUT Mult16_OUT LESS_THAN rexp~[359..352] 0 MUX21 find_leftmost~12019_OUT0 9' h169 1' h1 -- A[14..0] 0 0 0 Add785 < A[10..0] SEL 14' h0000 -1 0 1 find_leftmost~11960_OUT0 1 A[9..0] LESS_THAN shifty~[237..224] ADDER find_leftmost~11961_OUT0 find_leftmost~12015_OUT0 + ADDER + B[7..0] CIN B[9..0] A[7..0] 8' hFD -- SEL 0 1 exp~1834_OUT0 1 find_leftmost~12025 1 exp~1834 0 DATAA OUT0 find_leftmost~12018_OUT0 find_leftmost~11973_OUT0 find_leftmost~11967_OUT0 find_leftmost~12022_OUT0 find_leftmost~12023_OUT0 A[13..0] LESS_THAN MUX21 ADDER exp~1797_OUT0 exp~1798_OUT0 exp~1799_OUT0 exp~1800_OUT0 exp~1801_OUT0 exp~1802_OUT0 find_leftmost~12021_OUT0 MUX21 rfract~_OUT0 sfract~_OUT0 MUX21 A[11..0] OUT0 + 0 OUT0 RIGHT_SHIFT DATAA A[12..0] ADDER 0 Result~6997 SEL DATAA DATAB shiftr~[1580..1569] SEL ADDER + B[8..0] shiftr~[1556..1545] Add783 A[9..0] 10' h07F -- A[8..0] 1' h1 -- >> COUNT [11..0] shiftr~[1568..1557] Add779 A[9..0] B[9..0] Add780_OUT sfract~[1155..1130] A[27..0] x MULTIPLIER 1 rexp~_OUT0 find_leftmost~12024 DATAB Add825 A[4..0] Result~6995 1' h1 -- MUX21 + B[4..0] 5' h05 -- Result~6995_OUT0 ADDER find_leftmost~11325_OUT0 1 find_leftmost~11324_OUT0 0 1 find_leftmost~11330 1 find_leftmost~11323_OUT0 0 1 find_leftmost~11329 1 find_leftmost~11322_OUT0 0 1 find_leftmost~11328 find_leftmost~11326_OUT0 find_leftmost~11327_OUT0 Add776 A[4..0] 1' h1 -B[4..0] 5' h05 -- + ADDER Result~6968 multiply~156 Classfp~_OUT0 stickyx~66 orx~2921_OUT0 exp~_OUT0 find_leftmost~11979_OUT0 find_leftmost~11985_OUT0 find_leftmost~11991_OUT0 find_leftmost~11997_OUT0 find_leftmost~12003_OUT0 find_leftmost~12009_OUT0 Add826_OUT 0 exp~1833_OUT0 1 exp~1833 0 1 exp~1832 Add827 A[10..0] 1' h1 -B[10..0] exp~1803_OUT0 exp~1804_OUT0 expon_out~_OUT0 1' h1 -- + Add827_OUT ADDER LessThan1689_OUT exp~1832_OUT0 Add782_OUT find_leftmost~12026_OU multiply~156_OUT0 Add776_OUT find_leftmost~11328_OU find_leftmost~11329_OU find_leftmost~11330_OU Add825_OUT find_leftmost~12024_OU find_leftmost~12025_OU 189 190 191 192 193 194 195 196 197 198 199 200 201 202 203 204 205 206 exp~1831_OUT0 exp~1830_OUT0 exp~1829_OUT0 exp~1828_OUT0 exp~1827_OUT0 ShiftLeft88_OUT fract_out~_OUT0 Result~6995_OUT0 zerores~88_OUT0 fpresult~[3557..3527] 0 1 1 zerores~89 multiply~155 Classfp~_OUT0 SEL 0 0 1 Result~7081 Result~7049_OUT0 0 0 1 Result~7080 Result~7048_OUT0 0 0 1 Result~7079 Result~7047_OUT0 Result~7050_OUT0 fpresult~[3588..3558] 0 0 1 SEL DATAA Result~7078 OUT0 DATAA 31' h7F800001 -- Result~7046_OUT0 OUT0 DATAB fpresult~_OUT0 0 0 1 MUX21 Result~7077 Result~7045_OUT0 exp~1831_OUT0 0 0 0 1 0 Result~7076 Result~7044_OUT0 1 Result~7058 0 0 1 Result~7075 0 0 1 Result~7053 Result~7043_OUT0 31' h7F800000 -- 0 0 Result~7074 Result~7042_OUT0 MUX21 0 0 1 Result~7073 Result~7041_OUT0 0 0 1 Result~7072 Result~7040_OUT0 0 0 1 Result~7071 Result~7039_OUT0 0 0 1 Result~7070 Result~7038_OUT0 0 0 1 Result~7069 Result~7037_OUT0 0 0 1 Result~7068 Result~7036_OUT0 0 0 1 Result~7067 Result~7035_OUT0 0 0 1 Result~7066 Result~7034_OUT0 0 0 1 Result~7065 Result~7033_OUT0 0 0 1 Result~7064 Result~7032_OUT0 0 0 1 Result~7063 Result~7031_OUT0 0 0 1 Result~7062 Result~7030_OUT0 0 0 1 Result~7061 Result~7029_OUT0 0 0 1 Result~7060 Result~7028_OUT0 0 0 infres~88_OUT0 0 0 1 Result~7059 1 0 infres~89 1 1 Result~7027 0 0 1 1 0 Result~7026 1 Result~7057 0 0 1 1 0 Result~7025 1 Result~7056 0 0 1 DATAB 1 1 0 Result~7024 1 Result~7055 1' h0 -- ShiftRight72 A[27..0] 3' h0 -- >> COUNT [8..0] Add789_OUT ShiftRight72_OUT RIGHT_SHIFT Result~7134 fpresult~_OUT0 Result~7138 Result~7154 Result~7154_OUT0 Result~7146 Result~7106 Result~7106_OUT0 Result~7088 Result~7088_OUT0 orx~3016 orx~3016_OUT0 orx~3015_OUT0 orx~3014 orx~3014_OUT0 orx~3013_OUT0 orx~3012 orx~3012_OUT0 orx~3011_OUT0 orx~3010 orx~3010_OUT0 orx~3009_OUT0 orx~3008 orx~3008_OUT0 orx~3007_OUT0 orx~3006 orx~3006_OUT0 orx~3005_OUT0 orx~3004 orx~3004_OUT0 orx~3003_OUT0 orx~3002 orx~3002_OUT0 orx~3001_OUT0 orx~2994 orx~2994_OUT0 orx~2993_OUT0 orx~2992 orx~2992_OUT0 orx~2991_OUT0 orx~2990 orx~2990_OUT0 orx~2989_OUT0 orx~2988 orx~2988_OUT0 orx~2987_OUT0 orx~2986 orx~2986_OUT0 orx~2985_OUT0 orx~2984 orx~2984_OUT0 orx~2983_OUT0 orx~2982 orx~2982_OUT0 orx~2981_OUT0 orx~2980 orx~2980_OUT0 orx~2979_OUT0 orx~2978 LessThan1721 1' h0 -A[8..0] Add789_OUT < B[8..0] fractc~[1319..1296] fractc~[1343..1320] 8' h00 -LESS_THAN SEL DATAA SEL OUT0 DATAA DATAB OUT0 DATAB fract~46_OUT0 C_S1_OUT0 LessThan1746 A[26..0] 3' h0 -B[26..0] exp~1835_OUT0 fpresult~_OUT0 MUX21 < fractc~[1271..1248] LESS_THAN 3' h0 -- fractc~_OUT0 MUX21 SEL DATAA OUT0 fractc~_OUT0 DATAB fracts~1787_OUT0 Result~7106_OUT0 fracts~1786_OUT0 fracts~1785_OUT0 fpresult~_OUT0 fracts~1784_OUT0 fracts~1783_OUT0 fracts~1782_OUT0 fracts~1803_OUT0 MUX21 Classfp~[813..809] SEL DATAA 2' h0 -- OUT0 Classfp~_OUT0 3' h0 -DATAB fracts~1801_OUT0 fracts~1794_OUT0 fracts~1793_OUT0 fracts~1792_OUT0 fracts~1791_OUT0 fracts~1790_OUT0 fracts~1789_OUT0 fracts~1788_OUT0 orx~2995_OUT0 orx~2971_OUT0 orx~2973_OUT0 orx~2997_OUT0 orx~2999_OUT0 fractc~_OUT0 MUX21 Result~7113 Result~7113_OUT0 orx~3000 orx~3000_OUT0 LessThan1747_OUT fracts~[1832..1805] fracts~[1860..1833] orx~2998 SEL ShiftRight72_OUT SEL DATAA OUT0 28' h0000000 -- orx~2998_OUT0 DATAA DATAB 3' h0 -- orx~2996 0 MUX21 Equal13 orx~2996_OUT0 1 fracts~1804 orx~2974 A[8..0] B[8..0] 9' h000 -- = orx~2974_OUT0 0 1 EQUAL orx~2972 fracts~1802 orx~2972_OUT0 fracts~[1888..1861] 1' h0 -0 ShiftRight71 A[27..0] 3' h0 -- Add790_OUT >> 1 SEL OUT0 fracts~1800 DATAA DATAB COUNT [8..0] OUT0 RIGHT_SHIFT 0 DATAB 0 0 1 fracts~1913_OUT0 fracts~1913 1 MUX21 fracts~_OUT0 LessThan1746_OUT fracts~1799 0 1 fracts~1798 0 1 1' h0 -- fracts~1797 MUX21 0 1 fracts~1796 0 1 fracts~1795 0 1 fracts~1781 0 0 1 fracts~1912_OUT0 fracts~1912 0 0 1 fracts~1911_OUT0 fracts~1911 0 0 1 fracts~1910_OUT0 fracts~1910 0 0 1 fracts~1909_OUT0 fracts~1909 0 0 1 fracts~1908_OUT0 fracts~1908 0 0 1 fracts~1907_OUT0 fracts~1907 0 0 1 fracts~1906_OUT0 fracts~1906 0 0 1 fracts~1905_OUT0 fracts~1905 0 0 1 fracts~1904_OUT0 fracts~1904 0 0 1 fracts~1903 fracts~1903_OUT0 LessThan1720 1' h1 -- 1' h0 -- Add792 A[8..0] Add789_OUT A[28..0] < B[8..0] 4' h1 -B[28..0] 8' hE5 -- + 0 LESS_THAN ufract~368 0 0 1 1 ADDER ufract~369 fracts~1890 C_S1_OUT0 fpresult~_OUT0 0 1 ufract~370 fracts~1896_OUT0 fracts~1897_OUT0 fracts~1898_OUT0 fracts~1899_OUT0 fracts~1900_OUT0 fracts~1901_OUT0 fracts~1902_OUT0 fracts~1903_OUT0 fracts~1904_OUT0 fracts~1905_OUT0 fracts~1906_OUT0 fracts~1907_OUT0 fracts~1908_OUT0 fracts~1909_OUT0 fracts~1910_OUT0 fracts~1911_OUT0 0 1 ufract~371 0 1 ufract~372 0 1 ufract~373 0 1 fracts~_OUT0 ufract~374 0 0 1 ShiftRight73 fracts~1917 fracts~1914 1' h1 -- 0 A[27..0] 1 COUNT [10..0] >> ShiftRight73_OUT ufract~375 0 0 RIGHT_SHIFT 1 0 fracts~1915 1 ufract~376 0 0 1 0 fracts~1916 1 ufract~377 0 1 ufract~378 0 1 ufract~379 0 1 ufract~380 Add791 1' h0 -A[24..0] fractc~_OUT0 fracts~1889_OUT0 sticky~55_OUT0 fracts~1891_OUT0 fracts~1892_OUT0 fracts~1893_OUT0 fracts~1894_OUT0 fracts~1895_OUT0 B[24..0] 0 1 + ADDER ufract~381 0 1 ufract~382 0 1 ufract~383 0 1 ufract~384 Result~7181 Mux65 Result~7181_OUT0 0 1 ufract~385 SEL[4..0] 4' h0 -- 0 1 ufract~386 fracts~1912_OUT0 fracts~1913_OUT0 0 1 LessThan1777 ufract~387 A[11..0] 12' h01B -B[11..0] Add799_OUT < 0 1 LESS_THAN LessThan1778 ufract~388 orx~3022 OUT DATA[31..0] 0 orx~3018 B[11..0] < orx~3019 0 orx~3022_OUT0 orx~3021_OUT0 0 1 A[11..0] 12' h01A -- orx~3020 1 orx~3021 1 LESS_THAN find_leftmost~11475_OUT0 ufract~389 0 1 ufract~390 0 1 ufract~391 0 1 MUX ufract~392 0 1 ufract~393 0 1 ufract~394 0 1 ufract~395 0 ShiftLeft89 1 A[27..0] Add798_OUT << ufract~396 COUNT [12..0] ShiftLeft89_OUT LEFT_SHIFT shiftr~_OUT0 find_leftmost~11475 1 0 1 find_leftmost~11476 210 211 212 find_leftmost~11476_OUT0 ufract~391_OUT0 ufract~392_OUT0 ufract~393_OUT0 ufract~394_OUT0 ufract~395_OUT0 ufract~396_OUT0 ufract~390_OUT0 ufract~389_OUT0 ufract~388_OUT0 ufract~387_OUT0 ufract~386_OUT0 ufract~385_OUT0 ufract~384_OUT0 ufract~383_OUT0 ufract~382_OUT0 ufract~381_OUT0 ufract~380_OUT0 ufract~379_OUT0 ufract~378_OUT0 ufract~377_OUT0 ufract~376_OUT0 ufract~375_OUT0 ufract~374_OUT0 ufract~373_OUT0 ufract~372_OUT0 ufract~371_OUT0 LessThan1720_OUT ufract~368_OUT0 213 214 215 216 217 218 219 220 221 222 223 224 225 226 227 228 229 230 231 232 233 234 235 236 237 238 239 240 241 242 243 244 245 246 247 248 249 250 251 252 253 254 255 256 257 258 259 260 261 262 263 264 265 266 267 Appendix B VHDL Code for the Pacemaker Unit library IEEE; use IEEE.std_logic_1164.all; use IEEE.std_logic_arith.all; use IEEE.math_real.all; --library IEEE_PROPOSED; --use IEEE_PROPOSED.fixed_float_types.all; --use IEEE_PROPOSED.fixed_pkg.all; --use IEEE_PROPOSED.float_pkg.all; entity Pace_Unit is port (clk,rst:in STD_LOGIC;V_out:out STD_LOGIC_VECTOR(31 downto 0)); end Pace_Unit; architecture PU of Pace_Unit is -- UP Model Parameters constant g_Ca : real := 0.01; constant E_NSCC : real := 0.0; constant g_capNSCC_Ca : real := 0.12; constant g_capNSCC_Na :real := 220.0; constant K_NSCC :real := 0.12; constant h_NSCC :real := 3.0; constant g_PM :real := 420.0; constant K_PM :real := 1.0; constant g_Na :real := 15000.0; constant K_Na :real := 10000.0; constant h_Na :real := 4.0; constant V_SERCA :real := 100000.0; constant A_2 :real := 0.0006; constant A_4 :real := 3.57; constant A_5 :real := 0.000027; constant A_6 :real := 0.0000231; constant V_MCU :real := 800.0; constant K_MCU :real := 10.0; constant K_INH :real := 10.0; constant h_INH :real := 4.0; constant V_NCX :real := 0.5; constant K_NCX :real := 0.3; constant u_S1S2 :real := 0.04; constant k_IPR :real := 2000.0; constant k_1 :real := 0.0; constant k_min1 :real := 6.4; constant k_2 :real := 4.0; constant r_2 :real := 200.0; constant r_min2 :real := 0.0; constant r_4 :real := 750.0; constant R_1 :real := 36.0; constant R_3 :real := 300.0; constant g_alpha :real := 0.02; constant g_beta :real := 300.0; constant K_beta :real :=2.0; constant h_beta :real := 2.0; constant K_m :real := 0.01; constant B_m :real := 100.0; 268 269 270 271 272 273 274 275 276 277 278 279 280 281 282 283 284 285 286 287 288 289 290 291 292 293 294 295 296 297 298 299 300 301 302 303 304 305 306 307 308 309 310 311 312 313 314 315 316 317 318 319 320 321 322 323 constant y_S1 :real := 100.0; constant y_S2 :real := 1.0; constant y_ER :real := 20.0; constant y_MT :real := 200.0; constant d_S :real := 26.0; constant C_m :real := 20.0; constant Z_Ca :real := 2.0; constant Z_Na :real :=1.0; constant V_t :real := 26.7; constant C_O :real:= 1800.0; constant P :real := 1.0; signal V_m :real := -70.1; signal C_S1 :real := 0.12; signal C_S2 :real := 0.023; signal C_ER :real := 203.0; signal C_MT: real := 0.22; signal N_S1 :real := 10100.0; signal H : real := 0.0; signal phi_3 :real := 0.306; signal a_phi3,b_phi3,phi_1,phi_min1,phi_2,J_IPR,J_S1S2,J_NCX,J_MCU,J_SERCA : real := 0.0 ; signal I_Na,I_PM,g_NSCC_Ca,g_NSCC_Na,I_NSCC_Ca,I_NSCC_Na,E_Ca,I_Ca,I_iCa,I_iNa,f_m : real := 0.0 ; signal l_MTS1,l_ERS1,l_ERS2,l_S1S2,l_MTS2 : real := 0.0 ; begin process(clk,rst) begin if rst = '1' and rising_edge(clk) then V_out <= CONV_STD_LOGIC_VECTOR(INTEGER(V_m),32); a_phi3 <= g_alpha; b_phi3 <= g_beta*((C_S2**h_beta)/(K_beta**h_beta+C_S2**h_beta)); phi_3 <= phi_3+ (a_phi3-b_phi3*phi_3);--IP3R Slow Rate Variable --IP3R Constants phi_1 <= (k_1*R_1+r_2*C_S2)/(R_1+C_S2); phi_min1 <= ((k_min1+r_min2)*R_3)/(R_3+C_S2); phi_2 <= (k_2*R_3+r_4*C_S2)/(R_3+C_S2); J_IPR <=k_IPR*(((P*phi_1*H)/(P*phi_1+phi_min1))**4.0)*(C_ER-C_S2); J_S1S2 <= u_S1S2*(C_S2-C_S1); J_NCX <= V_NCX*(C_MT/(K_NCX+C_MT)); J_MCU <= V_MCU*((C_S2**2.0)/(K_MCU**2.0+C_S2**2.0)); J_SERCA <= V_SERCA*((C_S1-A_2*C_ER)/(1.0 +A_4*C_S1+A_5*C_ER+A_6*C_S1*C_ER)); I_Na <= g_PM*(C_S1**h_Na/(K_Na**h_Na+C_S1**h_Na)); g_NSCC_Ca <= g_capNSCC_Ca*(K_NSCC**h_NSCC/(K_NSCC**h_NSCC+C_S1**h_NSCC)); g_NSCC_Na <= g_capNSCC_Na*(K_NSCC**h_NSCC/(K_NSCC**h_NSCC+C_S1**h_NSCC)); I_NSCC_Ca <= g_NSCC_Ca*(V_m-E_NSCC); I_NSCC_Na <= g_NSCC_Na*(V_m-E_NSCC); E_Ca <= 0.5*V_t*log(C_O/C_S1); I_Ca <= g_Ca*(V_m-E_Ca); l_MTS1 <= y_MT/y_S1; l_ERS1 <= y_ER/y_S1; l_ERS2 <= y_ER/y_S2; l_S1S2 <= y_S1/y_S2; 324 325 326 327 328 329 330 331 332 333 334 335 336 337 338 339 340 341 342 343 344 345 346 l_MTS2 <= y_MT/y_S2; f_m <= 1.0/(1.0+(K_m*B_m/(K_m+C_MT**2.0))); I_iNa <= I_NSCC_Na+I_Na; I_iCa <= I_NSCC_Ca+I_Ca; V_m <= V_m- ((I_iCa+I_iNa)/C_m); C_S1 <= C_S1 + (J_S1S2+l_MTS1*J_NCX)((d_S/Z_Ca)*I_iCa+l_ERS1*J_SERCA); C_S2 <= C_S2 + (l_ERS2*J_IPR-(l_S1S2*J_S1S2+l_MTS2*J_MCU)); C_ER <= C_ER + (J_SERCA-J_IPR); C_MT <= C_MT + f_m*(J_MCU-J_NCX); N_S1 <= N_S1 - ((d_S/Z_Na)*I_iNa); H <= H+ ((phi_3*(1.0-H))- (((P*phi_1*phi_2)/(P*phi_1+phi_min1)*H))); --V_out <= CONV_STD_LOGIC_VECTOR(INTEGER(V_m),32); end if; end process; end PU;
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