White Paper SRUNNER: An Embedded Solution for Serial Configuration Device Programming Introduction The SRunner is a software driver that allows you to program the Altera Serial Configuration Devices (EPCS1 and EPCS4), using an embedded solution. The SRunner sofware can be ported and used in different embedded system easily. The input file to the SRunner is the Raw Programmind Data (RPD) file generated by the Quartus II version 2.2 SP2 and the Quartus II software developed after version 2.2 SP2. The SRunner is able to read the RPD file and write to the Serial Configuration Devices and the time taken is comparable to the programming time taken by Quartus II software. Figure 1 shows the concept of SRunner which is the embedded solution for EPCS Programming. Figure 1. The Concept of SRunner Quartus II 2.2 SP2 and above Generate RPD file RPD file Program EPCS EPCS4/EPCS1 SRUNNER Save RPD in Memory MicroProcessor or MicroController Memory About Raw Programming Data (RPD) File The input programming file for SRunner is the RPD file. However, you need to generate a POF file first and convert the POF file to the RPD file. You can use the Configuration tab of the Device & Pin Options dialog box, which is available from the Device page of the Settings dialog box (Assignments menu), to direct the Compiler to generate a POF file by selecting a targeted Serial Configuration Device, as shown in Figure 2. August 2003, ver. 2.0 WP-CYCEPCS-2.0 1 SRUNNER: An Embedded Solution for Serial Configuration Device Programming Figure 2. Altera Corporation Generating a POF for the Selected Serial Configuration Device After compiling the project and generating the POF file, you need to convert the POF file to RPD file by go to Convert Programming Files dialog box in the File menu. This is shown in Figure 3. 2 Altera Corporation Figure 3. SRUNNER: An Embedded Solution for Serial Configuration Device Programming Converting a POF file to an RPD file The RPD file size depends on which Serial Configuration Device is used. Table 1 lists the RPD file size for each serial configuration device. 3 SRUNNER: An Embedded Solution for Serial Configuration Device Programming Altera Corporation Table 1. RPD file size for Serial Configuration Devices Device RPD file size (bits) EPCS1 1, 048, 576 EPCS4 4, 194, 304 If the amount of memory on your board is not enough to save all the data of the RPD file, you can delete part of the ÿ or 0xFF at the end of the RPD file. Proof of Concept - Implement SRunner in Motorola ColdFire MCF5206e Embedded Processor The SRunner source code has been sucessfully implemented in a Motorola ColdFire MCF5206e embedded processor to accomplish the embedded programming on the EPCS4 device, using a Motorola M5206EC3 ColdFire Matrix Design Evaluation System board with a 54 MHz onboard oscillator. The same solution is expected to work in EPCS1, as well. This document explains the implementation of the SRunner to program Altera's Serial Configuration Devices on the ColdFire Evaluation Board. Note: Whenever the term “serial configuration device(s)” is used in this document, it refers to the Altera EPCS1 and EPCS4 devices. Whenever the term “ColdFire Evaluation Board” is used in this document, it refers to the Motorola M5206EC3 ColdFire Matrix Design Evaluation System board. Implementation Functional Diagram Figure 4 presents a block diagram of the implementation of the SRunner source code on the ColdFire Evaluation Board. Figure 4. Implementation of the SRunner Source Code on the ColdFire Evaluation Board ColdFire Evaluation Board Instructions BDM Interface PC Parallel Port RPD Download 4 ColdFire Parallel Port Interface EPCS Programming Serial Configuration Device Test Board Altera Corporation SRUNNER: An Embedded Solution for Serial Configuration Device Programming The three main blocks in the implementation process are the parallel port, the ColdFire Evaluation Board, and the serial configuration device. The parallel port refers to the common printer port available on PCs. The ColdFire Evaluation Board comes with 4Mbyte of 3.3V ADRAM installed and supports background debug mode (BDM). The ColdFire Evaluation Board block contains the BDM and ColdFire parallel port interface modules. Source Files The SRunner source code is written in C Language. It is divided into modules that reside in separate files. Table 2 describes the SRunner source code files. Table 2. Source Files File main.c SRunner.h SRunner.c io.h io.c Devboard.h devboard.c Description Platform Independent Contains the main( ) function. It manages the reading of the raw programming data input file (RPD file), processing and writing data to ADRAM and invokes programming the Serial Configuration Device. Controls the whole programming Serial Configuration Device process, including initiating programming process and sending data. Controls the I/O control functions and memory processing functions. Determined by the platform the system is working on. Therefore, you may customize these files to allow them to work with your system. Controls the embedded board operation. You may customize these files to allow them to work with your system. No Yes No No Implementation Process The implementation of the SRunner software driver on the ColdFire Evaluation Board consists of three stages: instruction download, RPD download and programming serial configuration device. Table 3 summarizes these implementation stages. Table 3. SRunner Programmer Implementation Stages Summary Stage Instruction Download RPD Download Programming Serial Configuration Device Objective Interface between the parallel port and the BDM module of the ColdFire Evaluation Board. Its main role is to download the instruction binary from the PC to the ColdFire Evaluation Board for execution by the ColdFire processor. Once completed, the ColdFire processor starts to execute the instructions. The process then moves into the RPD download stage. Interface between the PC parallel port and the ColdFire parallel port (General Purpose I/O). Two pins are utilized to carry out the RPD download operation. The ColdFire processor reads the RPD file from its parallel port. For each bit read, the bit is processed and then written to the ADRAM. Once completed, the process moves into configuration stage. Interface between the ColdFire parallel port and the Serial Configuration Device test board. Once the RPD download operation is successful, the ColdFire processor can program the Serial Configuration Device. 5 SRUNNER: An Embedded Solution for Serial Configuration Device Programming Altera Corporation Instruction Download The original and the customized SRunner source code are written in the C language. The source code is compiled and linked using the Metrowerks CodeWarrior software. The binary file is downloaded into the ColdFire Evaluation Board using the software through the P&E BDM Interface Cable For ColdFire (CABLECF). Once the instruction download is complete, the ColdFire processor starts executing the instructions and keeps reading its parallel port for data. This moves the implementation process into the RPD download stage. RPD Download While the ColdFire processor is reading its parallel port, the PC starts to dump the contents of the RPD bitby-bit to the parallel port. The two signals that are involved in this process are the DATA and CLOCK signals. Each bit dumped at the DATA signal is associated with a bit ‘0’ and a bit ‘1’ at the CLOCK signal, providing a positive-edge-trigger signal to the ColdFire processor to indicate a valid bit at the DATA signal. Before dumping the RPD bit stream, the PC sends a 32-bit bit stream indicating the size of the RPD file. Then the RPD download starts at the LSB first. It is necessary to download the LSB first so that in the next stage, the Serial Configuration Device can receive LSB first. When catching a positive-edge-trigger signal at the CLOCK, the value of the DATA signal is processed by putting its data bit in the appropriate parallel port register (PP0-PP7) before being written to the ADRAM. As shown in Figure 5, PP5 holds the data to be dumped to the ASDI pin of the Serial Configuration Device during programming. Therefore, the data bit read from the PP2 (DATA signal from the PC parallel port) is shifted to PP5. Bit PP3 (mapped to DCLK pin) is set to 0. Then the byte (PP0-PP7) is written to the ADRAM. The byte is then duplicated when the bit PP3 is set to 1, and written to the ADRAM. This is to produce a positive clock transition at DCLK for every DATA bit sent to the Serial Configuration Device ASDI pin during programming stage. Using this method, one bit data of RPD file actually occupies two bytes of memory space in ADRAM. An example is illustrated below. Table 4. ColdFire Parallel Port (when DATA signal ‘1’ is dumped to the PC’s parallel port) ColdFire Parallel Port (read from the PC’s Parallel Port) PP7 X PP6 X PP5 X PP4 X PP3 X PP2 1 PP1 X PP0 X ColdFire Parallel Port (being written to ADRAM after re-arrangement) PP7 X PP6 X PP5 1 PP4 X PP3 X PP2 0 PP1 X PP0 X ColdFire Parallel Port (being written to ADRAM after re-arrangement) PP7 X PP6 X PP5 1 PP4 X PP3 X PP2 1 PP1 X PP0 X This process is repeated until every bit in the RPD file is downloaded. Once this stage ends, the process goes to the programming stage. Figure 5 shows the pin mapping of the DATA and CLOCK signals to the ColdFire parallel port. 6 Altera Corporation SRUNNER: An Embedded Solution for Serial Configuration Device Programming Programming a Serial Configuration Device At this stage, the on-board ADRAM has been loaded with the configuration data, but the Serial Configuration Device has not been programmed yet. This stage involves the DCLK, NCONFIG, ASDI, NCS, and NCE output signals. These signals map to five ColdFire parallel port pins where each of these five pins are set as output, with reference to the ColdFire Evaluation Board. In ColdFire Parallel Port, DCLK maps to PP3, NCONFIG maps to PP4, ASDI maps to PP5, NCS maps to PP6, and NCE maps to PP7. In Serial Configuration Device Test Board, DCLK, ASDI and NCS are mapped to Serial Configuration Device while NCE and NCONFIG are mapped to Cyclone FPGA, If the Serial Configuration Device Test Board has Serial Configuration Device and Cyclone FPGA operating, then during the process of programming the Serial Configuration Device, NCE needs to be driven high to disable Cyclone FPGA access to the Serial Configuration Device. Cyclone FPGA can also be held in reset by a low level on NCONFIG. After the process of programing the Serial Configuration Device is complete, the NCE and NCONFIG signal needs to be driven low and high, respectively. If the Serial Configuration Device Test Board only consists of Serial Configuration Device, then the NCE and NCONFIG signals from the ColdFire Parallel Port can be ignored. The time needed to program the Serial Configuration Device is about 15 seconds, which is comparable to the time needed to program the Serial Configuration Device by Quartus II. However, the time taken will be different for different embedded environment. Figure 5 shows the pin mapping of these signals to the ColdFire parallel port. Figure 5. The Mapping of DATA, CLOCK, and Serial Configuration Device pins PC Parallel ColdFire Parallel Port Port CLOCK PP0 PP1 Serial Configuration Device Test Board DATA PP2 PP3 DCLK PP4 NCONFIG PP5 ASDI PP6 NCS PP7 NCE 7 SRUNNER: An Embedded Solution for Serial Configuration Device Programming Altera Corporation Table 5 shows how the data in ADRAM is loaded, and then dumped to the ColdFire parallel port. Table 5. ColdFire Parallel Port (when the data in ADRAM is loaded and dumped to the parallel port) PP7 PP6 PP5 PP4 PP3 PP2 PP1 PP0 Byte 1 1 0 1 X 0 X X X Byte 2 1 0 1 X 1 X X X Byte 3 1 0 0 X 0 X X X Byte 4 1 0 0 X 1 X X X Byte 5 1 0 0 X 0 X X X Byte 6 1 0 0 X 1 X X X Byte 7 1 0 1 X 0 X X X Byte 8 1 0 1 X 1 X X X Byte 9 1 0 0 X 0 X X X Byte 10 1 0 0 X 1 X X X … … Porting To port the source code to other platforms or embedded systems, you need to implement your I/O control routines in the existing I/O control functions. You can implement your I/O control routines between the following compiler directives: #ifndef WINDOWS_NT #define WINDOWS_NT 1 #endif #ifndef M5206EC3 /* This os is for ColdFire M5206EC3 Embedded Board */ /* Developed using Metrowerks CodeWarrior IDE version 4.1.0.3 */ #define M5206EC3 2 #endif #define PLATFORM M5206EC3 The platform-dependent source files (Table 2), main.c, io.h, io.c, devboard.h and devboard.c need to be customized to make them run in your system, as different platforms have different ways of interfacing with I/Os and handling data in memory. The part of the source code in these source files which needs modification for your working platform is shown below. 8 Altera Corporation SRUNNER: An Embedded Solution for Serial Configuration Device Programming #if PLATFORM == M5206EC3 /* The source code written here works only for */ /* ColdFire M5206EC3 Embedded Board */ #endif Customization for SRunner.h and SRunner.c is not needed, as they are platform-independent and generically written for handling the programming of Serial Configuration Devices. 9 SRUNNER: An Embedded Solution for Serial Configuration Device Programming SRunner PROGRAM FLOW Figure 6 illustrates the program flow of the SRunner software driver Figure 6. 10 SRunner Program Flow Altera Corporation Altera Corporation SRUNNER: An Embedded Solution for Serial Configuration Device Programming Conclusion The SRunner is a software driver developed for embedded Serial Configuration Device programming, which can be easily customized to fit in different embedded systems. The customized SRunner driver allows fast and easy Serial Configuration Device programming and requires no extra boards or components between the embedded system and the Serial Configuration Device test board. In addition, the source code development and customization cycle is short. All of these attributes have made SRunner an ideal embedded solution for embedded Serial Configuration Device programming. Copyright © 2003 Altera Corporation. All rights reserved. Altera, The Programmable Solutions Company, the stylized Altera logo, specific device designations, and all other words and logos 101 Innovation Drive San Jose, CA 95134 (408) 544-7000 www.altera.com that are identified as trademarks and/or service marks are, unless noted otherwise, the trademarks and service marks of Altera Corporation in the U.S. and other countries.* All other product or service names are the property of their respective holders. Altera products are protected under numerous U.S. and foreign patents and pending applications, maskwork rights, and copyrights. Altera warrants performance of its semiconductor products to current specifications in accordance with Altera’s standard warranty, but reserves the right to make changes to any products and services at any time without notice. Altera assumes no responsibility or liability arising out of the application or use of any information, product, or service described herein except as expressly agreed to in writing by Altera Corporation. Altera customers are advised to obtain the latest version of device specifications before relying on any published information and before placing orders for products or services. 11
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