PCI Development Kit,
Stratix Edition
Getting Started User Guide
101 Innovation Drive
San Jose, CA 95134
(408) 544-7000
www.altera.com
UG-STXPCIDVKT-1.0
P25-09107-00
Kit Version:
Document Version:
Document Date:
1.0.0
1.0.0 rev. 1
May 2003
Copyright
PCI Development Kit, Stratix Edition Getting Started User Guide
Copyright © 2003 Altera Corporation. All rights reserved. Altera, The Programmable Solutions Company, the stylized Altera logo,
specific device designations, and all other words and logos that are identified as trademarks and/or service marks are, unless
noted otherwise, the trademarks and service marks of Altera Corporation in the U.S. and other countries. All other product or
service names are the property of their respective holders. Altera products are protected under numerous U.S.
and foreign patents and pending applications, mask work rights, and copyrights. Altera warrants performance
of its semiconductor products to current specifications in accordance with Altera’s standard warranty, but
reserves the right to make changes to any products and services at any time without notice. Altera assumes no
responsibility or liability arising out of the application or use of any information, product, or service described
herein except as expressly agreed to in writing by Altera Corporation. Altera customers are advised to obtain the
latest version of device specifications before relying on any published information and before placing orders for
products or services.
ii
Altera Corporation
About this User Guide
This user guide provides comprehensive information about the Altera®
PCI Development Kit, Stratix™ Edition.
Table 1 shows the user guide revision history.
f
Refer to the readme file on the PCI Development Kit, Stratix Edition
CD-ROM for late-breaking information that is not available in this user
guide.
Table 1. User Guide Revision History
Date
Description
May 2003
How to Contact
Altera
First publication.
For the most up-to-date information about Altera products, go to the
Altera world-wide web site at www.altera.com.
For technical support on this product, go to www.altera.com/mysupport.
For additional information about Altera products, consult the sources
shown in Table 2.
Table 2. How to Contact Altera
Information Type
Technical support
USA & Canada
All Other Locations
www.altera.com/mysupport/
www.altera.com/mysupport/
(800) 800-EPLD (3753)
(7:00 a.m. to 5:00 p.m.
Pacific Time)
(408) 544-7000 (1)
(7:00 a.m. to 5:00 p.m.
Pacific Time)
Product literature
www.altera.com
www.altera.com
Altera literature services
[email protected] (1)
[email protected] (1)
Non-technical customer
service
(800) 767-3753
(408) 544-7000
(7:30 a.m. to 5:30 p.m.
Pacific Time)
FTP site
ftp.altera.com
ftp.altera.com
Note:
(1)
You can also contact your local Altera sales office or sales representative.
Altera Corporation
iii
PCI Development Kit, Stratix Edition Getting Started User Guide
Typographic
Conventions
About this User Guide
This document uses the typographic conventions shown in Table 3.
Table 3. Conventions
Visual Cue
Meaning
Bold Type with Initial
Capital Letters
Command names, dialog box titles, checkbox options, and dialog box options are
shown in bold, initial capital letters. Example: Save As dialog box.
bold type
External timing parameters, directory names, project names, disk drive names,
filenames, filename extensions, and software utility names are shown in bold type.
Examples: fMAX, \qdesigns directory, d: drive, chiptrip.gdf file.
Italic Type with Initial
Capital Letters
Document titles are shown in italic type with initial capital letters. Example: AN 75:
High-Speed Board Design.
Italic type
Internal timing parameters and variables are shown in italic type. Examples: tPIA, n + 1.
Variable names are enclosed in angle brackets (< >) and shown in italic type. Example:
<file name>, <project name>.pof file.
Initial Capital Letters
Keyboard keys and menu names are shown with initial capital letters. Examples:
Delete key, the Options menu.
“Subheading Title”
References to sections within a document and titles of on-line help topics are shown
in quotation marks. Example: “Typographic Conventions.”
Courier type
Signal and port names are shown in lowercase Courier type. Examples: data1, tdi,
input. Active-low signals are denoted by suffix n, e.g., resetn.
Anything that must be typed exactly as it appears is shown in Courier type. For
example: c:\qdesigns\tutorial\chiptrip.gdf. Also, sections of an actual
file, such as a Report File, references to parts of files (e.g., the AHDL keyword
SUBDESIGN), as well as logic function names (e.g., TRI) are shown in Courier.
1., 2., 3., and a., b., c.,... Numbered steps are used in a list of items when the sequence of the items is
important, such as the steps listed in a procedure.
■
Bullets are used in a list of items when the sequence of the items is not important.
v
The checkmark indicates a procedure that consists of one step only.
1
The hand points to information that requires special attention.
r
The angled arrow indicates you should press the Enter key.
f
The feet direct you to more information on a particular topic.
iv
Altera Corporation
Contents
About this User Guide ............................................................................................................................... iii
How to Contact Altera .................................................................................................................. iii
Typographic Conventions ............................................................................................................ iv
About this Kit ..................................................................................................................................................7
General Description .........................................................................................................................7
Documentation .................................................................................................................................8
Getting Started ..............................................................................................................................................9
Introduction ......................................................................................................................................9
Before You Begin ..............................................................................................................................9
Development Kit Contents .....................................................................................................9
Inspect the Board ...................................................................................................................10
Hardware Requirements .......................................................................................................10
Software Requirements .........................................................................................................10
Software Installation ......................................................................................................................11
Installing the Quartus II Software .......................................................................................11
Installing the PCI Development Kit, Stratix Edition CD-ROM Contents ......................12
Set Up Licensing .............................................................................................................................15
Install the Board in Your PC .........................................................................................................15
Stratix PCI Development Kit Application Walkthrough ........................................................17
Example 1. PCI Target Write (Demo Tab) ..........................................................................18
Example 2. PCI Master Write (Demo Tab) .........................................................................19
Example 3. PCI Master Loop (Debug Tab) .........................................................................20
Example 4. Latency Timer Configuration Register & PCI Master Loop (Debug Tab) 21
Example 5. Address Offset & Target Loop (Debug Tab) .................................................23
Configuring the Stratix Device ....................................................................................................24
Configuration Using Flash Memory ...................................................................................24
Configuration Using the Stratix PCI Development Kit Application ......................25
Configuration upon Board Power Up or with the SYS RESET Pushbutton .........27
Configuration via the JTAG Interface .................................................................................28
Prototyping Overview ...................................................................................................................30
Prototyping Walkthrough ............................................................................................................30
Create Your Design ................................................................................................................31
Simulate Your Design ............................................................................................................34
Compile Your Design in the Quartus II Software .............................................................37
Configure Your Stratix Device .............................................................................................39
Test Your Design in Hardware ............................................................................................39
Altera Corporation
v
About this Kit
1
The PCI Development Kit, Stratix Edition provides a complete hardware
platform designers can use to begin hardware testing and verification
quickly. Used with Altera PCI MegaCore® functions, the board supports
prototyping of a wide variety of custom designs and allows designers to
focus engineering efforts on value-added custom development, reducing
time to market.
The PCI Development Kit, Stratix Edition includes:
Altera Corporation
■
Stratix PCI Development Board—This board is a prototyping platform,
for both PCI form factor and standalone designs, that provides
system designers with solutions for PCI and DDR SDRAM designs.
You can use the short-form universal 3.3-/5.0-V PCI development
board in a 32- or 64-bit PCI slot. It supports 33- and 66-MHz PCI
interfaces as well as 133-MHz PCI-X interfaces. You can also use the
board as a standalone desktop application with an external power
supply (not provided with the kit). Refer to the Stratix PCI
Development Board Data Sheet for more information on the board.
■
PCI-to-DDR Reference Design—This design is a 64-bit, 66-MHz,
hardware verified, open-source PCI-to-DDR SDRAM memory
reference design that uses the pci_mt64 and DDR SDRAM Memory
Controller MegaCore functions. It includes a DMA engine, a FIFO
interface, and a flash memory controller. The design is useful for a
variety of hardware applications and lets you begin prototyping and
verification quickly. For more information on the reference design,
refer to AN 223: PCI-to-DDR SDRAM Reference Design.
■
Stratix PCI Development Kit Application—This open-source Windows
application is an interactive platform you can use to perform PCI
transactions. You can also use the kit application as a starting point
for developing your own custom software.
■
PCI Compiler MegaCore Function—The PCI Compiler provides
solutions for interfacing your system to a 32-bit or 64-bit PCI bus. The
PCI Compiler contains everything you need to use Altera PCI
solutions including MegaCore functions—which can be instantiated
with a wizard-driven interface—behavioral models, a testbench, and
reference designs.
7
About this Kit
General
Description
PCI Development Kit, Stratix Edition Getting Started User Guide
Documentation
■
DDR SDRAM Memory Controller MegaCore Function—This MegaCore
function handles the complex aspects of using DDR SDRAM,
including initializing memory devices, managing SDRAM banks,
and refreshing the devices at appropriate intervals. The DDR
SDRAM Memory Controller translates read and write requests from
the local interface into all of the necessary SDRAM command signals.
■
Quartus® II Development Software—The Quartus II development
software provides a comprehensive environment for designing with
Altera’s programmable devices and interfaces to industry-standard
EDA tools.
■
PLD Applications PCI-X CORE CD-ROM—PLD Applications’ PCI-X
IP core is a versatile integrated solution to interface any user
application or system to 32- and 64-bit PCI-X buses. The core is fully
customizable; most of its features can be enabled or disabled to suit
specific designed requirements. This IP core includes a complete set
of tools, including PCI design examples, test software, and a
VHDL/Verilog HDL testbench.
■
Jungo WinDriver Development Toolkit—Jungo’s WinDriver is a driver
development toolkit that automates and simplifies the development
of user mode Windows device drivers for PCI buses. WinDriver is
designed to enable development of high performance, high quality
user-mode device drivers, and does not require DDK knowledge or
kernel-level development.
The PCI Development Kit, Stratix Edition contains the following
documentation:
■
■
■
■
■
■
8
About this Kit
Readme file—Contains special instructions for the kit and last-minute
additions to the documentation.
PCI Development Kit, Stratix Edition Getting Started User Guide—
Describes how to start using the kit (this document).
Stratix PCI Development Board Data Sheet—Provides technical
specifications and interfacing information for the board.
AN 223: PCI-to-DDR SDRAM Reference Design—Describes the
reference design that is included with the kit. The design is a typical
implementation of the user application that interfaces to the local side
of the Altera pci_mt64 and DDR SDRAM Memory Controller
MegaCore functions.
PCI Compiler Documentation—This documentation set describes the
use and features included in the PCI Compiler package.
DDR SDRAM Memory Controller User Guide—Provides
comprehensive documentation about the DDR SDRAM Memory
Controller MegaCore function used in the PCI-to-DDR reference
design.
Altera Corporation
Getting Started
Introduction
This getting started section will familiarize you with the contents of the
development kit, and walk you through the setup of your PCI
development environment, including:
Installing the kit contents.
2.
Setting up and verifying correct operation of the Stratix PCI
development board.
3.
Performing PCI transactions between the development board and
the host PC.
4.
Prototyping your design using the PCI development board.
2
Getting Started
1.
When you finish this section, you will be ready to design and prototype
custom PCI systems with the kit.
Before You
Begin
Before installing the software or using the kit, check the contents of the kit
and inspect the board to verify that you received all of the items. If any of
the items are missing, contact Altera before you proceed. You should also
verify that your PC meets the kit hardware and software requirements.
Development Kit Contents
The PCI Development Kit, Stratix Edition contains the following items:
■
■
■
■
Altera Corporation
Stratix PCI development board with an EP1S25F1020C5 device
(ordering code PCI-BOARD/S25)
PCI Development Kit, Stratix Edition CD-ROM version 1.0.0, which
includes:
–
PCI-to-DDR reference design
–
Stratix PCI Development Kit Application and device driver
–
PCI Compiler version 2.3.0 containing the pci_mt64, pci_t64,
pci_mt32, and pci_t32 MegaCore functions
–
DDR SDRAM Memory Controller MegaCore function
version 1.2.0
Quartus II Development Software CD-ROM version 2.2 SP 2
Jungo WinDriver Development Toolkit version 6.0
9
PCI Development Kit, Stratix Edition Getting Started User Guide
1
■
■
■
■
The Jungo CD-ROM provides a free 30-day evaluation of
Jungo’s Driver Development Toolkit. For more information
on the driver, refer to the documentation on the CD-ROM.
PLD Applications PCI-X CORE CD-ROM version 1.1
ByteBlaster™ II download cable
External ATX power supply adaptor cable
1
■
Getting Started
Refer to the Stratix PCI Development Board Data Sheet for
instructions on using the board with an external power
supply.
PCI Development Kit, Stratix Edition Getting Started User Guide (this
document)
Quartus II Installation & Licensing Manual for PCs
Inspect the Board
Place the board on an anti-static surface and inspect it to ensure that it has
not been damaged during shipment.
c
The board can be damaged without proper anti-static handling.
Therefore, you should take anti-static precautions before
handling it.
Verify that all components are on the board and appear intact, and the
dipswitches and jumpers are at the factory-default settings.
f
Refer to the Stratix PCI Development Board Data Sheet—available with the
kit—for information on the board components and their locations, and for
the factory-default dipswitch and jumper settings.
Hardware Requirements
The Stratix PCI development board is a universal short-form PCI card that
can be used in 3.3- and 5.0-V PCI systems and will operate in either 32- or
64-bit slots. To use the board, you need a PC with an available PCI or
PCI-X slot.
Software Requirements
To use the Stratix PCI Development Kit Application, you must have the
Windows XP, Windows 2000, or Windows NT version 4.0 Service Pack 6
operating system on your PC. The Windows application provided with
the kit has been tested on these operating systems only.
10
Altera Corporation
Getting Started
PCI Development Kit, Stratix Edition Getting Started User Guide
1
You must have administrative privileges to install the kit
application device driver on Windows XP, Windows 2000, or
Windows NT systems.
To create designs for the board or use the prototype walkthrough
described in this user guide, you must have the following software (which
is included with the kit) installed on your PC:
■
■
■
Software
Installation
The kit includes all of the required software. Additionally, with
your purchase of the PCI Development Kit, Stratix Edition you
are entitled to a 12-month license of the Quartus II development
software and 60-day licenses for each of the MegaCore functions
included in the kit. See “Set Up Licensing” on page 15 for more
details about obtaining the licenses for the software.
The PCI Development Kit, Stratix Edition ships with everything you need
to begin developing and prototyping your design. This section describes
the basic installation steps for the required software components,
including:
■
■
■
1
Installing the Quartus II Software
Installing PCI Development Kit, Stratix Edition CD-ROM Contents
Set Up Licensing
You must install the Stratix PCI Development Kit Application,
driver, and PCI-to-DDR reference design files before you install
the board in your PC.
Installing the Quartus II Software
Insert the Quartus II Development Software CD-ROM into your CD-ROM
drive. Refer to “Installing the Quartus II Software” in the Quartus II
Installation & Licensing Manual for PCs, which is included with the kit, for
the software installation instructions. After the software finishes
installing, you must request and install a license to enable it. See “Set Up
Licensing” on page 15 for more information.
Altera Corporation
11
2
Getting Started
1
Quartus II software version 2.2 SP 2
PCI Compiler version 2.3.0
DDR SDRAM Memory Controller MegaCore function version 1.2.0
PCI Development Kit, Stratix Edition Getting Started User Guide
Getting Started
Installing the PCI Development Kit, Stratix Edition CD-ROM
Contents
The PCI Development Kit, Stratix Edition CD-ROM contains the following
items:
■
■
■
Stratix PCI Development Kit Application, driver and PCI-to-DDR
reference design files
PCI Compiler version 2.3.0, which includes the pci_mt64, pci_t64,
pci_mt32, and pci_t32 MegaCore functions.
DDR SDRAM Memory Controller MegaCore function version 1.2.0
To install the PCI Development Kit, Stratix Edition CD-ROM contents,
perform the following steps.
1.
Insert the PCI Development Kit, Stratix Edition CD-ROM into your
CD-ROM drive. The installation program runs automatically. See
Figure 1.
If the installation program does not run automatically when you
insert the CD-ROM into your CD-ROM drive, perform the following
steps to run it manually.
12
a.
Choose Run (Windows Start menu).
b.
Type <CD-ROM drive>:\SETUP.exe in the Open box.
c.
Click OK. The installation program opens.
Altera Corporation
Getting Started
PCI Development Kit, Stratix Edition Getting Started User Guide
Figure 1. PCI Development Kit Installation Program
2
Getting Started
2.
Click Install PCI Development Kit.
3.
Follow the on-line instructions to install the documentation, device
driver, Windows application, and reference design. The default
installation directory is c:\MegaCore. Additionally, the installation
program creates icons in Programs > Altera > Megacore > PCI
Development Kit, Stratix Edition v1.0.0 (Windows Start menu),
which you can use to launch the Windows application.
4.
Click Install DDR SDRAM Controller.
5.
Follow the on-line instructions to install the DDR SDRAM Controller
MegaCore function version 1.2.0 files and documentation. The
default installation directory is c:\MegaCore.
6.
Click Install PCI Compiler.
7.
Follow the on-line instructions to install the PCI Compiler version
2.3.0 files and documentation. The default installation directory is
c:\MegaCore.
8.
Click the documentation buttons to view the documentation for each
product.
When installation finishes, remove the CD-ROM from your
CD-ROM drive.The PCI Development Kit, Stratix Edition installation
program creates the directory structure shown in Figure 2, where <path>
Altera Corporation
13
PCI Development Kit, Stratix Edition Getting Started User Guide
Getting Started
is the directory in which the PCI Development Kit, Stratix Edition is
installed.
Figure 2. PCI Development Kit, Stratix Edition Directory Structure
<path>/stratix_pci_kit-v<version>
Contains the files for the PCI Development Kit, Stratix Edition.
bin
Contains the Stratix PCI Development Kit Application and device driver.
constraints
Contains Quartus II constraint files for the PCI and DDR SDRAM Memory Controller MegaCore functions.
doc
Contains the kit documentation, including this user guide, the board data sheet, and the reference design application note.
max_config
Contains the MAX configuration controller programming file.
reference design
Contains the files necessary to modify, simulate, and compile the reference design.
sim
Contains the simulation scripts and testbench.
altera_lib
Contains the Altera megafunction library.
ddr_dimm
Contains a placeholder for the DDR SDRAM memory simulation model.
pci_bfm
Contains the PCI bus functional model.
syn_1s25
Contains the Quartus II project, constraint, and programming files for the reference design.
vhdl
Contains the VHDL source code for the reference design.
ddr_cntrl
Contains the DDR SDRAM Memory Controller MegaCore function instantiation wrapper file.
ddr_intf
Contains the interface between the local PCI design and the DDR SDRAM Memory Controller MegaCore function.
flash_cntrl
Contains the flash memory controller design files.
pci_local
Contains the PCI interface, DMA controller, data path FIFO buffers, and local registers.
pci_mt64
Contains the pci_mt64 MegaCore function instantiation wrapper file.
software
Contains the kit application and driver source files.
driver
Contains the device driver library.
gui
Contains the Stratix PCI Development Kit Application source files.
14
Altera Corporation
Getting Started
Set Up
Licensing
PCI Development Kit, Stratix Edition Getting Started User Guide
You must have a valid license to use the Quartus II development software
and to compile and generate programming files for designs that include
Altera PCI and DDR SDRAM MegaCore functions. The kit includes a full,
1-year license for the Quartus II development software and temporary
60-day evaluation licenses for the Altera PCI and DDR SDRAM MegaCore
functions. To purchase full licenses for the MegaCore functions, visit the
the Altera web site at www.altera.com or contact your local Altera sales
representative
To obtain your Quartus II and temporary MegaCore licenses, perform the
following steps:
Point your web browser to the Altera web site at
www.altera.com/licensing.
2.
Scroll to the Development Kit Licenses section of the Altera
Licensing Center page.
3.
Click the PCI Development Kit, Stratix Edition link.
4.
Follow the on-line instructions to request your license. A license file
is e-mailed to you.
5.
To install your license, refer to “Specifying the License File” in the
Quartus II Installation & Licensing Manual for PCs, which is included
with the kit.
1
Install the
Board in Your
PC
Getting Started
1.
The 60-day period for MegaCore evaluation licenses starts from
the request date and cannot be renewed. After this period, you
will still be able to compile and simulate using these MegaCore
functions, but you will not be able to generate programming
files.
You must install the board in your PC after you have installed Stratix PCI
Development Kit Application, driver, and PCI-to-DDR reference design
files. See “Installing the PCI Development Kit, Stratix Edition CD-ROM
Contents” on page 12 for installation instructions.
To install the board in your PC, perform the following steps.
Altera Corporation
1.
Turn off your PC.
2.
Open your PC’s case.
3.
Locate an empty PCI slot.
2
15
PCI Development Kit, Stratix Edition Getting Started User Guide
Getting Started
4.
Insert the Stratix PCI development board into the PCI slot with the
RS-232 connector facing the back of the computer. Make sure that the
board is firmly seated.
5.
Secure the board.
6.
Turn on your PC and observe the board. When the board powers up,
you should observe the illuminated configuration done LED (D4)
and a counting pattern on the user LEDs. Figure 3 shows the location
of these and other board components.
Figure 3. Stratix PCI Development Board Components
System
Reset (PB3)
User
Pushbutton
DDR SDRAM
Configuration
Switches
(J10)
Done LED (D4)
(PB2, PB4)
User LEDs
Expansion Prototype
(D3, D5, D6,
User
Card (PROTO1)
User
D8, D10, D12,
Reset
(J2, J3, J4)
Dipswitch (S2)
D14, D15)
(PB1)
Test Points
(TP2, TP4,
TP5, TP7)
Power
Connector
(J18)
Ground Test
Point (TP6)
Board Settings
Dipswitch (S1)
Power LEDs
(D11, D13, D9)
ByteBlaster II
Connector (J1)
10/100 Ethernet
MAC/PHY (U11)
Optrex LCD
Interface (J5)
RJ-45 Connector
(RJ1)
Optrex LCD
Power (J19)
High-Speed Clock
Oscillator (J15)
Ground Test
Point (TP1)
Stratix Device
VCCIO Jumper (J20)
Mictor Probe
Connector (J6)
Stratix EP1S25
Device (U2)
RS-232 Activity
LEDs (D1, D2)
System Clock
Oscillator (J14)
RS-232
Connector (J7)
Flash
Memory
(U3)
SMA
(On Back)
Clock
Input (J16)
MAX
Configuration
Controller (U1)
Universal PCI &
PCI-X Interface (J11)
PCI Level Converters
(U13 through U22)
(Also on Back)
JTAG Chain
Jumper (J17)
7.
16
Ground Test
Point (TP18)
Close your PC’s case.
Altera Corporation
Getting Started
PCI Development Kit, Stratix Edition Getting Started User Guide
8.
If your PC has the Windows 2000 operating system, the operating
system detects the Stratix PCI development board as new hardware
and prompts you to install a driver.
Perform the following steps in the Found New Hardware Wizard:
Click Next to go to the Install Hardware Device Drivers page.
b.
Turn on the Search for a suitable driver for my device
(recommended) option.
c.
Click Next to go to the Locate Driver Files page.
d.
Turn off all of the options under Optional Search Locations.
e.
Click Next to go to the Driver Files Search Results page.
f.
Click Next to go to the Completing the Found New Hardware
Wizard page.
g.
Click Finish to complete the driver installation.
2
If your PC has the Windows XP operating system, the operating
system detects the Stratix PCI development board as new hardware
and prompts you to install a driver.
Perform the following steps in the Found New Hardware Wizard:
Stratix PCI
Development
Kit Application
Walkthrough
Turn on the Install the software automatically (Recommended)
option.
b.
Click Next to go to the Completing the Found New Hardware
Wizard window.
c.
Click Finish to complete the driver installation.
This section explains how to use the kit application to perform PCI
transactions, including:
■
■
■
■
■
Altera Corporation
a.
Example 1. PCI Target Write (Demo Tab)
Example 2. PCI Master Write (Demo Tab)
Example 3. PCI Master Loop (Debug Tab)
Example 4. Latency Timer Configuration Register & PCI Master Loop
(Debug Tab)
Example 5. Address Offset & Target Loop (Debug Tab)
17
Getting Started
9.
a.
PCI Development Kit, Stratix Edition Getting Started User Guide
f
Getting Started
Refer to the on-line help in the Stratix PCI Development Kit Application
for more information on kit application options and menus.
Figure 4 describes the flow when executing PCI transactions.
Figure 4. Example PCI Transaction Flow Using the PCI Development Kit
Application
Select Command
Enter Desired Address/Size
Update Configuration/DMA Registers
(Debug Mode Only)
Execute Operation
Review Results in Display Window
Example 1. PCI Target Write (Demo Tab)
In this example, the data source is the system and the destination is the
PCI development board. You can verify this setup in the Command
Information section of the Stratix PCI Development Kit Application.
1.
Run the kit application by choosing Programs > Altera > Megacore
> PCI Development Kit, Stratix Edition v1.0.0 > Stratix PCI Kit
(Windows Start menu). The kit application opens to the Demo tab
with a PCI target write transaction selected for one iteration of 2,048
bytes of random data. Leave the kit application running for the
remaining examples.
2.
Choose the Target Write command.
3.
Keep the default Address/Size values, i.e.,
–
–
4.
18
Transfer Length: 2048
Iterations: 1
Click Execute to begin operation.
Altera Corporation
Getting Started
PCI Development Kit, Stratix Edition Getting Started User Guide
5.
Review the results in the Display Window.
6.
Choose Inc Packet from the Data Type drop-down list box.
7.
Click Execute.
8.
Review the speed of transaction in the performance meter.
9.
Review the results in the Display Window. Figure 5 shows the
results.
2
Getting Started
Figure 5. PCI Target Write (Demo Tab)
Example 2. PCI Master Write (Demo Tab)
In this example, the data source is the PCI development board and the
destination is the system memory. You can verify this setup in the
Command Information section of the kit application.
1.
Select Master Write under Commands.
2.
Make the following Address/Size settings:
–
–
Altera Corporation
Transfer Length: 4096
Iterations: 2
19
PCI Development Kit, Stratix Edition Getting Started User Guide
Getting Started
3.
Click Execute.
4.
Review the speed of transaction in the performance meter.
5.
Review the results in the Display Window. Figure 6 shows the
results.
Figure 6. PCI Master Write (Demo Tab)
Example 3. PCI Master Loop (Debug Tab)
In this example, a PCI master read transaction is performed followed by a
PCI master write. The kit application verifies that the data written and
read by the master is the same.
1.
Click the Debug tab.
2.
Select Master Loop under Commands.
3.
Keep the Address Offset setting of 0x00000000.
4.
Make the following Address/Size settings:
–
–
20
Transfer Length: 4096
Iterations: 2
Altera Corporation
Getting Started
PCI Development Kit, Stratix Edition Getting Started User Guide
5.
Select AA55 Packet from the Data Type drop-down list box.
6.
Click Execute.
7.
Review the speed of transaction and the results in the Display
Window. Figure 7 shows the results
Figure 7. PCI Master Loop (Debug Tab)
2
Getting Started
Example 4. Latency Timer Configuration Register & PCI Master
Loop (Debug Tab)
The operation in example 4 is the same as in example 3. By changing the
Latency Timer setting, the PCI master device remains a master of the bus
for more clock cycles, improving the throughput as the master device
bursts more data.
1.
Keep the Commands setting as Master Loop.
2.
Keep the Address Offset setting of 0x00000000.
3.
Keep the Address/Size settings:
–
–
Altera Corporation
Transfer Length: 4096
Iterations: 2
21
PCI Development Kit, Stratix Edition Getting Started User Guide
4.
Getting Started
Select Lat Timer in the Configuration Registers box.
1
Note the default value with which the system programmed
the latency timer so that you can return the setting to its
default value after running this example.
5.
Enter 0xf8 in the Value box under Register Update.
6.
Click Write under Register Update.
7.
Click Execute.
8.
Review the results in the Display Window.
9.
Compare the results to those of example 3, which used the default
Lat Timer setting 0x40. See Figure 8.
10. Change the latency timer register back to the default value.
Figure 8. Latency Timer & PCI Master Loop (Debug Tab)
22
Altera Corporation
Getting Started
PCI Development Kit, Stratix Edition Getting Started User Guide
Example 5. Address Offset & Target Loop (Debug Tab)
In this example, a target loop transaction target write is performed,
followed by a target read. The address offset changes the starting address
of the transaction.
1.
Select Target Loop under Commands.
2.
Enter 0x28 in the Address Offset box.
3.
Keep the Address/Size settings:
Transfer Length: 4096
Iterations: 2
4.
Select Inc Packet from the Data Type drop-down list box.
5.
Click Execute.
6.
Review the starting address of the data transaction in the Display
Window. Figure 9 shows the results.
Getting Started
–
–
2
Figure 9. Address Offset & Target Loop (Debug Tab)
Altera Corporation
23
PCI Development Kit, Stratix Edition Getting Started User Guide
Configuring the
Stratix Device
Getting Started
The Stratix PCI development board supports two configuation methods.
■
■
Fast passive parallel configuration from an on-board flash memory
device
JTAG configuration through a ByteBlaster II download cable
Configuration Using Flash Memory
The Stratix PCI development board contains an Altera MAX® EPM3256A
device and an on-board flash memory device. These devices implement a
configuration control circuit that configures the Stratix device from flash
memory after one of the following events occurs:
■
■
■
Power is applied to the board
The SYS RESET pushbutton (PB3) is pressed
The Stratix PCI Development Kit Application performs a
configuration
The flash memory device includes four sections in which you can store
configuration files. The kit application allows you to write to and
configure from user configuration files in flash memory sections 1, 2, and
3. The factory-default configuration file is stored in flash memory section
0 and you cannot write to it or configure it from the kit application.
You use the Stratix PCI Development Kit Application’s Flash tab to write
configuration files in the sections of flash memory. After the flash memory
sections have been written, you can use the following methods to
configure the Stratix device:
■
■
1
Use the kit application’s Flash tab to select a flash memory section
and configure the Stratix device from that section.
Use the board settings dipswitch (S1) to select a flash memory section
and press the SYS RESET pushbutton (PB3) to configure the Stratix
device from that section.
The board settings dipswitch (S1) selects the flash section that is
used to configure the device when power is applied to the board.
Configuration Using the Stratix PCI Development Kit Application
You use the Flash tab in the Stratix PCI Development Kit Application to
write a Raw Binary File (.rbf) to a user section of the on-board flash
memory device and configure the Stratix device. See Figure 10 for the
Flash tab.
24
Altera Corporation
Getting Started
PCI Development Kit, Stratix Edition Getting Started User Guide
Figure 10. Flash Programming Tab
2
Getting Started
Figure 11 shows the steps you follow to write an .rbf into flash memory
and configure the Stratix device.
Figure 11. Example Flash Programming Example
Generate Stratix .rbf
(Stratix configuration only)
Select .rbf
(Write transactions only)
Select Flash Section
Write to Flash Memory
Configure Stratix Device
(Optional)
Altera Corporation
25
PCI Development Kit, Stratix Edition Getting Started User Guide
Getting Started
To write a configuration file into flash memory, you must use an .rbf. The
following example steps show you how to write an .rbf to section 1 of the
flash memory and configure the Stratix device from this section using the
kit application.
f
Refer to Quartus II On-line Help for instructions on generating an .rbf of
your project.
1.
Run the Stratix PCI Development Kit Application.
2.
Click the Flash tab.
3.
Click Select File to select the .rbf to program into the flash memory.
This walkthrough uses the .rbf for the Stratix PCI reference design as
an example. This .rbf has exactly the same behavior as the factory
default configuration, except that the value stored in the subsystem
ID register is 0xB002 instead of 0xB001.
4.
Browse to the c:\MegaCore\stratix_pci_kit-v1.0.0\
reference_design\syn_1s25 directory.
5.
Select the file stratix_top.rbf.
6.
Click Open.
7.
Choose 1 from the Section drop-down list box. The .rbf will be
written into flash memory section 1.
8.
Click Write. The write progress is displayed next to Status. The
Display Window shows the data written into the flash memory.
9.
Click Configure. This action resets the MAX device and configures
the Stratix device from section 1.
10. Click Exit in the Board Reconfigured dialog box to close the kit
application.
11. Perform a soft reboot of your PC. When you configured the Stratix
device in step 9, it lost all PCI configuration information. You must
perform this soft reboot immediately (before executing any other
operations) for the configuration to take effect and to observe the
new configuration functionality
26
Altera Corporation
Getting Started
PCI Development Kit, Stratix Edition Getting Started User Guide
1
You must ensure that the PC system has re-enumerated the
PCI bus before you can use it. Most PC systems enumerate
the PCI bus upon a soft reboot; however, some rare systems
require a hard reset and cannot be used with this
configuration method.
12. If your PC has the Windows 2000 operating system, the operating
system might detect the new configuration of the Stratix PCI
development board as new hardware and prompt you to install a
driver. Refer to step 8 on page 17 for instructions on installing the
driver using the Found New Hardware Wizard.
2
Getting Started
13. If your PC has the Windows XP operating system, the operating
system might detect the new configuration of the Stratix PCI
development board as new hardware and prompt you to install a
driver. Refer to step 9 on page 17 for instructions on installing the
driver using the Found New Hardware Wizard.
Configuration upon Board Power Up or with the SYS RESET Pushbutton
You use the board settings dipswitch (S1) to select which flash memory
section is used to configure the Stratix device when you power up the
board or when you press the SYS RESET pushbutton (PB3). Table 1 shows
how to select the configuration image.
Table 1. Configuration Image Selection
Board Settings Dipswitch
Flash Memory
Section
Configuration Image
Switch S1 Position 9
(MPGM1)
Switch S1 Position 10
(MPGM0)
Off
Off
0
Factory-default image
Off
On
1
User image 1
On
Off
2
User image 2
On
On
3
User image 3
1
f
Altera Corporation
You must have an appropriate .rbf stored in the flash memory
section before you reconfigure the Stratix device. If you do not
have an appropriate .rbf, Stratix device configuration will fail.
Refer to the Stratix PCI Development Board Data Sheet for more information.
27
PCI Development Kit, Stratix Edition Getting Started User Guide
Getting Started
Configuration via the JTAG Interface
After power is applied to the Stratix PCI development board, the Stratix
device can be configured. The JTAG interface permits the Quartus II
software to load the Stratix device with a user design through the
supplied ByteBlaster II cable. The user design remains in the Stratix device
until power is removed from the board.
The following procedure describes the steps necessary to configure the
Stratix device using the Quartus II software and the ByteBlaster II cable:
1.
Attach the ByteBlaster II cable to J1. See Figure 3 on page 16 for the
location of J1.
2.
Run the Quartus II software.
3.
Choose Programmer (Tools menu).
4.
Click Setup under Programming Hardware.
5.
Click Add Hardware under Hardware Settings.
6.
Select ByteBlasterMV or ByteBlaster II from the Hardware type
drop-down list box.
7.
Click OK.
8.
Click ByteBlasterMV under Available hardware items.
9.
Click Select Hardware.
10. Click Close.
1
Refer to Quartus II Help for instructions on changing the
hardware setup.
11. Click Auto Detect. EPM3256A/7256AE and EP1S25 display in the
Device column.
12. Double-click <none> in the File column adjacent to the EP1S25
device to select the .sof for configuration. This walkthrough uses the
.sof for the Stratix PCI reference design as an example. This .sof has
exactly the same behavior as the factory default configuration,
except the value stored in the subsystem ID register is 0xB002
instead of the factory-default 0xB001.
28
Altera Corporation
Getting Started
PCI Development Kit, Stratix Edition Getting Started User Guide
13. Browse to the c:\MegaCore\stratix_pci_kit-v1.0.0\
reference_design\syn_1s25 directory.
14. Select the file stratix_top.sof.
15. Click Open.
16. Turn on the the Program/Configure option in the column adjacent to
the EP1S25 device.
2
17. Click Start.
19. Perform a soft reboot of your PC. When you configured the Stratix
device in step 17, the device lost all PCI configuration information.
You must perform this soft reboot immediately (before executing
any other operations) for the configuration to take effect and to
observe the new configuration functionality.
20. If your PC has the Windows 2000 operating system, the operating
system might detect the new configuration of the Stratix PCI
development board as new hardware and prompt you to install a
driver. Refer to step 8 on page 17 for instructions on installing the
driver using the Found New Hardware Wizard.
21. If your PC has the Windows XP operating system, the operating
system might detect the new configuration of the Stratix PCI
development board as new hardware and prompt you to install a
driver. Refer to step 9 on page 17 for instructions on installing the
driver using the Found New Hardware Wizard.
f
Prototyping
Overview
Altera Corporation
Refer to Quartus II Help for instructions on how to use the ByteBlaster II
cable.
You can use the Stratix PCI development board as a prototyping platform.
Prototyping your design with the board involves the following steps:
1.
Create your design—You can use the supplied reference design as a
basis for your design, or create a new design according to your
requirements.
2.
Simulate your design—Extensive simulation of your design minimizes
the hardware debugging effort.
29
Getting Started
18. Close the Quartus II software.
PCI Development Kit, Stratix Edition Getting Started User Guide
Prototyping
Walkthrough
Getting Started
3.
Compile your design in the Quartus II software—You can use the
Quartus II software to compile your design, verify timing, and
generate programming files.
4.
Configure your Stratix device—Configure the Stratix device with your
programming file using the configuration method of your choice.
5.
Test your design in hardware—This testing typically requires software
and a driver that are built specifically for your application. You can
use the open-source kit application as a starting point to develop
your own hardware test program.
This section uses the reference design included with the PCI Development
Kit, Stratix Edition to illustrate the steps needed to prototype your own
design. This walkthrough requires the following software to be installed:
■
■
■
Quartus II software
PCI Compiler version 2.3.0
DDR SDRAM Memory Controller version 1.2.0
Altera recommends that you license the pci_mt64 and DDR SDRAM
Memory Controller MegaCore functions. If you do not have these
licenses, you can follow the walkthrough to compile the project in the
Quartus II software and perform timing analysis but you will not be able
to generate programming files.
Refer to “Software Installation” on page 11 and “Set Up Licensing” on
page 15 for more information.
To simulate your design using this walkthrough, you need the Model
Technology ModelSim PE or SE simulator version 5.7a, which is not
included with the kit.
f
For information on simulating in other third-party tools, refer to:
■
■
■
AN 169: Simulating the PCI Behavioral Models
DDR SDRAM Controller MegaCore Function User Guide
Simulating Visual IP Models with the NC-Verilog, Verilog-XL, VCS, or
ModelSim (UNIX) Simulators White Paper
The walkthrough involves the following steps:
■
■
■
■
■
30
Create your design
Simulate your design
Compile your design in the Quartus II software
Configure your Stratix device
Test your design in hardware
Altera Corporation
Getting Started
PCI Development Kit, Stratix Edition Getting Started User Guide
Create Your Design
The walkthrough uses a copy of the reference design supplied with the kit.
Perform the following steps to create your copy of the reference design:
1.
Create a working directory for your design. You use the working
directory to simulate your design with the ModelSim simulator and
compile your design with the Quartus II software. These instructions
assume your working directory is c:\pci_prototype_example.
2.
Copy all of the files in the c:\MegaCore\stratix_pci_kitv1.0.0\reference_design directory and its subdirectories to your
working directory, maintaining the directory structure of the kit
installation. These instructions assume you installed the PCI
Development Kit, Stratix Edition into the
c:\MegaCore\stratix_pci_kit-v1.0.0 directory.
2
Table 2. Prototyping Walkthrough Source Files (Part 1 of 2)
File
stratix_top.vhd
Subdirectory (1)
-
Description
The top-level file that instantiates the PCI and DDR SDRAM cores
and the local design. Refer to AN 223: PCI-to-DDR SDRAM
Reference Design for a description of the local design.
vhdl_components.vhd -
The VHDL component instantiation templates.
stratix_enh_pll.vhd
-
This file is used to source the clock to the DDR SDRAM modules.
pci_top.vhd
pci_mt64
This wrapper file implements the pci_mt64 core. The file was
generated with the PCI Compiler wizard and the following settings:
■
■
■
■
■
■
■
■
■
VHDL output file
64-bit master/target MegaCore function (pci_mt64)
Device ID is set to 0x0005
Revision ID is set to 0x21
Subsystem ID is set to 0xB002
Subsys Vendor ID is set to 0x1172
BAR0 is a 1-MByte memory
BAR1 is a 128-MByte prefetchable memory
All other parameters are at the default values
Refer to the PCI MegaCore Function User Guide for instructions on
how to use the wizard.
backend.vhd
Altera Corporation
pci_local
The top level of the local PCI interface.
31
Getting Started
Table 2 describes the reference design source files used in the
walkthrough. These files are located in the c:\pci_prototype_example\
vhdl directory.
PCI Development Kit, Stratix Edition Getting Started User Guide
Getting Started
Table 2. Prototyping Walkthrough Source Files (Part 2 of 2)
File
Subdirectory (1)
Description
cnten.vhd
datapath_fifo.vhd
dma.vhd
dma_reg.vhd
dma_sm.vhd
last_gen.vhd
mstr_cntrl.vhd
mstr_fifo_cntrl.vhd
mstr_perf.vhd
targ_cntrl.vhd
targ_fifo_cntrl.vhd
targ_perf.vhd
pci_local
These files are the local PCI interface. They implement target and
master state machinesdata path controllers, and FIFO buffers.
fifo_128x32.vhd
fifo_128x4.vd
fifo_128x64.vhd
pci_local
These LPM functions used in the reference design were generated
using the Quartus II software. Refer to Quartus II Help for more
information on generating LPM functions.
ddr_top.vhd
ddr_cntrl
This wrapper file implements the DDR SDRAM Controller core. The
file was generated with the DDR SDRAM Controller wizard and the
following settings:
■
■
■
■
■
VHDL output file
Data width bits is set to 64
Row address bits is set to 13
Number of chip selects is set to 1
All other parameters are at the default values
Refer to the DDR SDRAM Controller MegaCore Function User
Guide for instructions on how to use the wizard.
ddr_intf.vhd
ddr_intf
The top level of the PCI-DDR SDRAM interface.
adr_gen.vhd
clk_sync.vhd
cntrl_intf.vhd
mr_sm.vhd
mw_sm.vhd
tr_sm.vhd
tw_sm.vhd
ddr_intf
These files are the PCI-DDR SDRAM interface. They implement
target and master state machines, address logic, and clock
synchronizers.
flash_mem_cntrl.vhd
flash_cntrl
The top level of the flash memory controller.
erase_sm.vhd
read_sm.vhd
write_sm.vhd
flash_cntrl
These files are the flash memory controller. They implement flash
memory erase, write, and read state machines.
Note to Table 2:
(1)
32
Indicates the subdirectory of the c:\pci_prototype_example\vhdl directory.
Altera Corporation
Getting Started
PCI Development Kit, Stratix Edition Getting Started User Guide
Table 3 describes the simulation files used in the walkthrough. The files
are located in the c:\pci_prototype_example\sim directory.
Table 3. Prototyping Walkthrough Simulation Files
File
Subdirectory (1)
Description
stratix_pci2ddr.mpf
modelsim.ini
-
The ModelSim project file and initialization settings.
sim.do
-
The ModelSim simulation script.
wave_stratix_pci2ddr.do
-
The ModelSim waveform display script.
stratix_pci2ddr_tb.vhd
-
The test bench wrapper file. This file instantiates the reference
design, PCI bus functional model, and DDR SDRAM model.
trgt_tranx_mem_init.dat
-
The PCI target transactor memory initialization data file. This file
provides initialization data for the PCI target transactor.
trgt_tranx.vhd
pci_bfm
The PCI target transactor. This file uses sequences of PCI host
transfers to write and read the DDR SDRAM and flash memory
controllers.
mstr_tranx.vhd
pci_bfm
The PCI master transactor. This file uses sequences of PCI host
transfers to program the local DMA controller to issue PCI
master reads and writes from the DDR SDRAM memory.
arbiter.vhd
clk_gen.vhd
log.vhd
monitor.vhd
mstr_pkg.vhd
pull_up.vhd
pci_bfm
The PCI bus functional models used for simulation. These files
support monitoring, and logging for the PCI bus functional
model.
ddr_dimm_model.vhd
ddr_dimm
The DDR SDRAM DIMM module model used for simulation.
mt46v32m8.vhd
ddr_dimm
The DDR SDRAM memory simulation model placeholder. You
must replace this file with the correct simulation model before
you can simulate. Refer to the kit readme file for instructions on
how to obtain the appropriate DDR SDRAM memory model.
altera_mf.vhd
altera_lib
The Altera Megafunction models needed for simulation.
2
(1)
Indicates the subdirectory of the c:\pci_prototype_example\sim directory.
Table 4 describes the compilation files used in the walkthrough. The files
are located in the c:\pci_prototype_example\syn_1s25 directory.
Altera Corporation
33
Getting Started
Note to Table 3:
PCI Development Kit, Stratix Edition Getting Started User Guide
Getting Started
Table 4. Walkthrough Compilation Files
File
Description
stratix_top.quartus The Quartus II project file.
stratix_top.csf
stratix_top.esf
stratix_top.psf
The constraint files for the board. These files are created by combining the PCI and DDR
SDRAM constraint files located in the <path>\stratix_pci_kit-v1.0.0\constraints
directory with constraints for the local design.
stratix_top.sof
stratix_top.rbf
The programming files for the board. The stratix_top.sof file can be loaded into the Stratix
device with the ByteBlaster II cable. The stratix_top.rbf file can be written into the flash
memory and used for configuration from the MAX EPM3256A device. These files were
generated from the reference design and have exactly the same behavior as the factorydefault configuration, except that the value stored in the subsystem ID register is 0xB002
instead of 0xB001.
Once you are comfortable with the walkthrough you can modify your
copy of the reference design in the c:\pci_prototype_example directory to
create a new design according to your requirements.
1
When you create your design, consider using the Stratix PCI
development board’s LEDs to indicate the health of the
design.
Simulate Your Design
The kit includes a test bench and PCI behavioral models that you use to
simulate your design’s PCI transactions in a third-party simulation tool.
This walkthrough uses the Model Technology ModelSim PE or SE 5.7a
simulator, which is not included with the kit.
For information on simulating in other third-party tools, refer to:
■
■
■
34
AN 169: Simulating the PCI Behavioral Models
DDR SDRAM Controller MegaCore Function User Guide
Simulating Visual IP Models with the NC-Verilog, Verilog-XL, VCS, or
ModelSim (UNIX) Simulators White Paper
Altera Corporation
Getting Started
PCI Development Kit, Stratix Edition Getting Started User Guide
To simulate the reference design, perform the following steps.
1.
a.
Download the DDR SDRAM simulation model mt46v32m8.vhd
from the Micron Technology, Inc. web site, www.micron.com.
b.
Save the downloaded file as c:\pci_prototype_example\sim\
ddr_dimm\mt46v32m8.vhd.
If you did not install the DDR SDRAM Memory Controller
MegaCore function in the default directory c:\MegaCore\
ddr_sdram-v1.2.0, you must modify the sim.do simulation script to
point to the proper library location. To do so, perform the following
steps.
a.
Open the file c:\pci_prototype_example\sim\sim.do in a text
editor.
b.
Edit the following line to use your installation of the DDR
SDRAM Memory Controller MegaCore function:
vmap auk_ddr_lib <DDR SDRAM path>/sim_lib/
modelsim/vhdl/auk_ddr_lib_pci
c.
3.
Save sim.do.
If you did not install PCI Compiler version 2.3.0 in the default
directory c:\MegaCore\pci_compiler-v2.3.0, you must modify the
sim.do simulation script to point to the proper library location. To do
so, perform the following steps.
a.
Open the file c:\pci_prototype_example\sim\sim.do in a text
editor.
b.
Edit the following line to use your installation of PCI Compiler:
vmap altera_pci <PCI Compiler path>/sim_lib/
modelsim_vhdl/altera_pci
c.
4.
Altera Corporation
Save sim.do.
Run the ModelSim software.
35
2
Getting Started
2.
Replace the mt46v32m8.vhd file in the c:\pci_prototype_example\
sim\ddr_dimm directory with the correct simulation model before
you simulate. Refer to the kit readme file for detailed instructions on
how to obtain the correct model.
PCI Development Kit, Stratix Edition Getting Started User Guide
Getting Started
5.
Select Open > Project (File menu)
6.
Browse to the c:\pci_prototype_example\sim directory.
7.
Choose stratix_pci2ddr.mpf and click Open to select the project file.
8.
Click OK to accept the project file.
9.
Select Execute Macro (Tools menu)
10. Choose sim.do.
11. Click Open to select the simulation command file.
ModelSim compiles and simulates the design, and opens a waveform
window. The waveform groups allow you to check these sections of the
design for operation:
■
■
■
f
PCI Bus Signals—Examine these waveforms to confirm that the PCI
bus functional model is generating PCI host transactions from the
mstr_tranx.vhd file.
PCI MT64 User Interface Signals—Examine these waveforms to
confirm that the PCI-to-DDR reference design is responding to the
PCI bus transactions.
DDR Memory Signals—Examine these waveforms to confirm that the
DDR SDRAM memory is operating properly.
For more information on the reference design, refer to AN 223: PCI-toDDR Reference Design.
Compile Your Design in the Quartus II Software
Use the following procedure to generate programming files by
synthesizing and compiling the design in the Quartus II software.
36
1.
Run the Quartus II software.
2.
Select Open Project (File menu).
3.
Browse to the c:\pci_prototype_example\syn_1s25 directory.
4.
Choose stratix_top.quartus.
5.
Click Open to select the project file.
Altera Corporation
Getting Started
PCI Development Kit, Stratix Edition Getting Started User Guide
6.
8.
a.
Choose Add/Remove Files in Project (Project menu)
b.
Click User Libraries under Files & Directories.
c.
Enter <DDR SDRAM Controller MegaCore function path>\lib in
the Library name box.
d.
Click Add to add the DDR SDRAM library.
e.
Click OK.
If you did not install PCI Compiler version 2.3.0 in the default
directory c:\MegaCore\pci_compiler-v2.3.0, you must modify the
library directory in the Quartus II project.
a.
Choose Add/Remove Files in Project (Project menu)
b.
Click User Libraries under Files & Directories.
c.
Enter <PCI Compiler path>\lib in the Library name box.
d.
Click Add to add the PCI Compiler library.
e.
Click OK.
To prototype a design on the board, you must set the proper
constraints in the Quartus II project to meet all timing and I/O
standard requirements. The reference design provides ready-to-use
constraint files stratix_top.csf, stratix_top.esf, and stratix_top.psf in
the c:\ pci_prototype_example\syn_1s25 directory. When you
prototype your own design, you must set the following constraints:
a.
1
Altera Corporation
Locations, I/O standards, and timing for the PCI MegaCore
functions. Constraint files to make these settings are in the
c:\megacore\stratix_pci_kit-v1.0.0\constraints directory. Refer
to the PCI MegaCore Function User Guide for instructions on how
to annotate the PCI constraint file into your project.
The PCI constraint files provided with the kit are made for
the PCI Compiler version 2.3.0 using the Quartus II
software version 2.2 SP 2 and should be used with these
versions of software. If you use a different software version,
you may have timing violations on the PCI signals.
37
2
Getting Started
7.
If you did not install the DDR SDRAM Controller MegaCore
function in the default directory c:\MegaCore\ddr_sdram-v1.2.0,
you must modify the library directory in the Quartus II project.
PCI Development Kit, Stratix Edition Getting Started User Guide
b.
1
c.
9.
Getting Started
Locations, I/O standards, and timing for the DDR SDRAM
Controller MegaCore function. Constraint files to make these
settings are in the c:\megacore\stratix_pci_kitv1.0.0\constraints directory. Refer to the DDR SDRAM
Controller MegaCore Function User Guide for instructions on how
to annotate the DDR SDRAM constraint file into your project.
The DDR SDRAM constraint file provided with the kit is
made for the DDR SDRAM Controller MegaCore function
version 1.2.0 using the Quartus II software version 2.2 SP 2
and should be used with these versions of software. If you
use a different software version, you may have timing
violations on the DDR SDRAM signals.
Locations, I/O standards, timing, and general constraints for
the remainder of your design, including, but not limited to, flash
memory, dipswitches, pushbuttons, and clock oscillators.
Choose Start Compilation (Processing menu) to synthesize and
compile the project and generate the stratix_top.sof and
stratix_top.rbf files.
If you do not have licenses for the pci_mt64 or DDR SDRAM
Controller MegaCore functions, you will not be able to generate
programming files. In this case, use the file stratix_top.rbf from your
working directory to complete the steps in this walkthrough.
10. Choose Compilation Report (Processing menu) and expand the
Timing Analyses section to check the timing of your compiled
design.
11. Choose Compilation Report (Processing menu) and select Pin-Out
File to make sure all of your pins are assigned properly.
Configure Your Stratix Device
You can configure the Stratix device using either the .sof or .rbf created in
the previous section via JTAG or by programming the flash memory.
Follow the steps outlined in “Configuring the Stratix Device” on page 24,
depending on your preferred configuration method. The next step in this
walkthrough assumes that you have programmed your .rbf into the flash
memory and you are ready to test your new configuration in hardware.
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Altera Corporation
Getting Started
PCI Development Kit, Stratix Edition Getting Started User Guide
Test Your Design in Hardware
This step is normally specific to your application. You would run any tests
you have required for your application to ensure that you meet your
design requirements. In this walkthrough, you will use the Stratix PCI
Development kit Application to verify that the steps you have performed
previously were successful.
Complete the following steps to modify the board so that the
configuration data is read from a section other than the default factory
setting. You must use the same section you programmed the .rbf into in
the previous section.
Shut down your PC.
2.
Remove the Stratix PCI development board from your PC.
3.
Change the board’s dipswitch settings to configure from the flash
memory section you used in the previous section.
4.
Reinstall the board in your PC.
5.
Turn on your PC.
6.
If your PC has the Windows 2000 operating system, the operating
system might detect the new configuration of the Stratix PCI
development board as new hardware and prompt you to install a
driver. Refer to step 8 on page 17 for instructions on installing the
driver using the Found New Hardware Wizard.
7.
If your PC has the Windows XP operating system, the operating
system might detect the new configuration of the Stratix PCI
development board as new hardware and prompt you to install a
driver. Refer to step 9 on page 17 for instructions on installing the
driver using the Found New Hardware Wizard.
8.
Run the Stratix PCI Development Kit Application.
9.
Confirm that the copy of the reference design you compiled is
unique. Click the Debug tab and verify that the subsystem ID has
the same value as that specified in the pci_top.vhd wrapper file.
Getting Started
1.
You have completed all of the steps necessary to prototype your design
with the Stratix PCI development board. Perform additional testing and
verification as needed for your design.
Altera Corporation
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