4 3 GTPs 2 64 Bit DDR2 SODIMM Expansion Header Page 13 Page 11 1 SATA, SFP and SGMII Page 22-24 D Debug Mictor, Trace SofTouch Diff SMA Clocks Page 9 5V PWR Jack Page 11 Optional USER Clock Power Supply D Page 25-26 Switcher 5.0V@10A max GPIO Linear [email protected] max Page 10 Page 9 Switcher 3.3V@10A max Glock Generator DVI Linear 2.5V@3A max Codec Page 15 Conn Page 16 Page 9 Linear - VCCAUX 2.5V@3A max Linear Flash Video In Page 20 Codec Page 17 Linear MGT PLL 1.2V@3A max Virtex 5 C LXT / SXT / FXT C ZBT SRAM Linear - MGT AVTT RX 1.2V@3A max AC97 Audio Page 2-6 Page 20 Page 18 Platform FLASH Switcher 1.8V@10A max IIC EEPROM Linear - MGT AVCC [email protected] max Page 8 Page 12 Linear - MGT AVTT TX [email protected] max UART SPI FLASH Page 8 Switcher 1.0V@16A max Page 12 CPLD - XC95144XL 10/100/1000 PHY RJ45 Magnetics Page 21 Page 15 B B IIC USB Host & Peripheral SystemACE Headers for System Mon 2 line Character LCD PS2 Keybaord & Mouse Page 6 Page 12 Page 12 Page 7 Page 12 Page 19 PC4 JTAG Chain Platform Flash Platform Flash CPLD System ACE CF FPGA U4 U5 U3 U2 U1 Expansion Title: A PC4 TDI TDO TDI TDO TDI TDO TSTTDI CFGTDO TDI TDO TDI J5 R63 DNP TSTTDO Sheet Size: B TDO Sheet J21 3 A 1-22-2008_14:51 Date: CFGTDI J1 4 ML505/6/7 Block Diagram SCHEM, ROHS COMPLIANT ML505/6/7 VIRTEX-5 EVALUATION PLATFORM, 1280415 0381241 2 1 of Ver: A Rev: 02 Drawn By 27 BP 1 4 3 2 1 VCC3V3 1 J80 DNP 2 1% 4.75K R10 1 R16 0 5% 1/16W 2 1% 1% 332 R1 1 2 1% 2 1 6 5% 4.7K 8 5% 4.7K RP1 6 7 5% 5 1.21K RP1 1 1 2 4.7K RP1 1% 5% 1 4.7K R3 5% 4.7K RP1 RP1 1 4 2 5% 4.7K 10 NC C IO_L0P_GC_D15_4AG22 AH22 FF1136IO_L0N_GC_D14_4 IO_L1P_GC_D13_4AH12 AG13 BANK 4IO_L1N_GC_D12_4 IO_L2P_GC_D11_4AH20 IO_L2N_GC_D10_4AH19 IO_L3P_GC_D9_4AH14 IO_L3N_GC_D8_4AH13 IO_L4P_GC_4AG21 IO_L4N_GC_VREF_4AG20 IO_L5P_GC_4AH15 IO_L5N_GC_4AG15 IO_L6P_GC_4AG18 IO_L6N_GC_4AF19 IO_L7P_GC_VRN_4AH17 IO_L7N_GC_VRP_4AG16 IO_L8P_CC_GC_4AF18 IO_L8N_CC_GC_4AE18 IO_L9P_CC_GC_4AH18 IO_L9N_CC_GC_4AG17 6 4.7K RP1 5% NC 9 RP1 FF1136 BANK 1 U1 AL12VCCO1_4 AG14VCCO2_4 SRAM_FLASH_A19 SRAM_FLASH_A18 SRAM_FLASH_A17 SRAM_FLASH_A16 SRAM_FLASH_A15 SRAM_FLASH_A14 SRAM_FLASH_A13 SRAM_FLASH_A12 SRAM_FLASH_A11 SRAM_FLASH_A10 SRAM_FLASH_A9 SRAM_FLASH_A8 SRAM_FLASH_A7 SRAM_FLASH_A6 SRAM_FLASH_A5 SRAM_FLASH_A4 SRAM_FLASH_A3 SRAM_FLASH_A2 SRAM_FLASH_A1 SRAM_FLASH_A0 D 3.3V VCC0 VCC3V3 6 IO_L0P_A19_1L21 IO_L0N_A18_1L20 IO_L1P_A17_1L15 IO_L1N_A16_1L16 IO_L2P_A15_D31_1J22 IO_L2N_A14_D30_1K21 IO_L3P_A13_D29_1K16 IO_L3N_A12_D28_1J15 IO_L4P_A11_D27_1G22 IO_L4N_VREF_A10_D26_1H22 IO_L5P_A9_D25_1L14 IO_L5N_A8_D24_1K14 IO_L6P_A7_D23_1K23 IO_L6N_A6_D22_1K22 IO_L7P_A5_D21_1J12 IO_L7N_A4_D20_1H12 IO_L8P_CC_A3_D19_1G23 IO_L8N_CC_A2_D18_1H23 IO_L9P_CC_A1_D17_1K13 IO_L9N_CC_A0_D16_1K12 PHY_RXCLK GPIO_LED_0 PHY_TXCLK GPIO_LED_1 GPIO_LED_2 GPIO_LED_4 CLKBUF_Q1_P CLKBUF_Q1_N PHY_TXC_GTXCLK LCD_FPGA_RS CLK_FPGA_P CLK_FPGA_N SMA_DIFF_CLK_IN_P SMA_DIFF_CLK_IN_N FPGA_DIFF_CLK_OUT_P FPGA_DIFF_CLK_OUT_N PHY_RESET PHY_MDIO PHY_MDC PHY_INT 1 C3 120PF 2 50V NPO U1 D13VCCO1_1 G14VCCO2_1 IO_L0P_CC_GC_3H17 IO_L0N_CC_GC_3H18 IO_L1P_CC_GC_3K17 IO_L1N_CC_GC_3L18 IO_L2P_GC_VRN_3G15 IO_L2N_GC_VRP_3G16 IO_L3P_GC_3K18 IO_L3N_GC_3J19 IO_L4P_GC_3J16 IO_L4N_GC_VREF_3J17 IO_L5P_GC_3L19 IO_L5N_GC_3K19 IO_L6P_GC_3H14 IO_L6N_GC_3H15 IO_L7P_GC_3J20 IO_L7N_GC_3J21 IO_L8P_GC_3J14 IO_L8N_GC_3H13 IO_L9P_GC_3H19 IO_L9N_GC_3H20 FPGA_CLK-C 3.3V VCC0 VCC3V3 FF1136 BANK 3 SG-BGA-6046 140 R17 1 SG-BGA-6046 C U1 E20VCCO1_3 D23VCCO2_3 FPGA_CCLK 2 GNDA_FPGA 1 4.7K RP1 FF1136 BANK 0 FPGA_DX_P FPGA_DX_N FPGA_V_P FPGA_V_N FPGA_VBATT FPGA_PROG_B FPGA_HSWAPEN FPGA_DIN FPGA_DONE FPGA_CCLK-R FPGA_INIT_B FPGA_CS_B FPGA_RDWR_B RESERVED1 RESERVED2 FPGA_EXP_TCK FPGA_M0 FPGA_M2 FPGA_M1 FPGA_EXP_TMS FPGA_TDI FPGA_DOUT_BUSY FPGA_TDO R2 1 C2 0.01UF 2 16V X7R DXP_0W18 DXN_0W17 VP_0U18 VN_0V17 VBATT_0L23 PROGRAM_B_0M22 HSWAPEN_0M23 D_IN_0P15 DONE_0M15 CCLK_0N15 INIT_B_0N14 CS_B_0N22 RDWR_B_0N23 RSVD1_0AB23 RSVD2_0AC23 TCK_0AB15 M0_0AD21 M2_0AD22 M1_0AC22 TMS_0AC14 TDI_0AC15 D_OUT_BUSY_0AD15 TDO_0AD14 3 T18AVDD_0 T17AVSS_0 V18VREFP_0 U17VREFN_0 AA22VCCO1_0 AD23VCCO2_0 2.5V VCC0 VCC2V5 1 U1 2 D 1 C1 0.01UF 2 16V X7R VCC3V3 5% FPGA_AVDD FPGA_VREFP 3.3V VCC0 Unused RP1 Resistors SG-BGA-6046 SRAM_FLASH_D15 SRAM_FLASH_D14 SRAM_FLASH_D13 SRAM_FLASH_D12 SRAM_FLASH_D11 SRAM_FLASH_D10 SRAM_FLASH_D9 SRAM_FLASH_D8 SRAM_CLK FPGA_SERIAL1_TX USER_CLK FPGA_SERIAL1_RX CLK_27MHZ_FPGA AUDIO_SYNC CLK_33MHZ_FPGA AUDIO_SDATA_OUT AUDIO_BIT_CLK AUDIO_SDATA_IN VGA_IN_DATA_CLK FLASH_AUDIO_RESET_B SG-BGA-6046 B B VCC3V3 3.3V VCC0 4.75K 1 1% 2 Banks 0,1,2,3,4 Config, FLASH, SRAM, GPIO, CLKs 1% 2 DNP 2 1% 1 4.75K R8 2 2 1 1% 1 1 DNP R9 2 1% 1 4.75K R6 VCC3V3 1% FF1136 BANK 2 CFG_ADDR_OUT1 CFG_ADDR_OUT0 GPIO_LED_W GPIO_LED_E GPIO_LED_N GPIO_LED_S SRAM_FLASH_A21 SRAM_FLASH_A20 FLASH_CE_B FLASH_OE_B SRAM_FLASH_WE_B FPGA_CS0_B SRAM_FLASH_D7 SRAM_FLASH_D6 SRAM_FLASH_D5 SRAM_FLASH_D4 SRAM_FLASH_D3 SRAM_FLASH_D2 SRAM_FLASH_D1 SRAM_FLASH_D0 DNP R7 IO_L0P_CC_RS1_2AE13 IO_L0N_CC_RS0_2AE12 IO_L1P_CC_A25_2AF23 IO_L1N_CC_A24_2AG23 IO_L2P_A23_2AF13 IO_L2N_A22_2AG12 IO_L3P_A21_2AE22 IO_L3N_A20_2AE23 IO_L4P_FCS_B_2AE14 IO_L4N_VREF_FOE_B_MOSI_2AF14 IO_L5P_FWE_B_2AF20 IO_L5N_CSO_B_2AF21 IO_L6P_D7_2AF15 IO_L6N_D6_2AE16 IO_L7P_D5_2AE21 IO_L7N_D4_2AD20 IO_L8P_D3_2AF16 IO_L8N_D2_FS2_2AE17 IO_L9P_D1_FS1_2AE19 IO_L9N_D0_FS0_2AD19 R4 U1 AM19VCCO1_2 AH21VCCO2_2 SG-BGA-6046 Title: R5 A FPGA Banks 0,1,2,3,4, Config, FLASH, SRAM, GPIO, CLKs SCHEM, ROHS COMPLIANT ML505/6/7 VIRTEX-5 EVALUATION PLATFORM, 1280415 0381241 A 1-22-2008_14:51 Date: Sheet Size: B Sheet 4 3 2 2 of Ver: A Rev: 02 Drawn By 27 BP 1 4 3 2 1 VTTVREF 3.3V VCC0 VCC1V8 VCC1V8 DDR2_D48 DDR2_D47 DDR2_D43 DDR2_D46 DDR2_D42 DDR2_DM5 DDR2_D41 DDR2_D45 DDR2_D40 DDR2_D44 R228 1 1% VCC1V8 2 49.9 DDR2_D56 DDR2_D55 DDR2_D51 DDR2_D54 DDR2_D50 DDR2_DM6 DDR2_DQS7_P DDR2_DQS7_N DDR2_DQS6_P DDR2_DQS6_N DDR2_CLK1_P DDR2_CLK1_N DDR2_DQS5_P DDR2_DQS5_N FPGA_VRN_B19 FPGA_VRP_B19 DDR2_D53 DDR2_D49 DDR2_D52 1 1% FF1136 BANK 19 C U1 M29VCCO1_15 L32VCCO2_15 P33VCCO3_15 SFP_TX_DISABLE_FPGA DDR2_D63 DDR2_D62 DDR2_D59 DDR2_D58 DDR2_DM7 DDR2_D61 DDR2_D57 DDR2_D60 R229 2 SG-BGA-6046 IO_L0P_15E29 IO_L0N_15F29 IO_L1P_15G30 IO_L1N_15F30 IO_L2P_15H29 IO_L2N_15J29 IO_L3P_15F31 IO_L3N_15E31 IO_L4P_15L29 IO_L4N_VREF_15K29 IO_L5P_15H30 IO_L5N_15G31 IO_L6P_15J30 IO_L6N_15J31 IO_L7P_15L30 IO_L7N_15M30 IO_L8P_CC_15N29 IO_L8N_CC_15P29 IO_L9P_CC_15K31 IO_L9N_CC_15L31 IO_L10P_CC_15P31 IO_L10N_CC_15P30 IO_L11P_CC_15M31 IO_L11N_CC_15N30 IO_L12P_VRN_15R28 IO_L12N_VRP_15R29 IO_L13P_15T31 IO_L13N_15R31 IO_L14P_15U30 IO_L14N_VREF_15T30 IO_L15P_15T28 IO_L15N_15T29 IO_L16P_15U27 IO_L16N_15U28 IO_L17P_15R26 IO_L17N_15R27 IO_L18P_15U26 IO_L18N_15T26 IO_L19P_15U25 IO_L19N_15T25 U1 N6VCCO1_12 T7VCCO2_12 M9VCCO3_12 DDR2_SCL DDR2_SDA PIEZO_SPEAKER DDR2_ODT1 DDR2_A13 DDR2_CS1_B DDR2_ODT0 DDR2_CAS_B DDR2_CS0_B DDR2_WE_B DDR2_RAS_B DDR2_BA0 DDR2_BA1 DDR2_A10 DDR2_A0 DDR2_A1 DDR2_A2 DDR2_A3 DDR2_A4 DDR2_A5 DDR2_A6 DDR2_A7 DDR2_A8 DVI_GPIO1 DDR2_A9 DDR2_A11 DDR2_A12 DDR2_BA2 DDR2_CKE1 FAN_ALERT_B DDR2_CKE0 IIC_SDA_VIDEO IIC_SCL_VIDEO IIC_SDA_SFP IIC_SCL_SFP MOUSE_CLK MOUSE_DATA KEYBOARD_CLK GPIO_DIP_SW1 KEYBOARD_DATA FF1136 BANK 15 SG-BGA-6046 IO_L0P_12M6 IO_L0N_12M5 IO_L1P_12N8 IO_L1N_12N7 IO_L2P_12M7 IO_L2N_12L6 IO_L3P_12N5 IO_L3N_12P5 IO_L4P_12L4 IO_L4N_VREF_12L5 IO_L5P_12P7 IO_L5N_12P6 IO_L6P_12K7 IO_L6N_12K6 IO_L7P_12R6 IO_L7N_12T6 IO_L8P_CC_12J6 IO_L8N_CC_12J5 IO_L9P_CC_12R7 IO_L9N_CC_12R8 IO_L10P_CC_12T8 IO_L10N_CC_12U7 IO_L11P_CC_12H7 IO_L11N_CC_12J7 IO_L12P_VRN_12R9 IO_L12N_VRP_12P9 IO_L13P_12H5 IO_L13N_12G5 IO_L14P_12R11 IO_L14N_VREF_12P10 IO_L15P_12F5 IO_L15N_12F6 IO_L16P_12T10 IO_L16N_12T11 IO_L17P_12G6 IO_L17N_12G7 IO_L18P_12T9 IO_L18N_12U10 IO_L19P_12E6 IO_L19N_12E7 FF1136 BANK 12 SYSACE_MPA05 SYSACE_MPCE SYSACE_MPOE_USB_RD_B SYSACE_MPA01_USB_A0 SYSACE_MPIRQ SYSACE_MPA06 SYSACE_MPA02_USB_A1 SYSACE_MPA03 SYSACE_USB_D10 SYSACE_USB_D9 SYSACE_USB_D6 SYSACE_USB_D7 SYSACE_USB_D14 SYSACE_USB_D11 SYSACE_MPA04 SYSACE_USB_D13 SYSACE_USB_D15 SYSACE_USB_D12 SYSACE_USB_D4 SYSACE_USB_D8 SYSACE_USB_D1 SYSACE_USB_D5 SYSACE_USB_D3 SYSACE_USB_D2 SYSACE_MPWE_USB_WR_B SYSACE_USB_D0 SYSACE_MPBRDY SYSACE_MPA00 USB_RESET_B USB_CS_B USB_INT BUS_ERROR_1 BUS_ERROR_2 LCD_FPGA_DB7 LCD_FPGA_DB6 LCD_FPGA_DB5 LCD_FPGA_DB4 CPU_TMS CPU_TCK CPU_TDO D C SG-BGA-6046 VTTVREF VTTVREF VCC1V8 A GPIO_DIP_SW3 GPIO_DIP_SW4 GPIO_DIP_SW5 GPIO_DIP_SW6 GPIO_DIP_SW7 GPIO_DIP_SW8 GPIO_LED_3 GPIO_LED_5 GPIO_LED_6 GPIO_LED_7 2 SG-BGA-6046 B DDR2_D36 DDR2_D30 DDR2_D26 DDR2_DM3 DDR2_D29 DDR2_D32 DDR2_DQS4_P DDR2_DQS4_N DDR2_DQS3_P DDR2_DQS3_N DDR2_D25 DDR2_D28 DDR2_DQS0_P DDR2_DQS0_N FPGA_VRN_B17 FPGA_VRP_B17 DDR2_D3 DDR2_D24 DDR2_D2 1 2 1 DDR2_D7 DDR2_D6 DDR2_DM0 DDR2_D1 DDR2_D5 DDR2_D0 DDR2_D4 FPGA_ROTARY_INCA FPGA_ROTARY_PUSH FPGA_ROTARY_INCB 2 3 Banks 14,16,18,21 DDR2, PS2, GPIO Title: FPGA Bank 14, 16, 18, 21, DDR2, PS2, GPIO SCHEM, ROHS COMPLIANT ML505/6/7 VIRTEX-5 EVALUATION PLATFORM, 1280415 0381241 A 1-22-2008_14:51 Date: Sheet Size: B Sheet SG-BGA-6046 4 1% VCC1V8 R230 1 FF1136 BANK 17 DDR2_D35 DDR2_D39 DDR2_D34 DDR2_D38 DDR2_DM4 DDR2_D37 DDR2_D33 DDR2_D31 DDR2_D27 49.9 2 IO_L0P_17W24 IO_L0N_17V24 IO_L1P_17Y26 IO_L1N_17W26 IO_L2P_17V25 IO_L2N_17W25 IO_L3P_17Y27 IO_L3N_17W27 IO_L4P_17V30 IO_L4N_VREF_17W30 IO_L5P_17V28 IO_L5N_17V27 IO_L6P_17W31 IO_L6N_17Y31 IO_L7P_17W29 IO_L7N_17V29 IO_L8P_CC_17Y28 IO_L8N_CC_17Y29 IO_L9P_CC_17AB31 IO_L9N_CC_17AA31 IO_L10P_CC_17AB30 IO_L10N_CC_17AC30 IO_L11P_CC_17AA29 IO_L11N_CC_17AA30 IO_L12P_VRN_17AD31 IO_L12N_VRP_17AE31 IO_L13P_17AD30 IO_L13N_17AC29 IO_L14P_17AF31 IO_L14N_VREF_17AG31 IO_L15P_17AE29 IO_L15N_17AD29 IO_L16P_17AJ31 IO_L16N_17AK31 IO_L17P_17AF29 IO_L17N_17AF30 IO_L18P_17AJ30 IO_L18N_17AH30 IO_L19P_17AH29 IO_L19N_17AG30 1% 1 1% VCC1V8 R232 DDR2_D15 DDR2_D11 DDR2_D14 DDR2_D10 DDR2_DM1 DDR2_D9 DDR2_DQS2_P DDR2_DQS2_N DDR2_CLK0_P DDR2_CLK0_N DDR2_DQS1_P DDR2_DQS1_N DDR2_D8 DDR2_D13 FPGA_VRN_B21 FPGA_VRP_B21 PCIE_PRSNT_B_FPGA DDR2_D12 GPIO_DIP_SW2 49.9 B 1% FF1136 BANK 21 U1 AE30VCCO1_17 AH31VCCO2_17 AD33VCCO3_17 DDR2_D23 DDR2_D19 DDR2_D22 DDR2_D18 DDR2_DM2 DDR2_D21 DDR2_D17 DDR2_D20 DDR2_D16 R233 IO_L0P_21AA25 IO_L0N_21AA26 IO_L1P_21AB27 IO_L1N_21AC27 IO_L2P_21Y24 IO_L2N_21AA24 IO_L3P_21AB25 IO_L3N_21AB26 IO_L4P_21AC28 IO_L4N_VREF_21AD27 IO_L5P_21AB28 IO_L5N_21AA28 IO_L6P_21AG28 IO_L6N_21AH28 IO_L7P_21AE28 IO_L7N_21AF28 IO_L8P_CC_21AK26 IO_L8N_CC_21AJ27 IO_L9P_CC_21AK29 IO_L9N_CC_21AJ29 IO_L10P_CC_21AK28 IO_L10N_CC_21AK27 IO_L11P_CC_21AH27 IO_L11N_CC_21AJ26 IO_L12P_VRN_21AJ25 IO_L12N_VRP_21AH25 IO_L13P_21AF24 IO_L13N_21AG25 IO_L14P_21AG27 IO_L14N_VREF_21AG26 IO_L15P_21AF25 IO_L15N_21AF26 IO_L16P_21AE27 IO_L16N_21AE26 IO_L17P_21AC25 IO_L17N_21AC24 IO_L18P_21AD26 IO_L18N_21AD25 IO_L19P_21AD24 IO_L19N_21AE24 49.9 U1 AJ28VCCO1_21 AM29VCCO2_21 AL32VCCO3_21 R231 VCC1V8 49.9 D IO_L0P_19K24 IO_L0N_19L24 IO_L1P_19L25 IO_L1N_19L26 IO_L2P_19J24 IO_L2N_19J25 IO_L3P_19M25 IO_L3N_19M26 IO_L4P_19J27 IO_L4N_VREF_19J26 IO_L5P_19G25 IO_L5N_19G26 IO_L6P_19H25 IO_L6N_19H24 IO_L7P_19F25 IO_L7N_19F26 IO_L8P_CC_19G27 IO_L8N_CC_19H27 IO_L9P_CC_19H28 IO_L9N_CC_19G28 IO_L10P_CC_19E28 IO_L10N_CC_19F28 IO_L11P_CC_19E26 IO_L11N_CC_19E27 IO_L12P_VRN_19N27 IO_L12N_VRP_19M27 IO_L13P_19K28 IO_L13N_19L28 IO_L14P_19K27 IO_L14N_VREF_19K26 IO_L15P_19M28 IO_L15N_19N28 IO_L16P_19P26 IO_L16N_19P27 IO_L17P_19N24 IO_L17N_19P24 IO_L18P_19P25 IO_L18N_19N25 IO_L19P_19R24 IO_L19N_19T24 49.9 U1 J28VCCO1_19 E30VCCO2_19 H31VCCO3_19 VCC3V3 2 3 of Ver: A Rev: 02 Drawn By 27 BP 1 4 3 EXP VCC0 VCCO_EXP 2 SG-BGA-6046 EXP VCC0 IO_L0P_18AC4 IO_L0N_18AC5 IO_L1P_18AB6 IO_L1N_18AB7 IO_L2P_18AA5 IO_L2N_18AB5 IO_L3P_18AC7 IO_L3N_18AD7 IO_L4P_18Y8 IO_L4N_VREF_18Y9 IO_L5P_18AD4 IO_L5N_18AD5 IO_L6P_18AA6 IO_L6N_18Y7 IO_L7P_18AD6 IO_L7N_18AE6 IO_L8P_CC_18W6 IO_L8N_CC_18Y6 IO_L9P_CC_18AE7 IO_L9N_CC_18AF6 IO_L10P_CC_18AG5 IO_L10N_CC_18AF5 IO_L11P_CC_18W7 IO_L11N_CC_18V7 IO_L12P_VRN_18AH5 IO_L12N_VRP_18AG6 IO_L13P_18Y11 IO_L13N_18W11 IO_L14P_18AH7 IO_L14N_VREF_18AG7 IO_L15P_18W10 IO_L15N_18W9 IO_L16P_18AJ7 IO_L16N_18AJ6 IO_L17P_18V8 IO_L17N_18U8 IO_L18P_18AK7 IO_L18N_18AK6 IO_L19P_18V10 IO_L19N_18V9 FF1136 BANK 18 1 2 49.9 2 1% 1 1% VCC3V3 VALUE VGA_IN_BLUE0 VGA_IN_BLUE1 VGA_IN_BLUE2 VGA_IN_BLUE3 VGA_IN_BLUE4 VGA_IN_BLUE5 VGA_IN_BLUE6 VGA_IN_BLUE7 VGA_IN_GREEN0 VGA_IN_GREEN1 VGA_IN_GREEN2 VGA_IN_GREEN3 VGA_IN_GREEN4 VGA_IN_GREEN5 VGA_IN_GREEN6 VGA_IN_GREEN7 VGA_IN_ODD_EVEN_B VGA_IN_VSOUT VGA_IN_HSOUT VGA_IN_SOGOUT VGA_IN_RED0 VGA_IN_RED1 VGA_IN_RED2 VGA_IN_RED3 VGA_IN_RED4 VGA_IN_RED5 VGA_IN_RED6 VGA_IN_RED7 VGA_IN_CLAMP VGA_IN_COAST CPLD_IO_1 PC4_HALT_B GPIO_SW_W GPIO_SW_C GPIO_SW_S GPIO_SW_N GPIO_SW_E DVI_RESET_B CPU_TRST SPI_CE_B D C VALUE 3.3V VCC0 VCC3V3 U1 A 2 VALUE B 2 1 2 49.9 1 1% VCC3V3 1% FF1136 BANK 20 FPGA_CPU_RESET_B GPIO_LED_C IIC_SCL_MAIN IIC_SDA_MAIN FPGA_SERIAL2_TX FPGA_SERIAL2_RX SRAM_CLK SRAM_ADV_LD_B SRAM_BW1 SRAM_BW0 SRAM_BW3 SRAM_BW2 SRAM_DQP0 SRAM_DQP1 SRAM_DQP2 SRAM_DQP3 SRAM_MODE SRAM_OE_B SRAM_CS_B SRAM_D31 SRAM_D30 SRAM_D29 SRAM_D28 SRAM_D27 FPGA_VRN_B20 FPGA_VRP_B20 SRAM_D26 SRAM_D25 SRAM_D24 SRAM_D23 SRAM_D22 SRAM_D21 SRAM_D20 SRAM_D19 SRAM_D18 SRAM_D17 SRAM_D16 FLASH_CLK FLASH_ADV_B FLASH_WAIT Banks 11,12,13 Sys ACE, XGI, PHY, LCD 49.9 1 IO_L0P_20E9 IO_L0N_20E8 IO_L1P_20F9 IO_L1N_20F8 IO_L2P_20F10 IO_L2N_20G10 IO_L3P_20G8 IO_L3N_20H8 IO_L4P_20D11 IO_L4N_VREF_20D10 IO_L5P_20K11 IO_L5N_20J11 IO_L6P_20D12 IO_L6N_20C12 IO_L7P_20H10 IO_L7N_20H9 IO_L8P_CC_20A13 IO_L8N_CC_20B12 IO_L9P_CC_20J10 IO_L9N_CC_20J9 IO_L10P_CC_20K8 IO_L10N_CC_20K9 IO_L11P_CC_20B13 IO_L11N_CC_20C13 IO_L12P_VRN_20L10 IO_L12N_VRP_20L11 IO_L13P_20G11 IO_L13N_20G12 IO_L14P_20M8 IO_L14N_VREF_20L8 IO_L15P_20F11 IO_L15N_20E11 IO_L16P_20M10 IO_L16N_20L9 IO_L17P_20E12 IO_L17N_20E13 IO_L18P_20N10 IO_L18N_20N9 IO_L19P_20F13 IO_L19N_20G13 R26 2 49.9 R22 1 1% VCCO_EXP 1% B J8VCCO1_20 E10VCCO2_20 H11VCCO3_20 R23 FF1136 BANK 13 HDR2_32_DIFF_3_P HDR2_30_DIFF_3_N HDR2_36_SM_15_P HDR2_34_SM_15_N HDR2_40_SM_6_P HDR2_38_SM_6_N HDR1_26 HDR1_30 HDR1_32 HDR1_34 HDR2_52_SM_5_P HDR2_50_SM_5_N HDR2_56_SM_13_P HDR2_54_SM_13_N HDR2_60_SM_4_P HDR2_58_SM_4_N HDR2_48_SM_12_P HDR2_46_SM_12_N HDR2_44_SM_14_P (CC) HDR2_42_SM_14_N (CC) HDR1_36 HDR1_58(CC) HDR1_28(CC) HDR1_38(CC) FPGA_VRN_B13 FPGA_VRP_B13 HDR1_44 HDR1_46 HDR1_40 HDR1_42 HDR1_48 HDR1_50 HDR1_52 HDR1_54 HDR1_56 HDR1_60 HDR1_62 HDR1_64 HDR2_64_SM_9_P HDR2_62_SM_9_N 49.9 IO_L0P_SM8P_13V32 IO_L0N_SM8N_13V33 IO_L1P_SM7P_13W34 IO_L1N_SM7N_13V34 IO_L2P_SM6P_13Y33 IO_L2N_SM6N_13AA33 IO_L3P_SM5P_13AA34 IO_L3N_SM5N_13Y34 IO_L4P_13Y32 IO_L4N_VREF_13W32 IO_L5P_SM4P_13AC34 IO_L5N_SM4N_13AD34 IO_L6P_SM3P_13AC32 IO_L6N_SM3N_13AB32 IO_L7P_SM2P_13AC33 IO_L7N_SM2N_13AB33 IO_L8P_CC_SM1P_13AF33 IO_L8N_CC_SM1N_13AE33 IO_L9P_CC_SM0P_13AF34 IO_L9N_CC_SM0N_13AE34 IO_L10P_CC_13AH34 IO_L10N_CC_13AJ34 IO_L11P_CC_13AD32 IO_L11N_CC_13AE32 IO_L12P_VRN_13AG33 IO_L12N_VRP_13AH33 IO_L13P_13AK34 IO_L13N_13AK33 IO_L14P_13AG32 IO_L14N_VREF_13AH32 IO_L15P_13AJ32 IO_L15N_13AK32 IO_L16P_13AL34 IO_L16N_13AL33 IO_L17P_13AM33 IO_L17N_13AM32 IO_L18P_13AN34 IO_L18N_13AN33 IO_L19P_13AN32 IO_L19N_13AP32 R27 U1 W28VCCO1_13 AB29VCCO2_13 AA32VCCO3_13 DVI_D11 DVI_D10 DVI_D9 DVI_D8 DVI_D7 DVI_D6 DVI_D5 DVI_D4 DVI_D3 DVI_D2 DVI_D1 DVI_D0 DVI_H DVI_V LCD_FPGA_RW LCD_FPGA_E DVI_XCLK_P DVI_XCLK_N DVI_DE TRC_CLK TRC_TS6 TRC_TS5 TRC_TS4 TRC_TS3 FPGA_VRN_B22 FPGA_VRP_B22 TRC_TS2E TRC_TS1E TRC_TS2O TRC_TS1O PHY_TXER PHY_TXCTL_TXEN PHY_TXD0 PHY_TXD1 PHY_TXD2 PHY_TXD3 PHY_TXD4 PHY_TXD5 PHY_TXD6 PHY_TXD7 R24 49.9 1 R21 2 1% R20 1 1% VCCO_EXP IO_L0P_22AN14 IO_L0N_22AP14 IO_L1P_22AB10 IO_L1N_22AA10 IO_L2P_22AN13 IO_L2N_22AM13 IO_L3P_22AA8 IO_L3N_22AA9 IO_L4P_22AP12 IO_L4N_VREF_22AN12 IO_L5P_22AC8 IO_L5N_22AB8 IO_L6P_22AM12 IO_L6N_22AM11 IO_L7P_22AC10 IO_L7N_22AC9 IO_L8P_CC_22AL11 IO_L8N_CC_22AL10 IO_L9P_CC_22AE8 IO_L9N_CC_22AD9 IO_L10P_CC_22AD10 IO_L10N_CC_22AD11 IO_L11P_CC_22AK11 IO_L11N_CC_22AJ11 IO_L12P_VRN_22AF8 IO_L12N_VRP_22AE9 IO_L13P_22AK8 IO_L13N_22AK9 IO_L14P_22AF9 IO_L14N_VREF_22AF10 IO_L15P_22AJ9 IO_L15N_22AJ10 IO_L16P_22AF11 IO_L16N_22AE11 IO_L17P_22AH9 IO_L17N_22AH10 IO_L18P_22AG8 IO_L18N_22AH8 IO_L19P_22AG10 IO_L19N_22AG11 FF1136 BANK 22 R25 AF7VCCO1_22 AJ8VCCO2_22 AH11VCCO3_22 U1 AC6VCCO1_18 W8VCCO2_18 AB9VCCO3_18 49.9 C PHY_COL PHY_RXD0 PHY_RXD1 PHY_RXD2 PHY_RXD3 PHY_RXD4 PHY_RXD5 PHY_RXD6 HDR1_10 HDR1_12 PHY_RXD7 PHY_CRS PHY_RXCTL_RXDV PHY_RXER HDR1_8 HDR1_4 HDR1_14(CC) HDR1_2 (CC) HDR1_6 (CC) HDR1_16 HDR2_4_SM_8_P HDR2_2_SM_8_N HDR2_8_SM_7_P HDR2_6_SM_7_N FPGA_VRN_B11 FPGA_VRP_B11 HDR1_18 HDR1_20 HDR1_22 HDR1_24 HDR2_12_DIFF_0_P HDR2_10_DIFF_0_N HDR2_16_DIFF_1_P HDR2_14_DIFF_1_N HDR2_20_DIFF_2_P HDR2_18_DIFF_2_N HDR2_24_SM_10_P HDR2_22_SM_10_N HDR2_28_SM_11_P HDR2_26_SM_11_N 49.9 IO_L0P_11B32 IO_L0N_11A33 IO_L1P_11B33 IO_L1N_11C33 IO_L2P_11C32 IO_L2N_11D32 IO_L3P_11C34 IO_L3N_11D34 IO_L4P_11G32 IO_L4N_VREF_11H32 IO_L5P_11F33 IO_L5N_11E34 IO_L6P_11E32 IO_L6N_11E33 IO_L7P_11G33 IO_L7N_11F34 IO_L8P_CC_11J32 IO_L8N_CC_11H33 IO_L9P_CC_11H34 IO_L9N_CC_11J34 IO_L10P_CC_SM15P_11L34 IO_L10N_CC_SM15N_11K34 IO_L11P_CC_SM14P_11K33 IO_L11N_CC_SM14N_11K32 IO_L12P_VRN_11N33 IO_L12N_VRP_11M33 IO_L13P_11L33 IO_L13N_11M32 IO_L14P_11P34 IO_L14N_VREF_11N34 IO_L15P_SM13P_11P32 IO_L15N_SM13N_11N32 IO_L16P_SM12P_11T33 IO_L16N_SM12N_11R34 IO_L17P_SM11P_11R33 IO_L17N_SM11N_11R32 IO_L18P_SM10P_11U33 IO_L18N_SM10N_11T34 IO_L19P_SM9P_11U32 IO_L19N_SM9N_11U31 FF1136 BANK 11 3.3V VCC0 VCC3V3 U1 T27VCCO1_11 R30VCCO2_11 V31VCCO3_11 VCCO_EXP 1 VCC3V3 U1 D 2 Title: Sheet Size: B Sheet 3 A 1-22-2008_14:51 Date: VALUE 4 Banks 11,12,13, Sys ACE, XGI, PHY, LCD SCHEM, ROHS COMPLIANT ML505/6/7 VIRTEX-5 EVALUATION PLATFORM, 1280415 0381241 2 4 of Ver: A Rev: 02 Drawn By 27 BP 1 4 3 2 1 Unused banks on the LX50T and SX50T VCC3V3 VCC3V3 U1 C U1 AK15VCCO1_6 AN16VCCO2_6 AJ18VCCO3_6 2 49.9 R35 1 1% VCC3V3 1 1% FF1136 BANK 5 MICTOR_20 MICTOR_22 MICTOR_35 MICTOR_37 MICTOR_18 MICTOR_33 NC NC NC NC NC SUPRCLK1_M1 NC NC SUPRCLK1_M0 NC NC NC NC NC NC NC NC NC FPGA_VRN_B5 FPGA_VRP_B5 NC NC NC NC NC NC NC NC NC NC NC NC NC NC R36 D IO_L0P_5B16 IO_L0N_5B15 IO_L1P_5A15 IO_L1N_5A14 IO_L2P_5B17 IO_L2N_5A16 IO_L3P_5C14 IO_L3N_5C15 IO_L4P_5E19 IO_L4N_VREF_5F19 IO_L5P_5C17 IO_L5N_5D17 IO_L6P_5E21 IO_L6N_5D20 IO_L7P_5D16 IO_L7N_5D15 IO_L8P_CC_5G20 IO_L8N_CC_5F20 IO_L9P_CC_5D14 IO_L9N_CC_5E14 IO_L10P_CC_5E17 IO_L10N_CC_5E16 IO_L11P_CC_5F21 IO_L11N_CC_5G21 IO_L12P_VRN_5E18 IO_L12N_VRP_5D19 IO_L13P_5D21 IO_L13N_5D22 IO_L14P_5F18 IO_L14N_VREF_5G18 IO_L15P_5E22 IO_L15N_5F23 IO_L16P_5G17 IO_L16N_5F16 IO_L17P_5D24 IO_L17N_5E23 IO_L18P_5F14 IO_L18N_5F15 IO_L19P_5F24 IO_L19N_5E24 2 49.9 C16VCCO1_5 F17VCCO2_5 B19VCCO3_5 SG-BGA-6046 IO_L0P_6AH24 IO_L0N_6AJ24 IO_L1P_6AK12 IO_L1N_6AJ12 IO_L2P_6AH23 IO_L2N_6AJ22 IO_L3P_6AL13 IO_L3N_6AK13 IO_L4P_6AK24 IO_L4N_VREF_6AL23 IO_L5P_6AJ14 IO_L5N_6AK14 IO_L6P_6AK23 IO_L6N_6AK22 IO_L7P_6AL15 IO_L7N_6AL14 IO_L8P_CC_6AJ21 IO_L8N_CC_6AJ20 IO_L9P_CC_6AJ16 IO_L9N_CC_6AJ15 IO_L10P_CC_6AK16 IO_L10N_CC_6AL16 IO_L11P_CC_6AL21 IO_L11N_CC_6AK21 IO_L12P_VRN_6AK17 IO_L12N_VRP_6AJ17 IO_L13P_6AL19 IO_L13N_6AL20 IO_L14P_6AK18 IO_L14N_VREF_6AL18 IO_L15P_6AJ19 IO_L15N_6AK19 IO_L16P_6AM15 IO_L16N_6AM16 IO_L17P_6AP16 IO_L17N_6AP17 IO_L18P_6AN15 IO_L18N_6AP15 IO_L19P_6AM17 IO_L19N_6AN17 NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC IO_L0P_25AL29 IO_L0N_25AL30 IO_L1P_25AM31 IO_L1N_25AL31 IO_L2P_25AN30 IO_L2N_25AM30 IO_L3P_25AP30 IO_L3N_25AP31 IO_L4P_25AM27 IO_L4N_VREF_25AL28 IO_L5P_25AP29 IO_L5N_25AN29 IO_L6P_25AP27 IO_L6N_25AN27 IO_L7P_25AN28 IO_L7N_25AM28 IO_L8P_CC_25AN25 IO_L8N_CC_25AM25 IO_L9P_CC_25AM26 IO_L9N_CC_25AL26 IO_L10P_CC_25AP26 IO_L10N_CC_25AP25 IO_L11P_CC_25AL25 IO_L11N_CC_25AL24 IO_L12P_VRN_25AN24 IO_L12N_VRP_25AP24 IO_L13P_25AM21 IO_L13N_25AM20 IO_L14P_25AN23 IO_L14N_VREF_25AM23 IO_L15P_25AN20 IO_L15N_25AP20 IO_L16P_25AN22 IO_L16N_25AM22 IO_L17P_25AN18 IO_L17N_25AM18 IO_L18P_25AP22 IO_L18N_25AP21 IO_L19P_25AN19 IO_L19N_25AP19 NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC FF1136 BANK 6 D C SG-BGA-6046 VCC3V3 VCC3V3 U1 A R37 1 2 1 2 1% VCC3V3 49.9 B U1 AL22VCCO1_25 AK25VCCO2_25 AN26VCCO3_25 1% FF1136 BANK 23 SUPRCLK1_SEL1 SUPRCLK1_N0 SUPRCLK1_N1 MICTOR_25 SUPRCLK1_SEL0 SUPRCLK1_M2 NC SUPRCLK1_N2 MICTOR_16 MICTOR_31 NC NC MICTOR_29 MICTOR_27 MICTOR_23 MICTOR_5 NC NC NC NC NC NC NC NC FPGA_VRN_B23 FPGA_VRP_B23 NC NC NC NC NC NC NC NC NC NC NC NC NC R38 IO_L0P_23C20 IO_L0N_23B20 IO_L1P_23B21 IO_L1N_23A21 IO_L2P_23C19 IO_L2N_23C18 IO_L3P_23C22 IO_L3N_23B22 IO_L4P_23B18 IO_L4N_VREF_23A18 IO_L5P_23C23 IO_L5N_23B23 IO_L6P_23A19 IO_L6N_23A20 IO_L7P_23A23 IO_L7N_23A24 IO_L8P_CC_23C24 IO_L8N_CC_23D25 IO_L9P_CC_23B26 IO_L9N_CC_23A25 IO_L10P_CC_23B27 IO_L10N_CC_23A26 IO_L11P_CC_23B25 IO_L11N_CC_23C25 IO_L12P_VRN_23C29 IO_L12N_VRP_23B28 IO_L13P_23D26 IO_L13N_23C27 IO_L14P_23A29 IO_L14N_VREF_23A28 IO_L15P_23C28 IO_L15N_23D27 IO_L16P_23B31 IO_L16N_23A31 IO_L17P_23C30 IO_L17N_23D29 IO_L18P_23D31 IO_L18N_23D30 IO_L19P_23A30 IO_L19N_23B30 49.9 G24VCCO1_23 C26VCCO2_23 F27VCCO3_23 SG-BGA-6046 FF1136 BANK 25 B Banks 15, 17 VGA, IIC, PHY SRAM, FLASH, GPIO Title: Sheet Size: B Sheet 3 A 1-22-2008_14:51 Date: SG-BGA-6046 4 Banks 11,12,13, VGA, IIC, PHY, SRAM, GPIO SCHEM, ROHS COMPLIANT ML505/6/7 VIRTEX-5 EVALUATION PLATFORM, 1280415 0381241 2 5 of Ver: A Rev: 02 Drawn By 27 BP 1 A FF1136 GND GND111F22 GND112F32 GND113F7 GND114G19 GND115G29 GND116G34 GND117G4 GND118G9 GND119H16 GND120H2 GND121H21 GND122H26 GND123H6 GND124J13 GND125J18 GND126J2 GND127J23 GND128J33 GND129K10 GND130K15 GND131K20 GND132K25 GND133K30 GND134K4 GND135K5 GND136L13 GND137L17 GND138L22 GND139L27 GND140L7 GND141M12 GND142M14 GND143M16 GND144M18 GND145M20 GND146M24 GND147M34 GND148M4 GND149N11 GND150N13 GND151N17 GND152N19 GND153N21 GND154N26 GND155N31 GND156N4 GND157P12 GND158P14 GND159P16 GND160P18 GND161P2 GND162P20 GND163P22 GND164P28 GND165P8 GND166R10 GND167R13 GND168R15 GND169R17 GND170R19 GND171R2 GND172R21 GND173R23 GND174R25 GND175R5 GND176T12 GND177T14 GND178T16 GND179T20 GND180T22 GND181T32 GND182T4 GND183T5 GND184U11 GND185U13 GND186U15 GND187U19 GND188U21 GND189U23 GND190U29 GND191U34 GND192U6 GND193U9 GND194V12 GND195V14 GND196V16 GND197V20 GND198V22 GND199V26 GND200V6 GND201W13 GND202W15 GND203W19 GND204W21 GND205W23 GND206W33 GND207W4 GND208W5 GND209Y10 GND210Y12 GND211Y14 GND212Y16 GND213Y18 GND214Y2 GND215Y20 GND216Y22 GND217Y25 GND218Y30 GND219Y5 R30 C10 X7R 2 16V R31 0.01UF 100 100 U1 AB11VCCAUX1 AC12VCCAUX2 L12VCCAUX3 M11VCCAUX4 M21VCCAUX5 P11VCCAUX6 4 1 3 5 7 9 FF1136 VCCAUX 2 4 6 8 10 VCCAUX 1 FPGA_DX_P FPGA_DX_N D1 BAS40-04 (Approx 3.1V) FPGA_VBATT VCCAUX VCCAUX7P23 VCCAUX8T23 VCCAUX9U24 VCCAUX10V11 VCCAUX11V23 VCCAUX12Y23 NC NC NC NC NC NC NC NC NC NC SG-BGA-6046 3 40V 200MA 1% A1NC1 A4NC2 A5NC3 A10NC4 A34NC5 E1NC6 F1NC7 L1NC8 M1NC9 AK1NC20 2 1 GNDA_FPGA FF1136 NC R32 1.54K 1% R33 4.75K 1% HDR_V_P 2 NC 1 VCC5 HDR_V_N B1 1% 2 NC10U1 NC11V1 NC12AC1 NC13AD1 NC14AJ1 NC15AP1 NC16AP4 NC17AP5 NC18AP10 NC19AP34 2 1TEMP 3VIN 1 C13 1UF 2 10V X5R 1 C12 0.1UF 2 10V X5R TRIM5 2GND VOUT4 U1 NC NC NC NC NC NC NC NC NC NC SG-BGA-6046 B Sheet J17 1 3 NC ADR_VREFP ADR_VREFP ADR03_SC70 U9 GNDA_FPGA U1 AA12VCCINT1 AA14VCCINT2 AA16VCCINT3 AA18VCCINT4 AA20VCCINT5 AB13VCCINT6 AB17VCCINT7 AB19VCCINT8 AB21VCCINT9 AC16VCCINT10 AC18VCCINT11 AC20VCCINT12 AD13VCCINT13 AD17VCCINT14 M13VCCINT15 M17VCCINT16 M19VCCINT17 N12VCCINT18 N16VCCINT19 N18VCCINT20 N20VCCINT21 P13VCCINT22 P17VCCINT23 P19VCCINT24 P21VCCINT25 R12VCCINT26 R14VCCINT27 Title: Date: 6 of HZ0805E601R-10 FPGA_AVDD 2 FPGA_AVDD_FB 2 SMB_DX_P SMB_DX_N J9 C11 1UF 2 10V X5R FB2 1 1 ADR_VREFP 1 2 System Monitor Header 1 HZ0805E601R-10 FB1 VCCAUX HZ0805E601R-10 NC VCC5 FB3 1 2 1 Rechargeable Battery 1 FPGA_V_P FPGA_V_N 2 1 D 3 SG-BGA-6046 U1 A11GND1 A12GND2 A17GND3 A22GND4 A27GND5 A32GND6 AA11GND7 AA13GND8 AA15GND9 AA17GND10 AA19GND11 AA2GND12 AA21GND13 AA23GND14 AA27GND15 AA7GND16 AB12GND17 AB14GND18 AB16GND19 AB18GND20 AB20GND21 AB22GND22 AB24GND23 AB34GND24 AB4GND25 AC11GND26 AC13GND27 AC17GND28 AC19GND29 AC21GND30 AC26GND31 AC31GND32 AD12GND33 AD16GND34 AD18GND35 AD28GND36 AD8GND37 AE10GND38 AE15GND39 AE20GND40 AE25GND41 AE4GND42 AE5GND43 AF12GND44 AF17GND45 AF2GND46 AF22GND47 AF27GND48 AF32GND49 AG19GND50 AG2GND51 AG24GND52 AG29GND53 AG34GND54 AG9GND55 AH16GND56 AH26GND57 AH4GND58 AH6GND59 AJ13GND60 AJ23GND61 AJ33GND62 AJ5GND63 AK10GND64 AK20GND65 AK30GND66 AK4GND67 AL17GND68 AL27GND69 AL6GND70 AL9GND71 AM14GND72 AM2GND73 AM24GND74 AM34GND75 AN1GND76 AN11GND77 AN2GND78 AN21GND79 AN31GND80 AN7GND81 AN8GND82 AP11GND83 AP13GND84 AP18GND85 AP23GND86 AP28GND87 AP33GND88 B1GND89 B11GND90 B14GND91 B2GND92 B24GND93 B29GND94 B34GND95 B7GND96 B8GND97 C11GND98 C2GND99 C21GND100 C31GND101 D18GND102 D28GND103 D33GND104 D6GND105 D9GND106 E15GND107 E25GND108 E5GND109 F12GND110 4 2 1 FPGA AVDD Select Silkscreen: 1-2: VCC 2.5V 2-3: FPGA VREFP FPGA_AVDD VCCINT 1-22-2008_14:51 Sheet Size: B 27 1 D 2 2 3 GNDA_FPGA FPGA_VREFP 1 C14 0.1UF 2 10V X5R GNDA_FPGA C C VCCINT FF1136 VCCINT VCCINT28R16 VCCINT29R18 VCCINT30R20 VCCINT31R22 VCCINT32T13 VCCINT33T15 VCCINT34T19 VCCINT35T21 VCCINT36U12 VCCINT37U14 VCCINT38U16 VCCINT39U20 VCCINT40U22 VCCINT41V13 VCCINT42V15 VCCINT43V19 VCCINT44V21 VCCINT45W12 VCCINT46W14 VCCINT47W16 VCCINT48W20 VCCINT49W22 VCCINT50Y13 VCCINT51Y15 VCCINT52Y17 VCCINT53Y19 VCCINT54Y21 B SG-BGA-6046 Power and Misc FPGA Banks VCCINT, VCCAUX, NCs, GND Battery and System Moniter FPGA Misc, VCCINT, VCCAUX, GND, Sys Mon SCHEM, ROHS COMPLIANT ML505/6/7 VIRTEX-5 EVALUATION PLATFORM, 1280415 0381241 Ver: A A Rev: Drawn By 02 BP 4 3 2 VCC3V3 VCC3V3 1 Silkscreen: "SYSACE RESET" SYSACE_RESET_B Pushbutton VCC3V3 NC SysACE Failsafe Mode Jumpers P4 P2 P3 RP2 108 74 72 8 33 39 41 6 39_CSEL 41_RESET 5% 46 45 40 33 24 43 4.7K 46_BVD1 45_BVD2 40_VS2 33_VS1 24_WP 43_INPACK 10 RP2 35 34 9 RP2 6 35_IOWR 34_IORD 5% 38 13 4.7K 38_VCC 13_VCC C 1% NC NC NC NC NC NC 1% 50_GND 1_GND 2 1 2 1.21K 1 1.21K R53 25_CD2 49_D10 48_D09 23_D02 47_D08 22_D01 21_D00 20_A00 44_REG 19_A01 18_A02 42_WAIT 17_A03 16_A04 15_A05 14_A06 37_RDY/BSY 12_A07 36_WE 11_A08 10_A09 9_OEI 8_A10 32_CE2 7_CE1I 31_D15 6_D07 30_D14 5_D06 29_D13 4_D05 28_D12 3_D04 27_D11 2_D03 26_CD1 R52 RP2 4.7K 6 RESET_B 7 5% 25 49 48 23 47 22 21 20 44 19 18 42 17 16 15 14 37 12 36 11 10 9 8 32 7 31 6 30 5 29 4 28 3 27 2 26 50 1 0.1UF X5R 10V 4 3 0.1UF X5R 10V CP3 2 1 1 4 78 79 82 85 80 81 86 87 88 89 93 95 96 98 101 97 102 B 5 6 7 8 5 6 7 8 to FPGA 5 FPGA_INIT_B FPGA_PROG_B VCC3V3 N7E50-7516PG-20 VCC3V3 6 FPGA_TDO EXPANSION_TDO 1 SYSACE_ERR_LED J19 P1 3 1 4.7K 5% RP2 NC16 NC17 NC18 NC19 NC20 NC21 NC22 NC23 NC24 NC25 7 4 4.7K 1 VCC3V3 U2 8 3 B 5% RP2 3 2 1 EXP JTAG 1-2: Bypass EXP 2-3:EXP in Chain J21 PARTS=1 LEVEL=STD XCCACE-TQ144I NC CP2 Silkscreen 34 36 38 40 71 90 122 124 127 143 SYSTEMACE TQFP144 (DIE DOWN) 2 NC NC NC NC NC NC NC NC NC NC MPBRDY MPIRQ MPCE MPA06 MPA05 MPA04 MPD15 MPD14 MPD13 MPD12 MPD11 MPD10 MPD09 MPD08 MPD07 MPD06 MPD05 MPD04 MPD03 MPD02 MPD01 MPD00 MPA03 MPA02 MPA01 MPA00 MPWE MPOE SYSACE_CFCD2 SYSACE_CFD10 SYSACE_CFD09 SYSACE_CFD02 SYSACE_CFD08 SYSACE_CFD01 SYSACE_CFD00 SYSACE_CFA00 SYSACE_CFREG SYSACE_CFA01 SYSACE_CFA02 SYSACE_CFWAIT SYSACE_CFA03 SYSACE_CFA04 SYSACE_CFA05 SYSACE_CFA06 SYSACE_CFRDBSY SYSACE_CFA07 SYSACE_CFWE SYSACE_CFA08 SYSACE_CFA09 SYSACE_CFDE SYSACE_CFA10 SYSACE_CFCE2 SYSACE_CFCE1 SYSACE_CFD15 SYSACE_CFD07 SYSACE_CFD14 SYSACE_CFD06 SYSACE_CFD13 SYSACE_CFD05 SYSACE_CFD12 SYSACE_CFD04 SYSACE_CFD11 SYSACE_CFD03 SYSACE_CFCD1 1 C 39 41 42 43 44 45 47 48 49 50 51 52 53 56 58 59 60 61 62 63 65 66 67 68 69 70 76 77 13 12 11 8 7 6 5 4 3 142 141 140 139 137 135 134 133 132 131 130 125 123 121 138 119 118 117 116 115 114 113 107 106 105 104 103 0.1UF X5R 10V SYSACE_MPBRDY SYSACE_MPIRQ SYSACE_MPCE SYSACE_MPA06 SYSACE_MPA05 SYSACE_MPA04 SYSACE_USB_D15 SYSACE_USB_D14 SYSACE_USB_D13 SYSACE_USB_D12 SYSACE_USB_D11 SYSACE_USB_D10 SYSACE_USB_D9 SYSACE_USB_D8 SYSACE_USB_D7 SYSACE_USB_D6 SYSACE_USB_D5 SYSACE_USB_D4 SYSACE_USB_D3 SYSACE_USB_D2 SYSACE_USB_D1 SYSACE_USB_D0 SYSACE_MPA03 SYSACE_MPA02_USB_A1 SYSACE_MPA01_USB_A0 SYSACE_MPA00 SYSACE_MPWE_USB_WR_B SYSACE_MPOE_USB_RD_B CFCD2 CFD10 CFD09 CFD02 CFD08 CFD01 CFD00 CFA00 CFREG CFA01 CFA02 CFWAIT CFA03 CFA04 CFA05 CFA06 CFGRSVD CFA07 CFWE CFA08 CFA09 CFOE CFA10 CFCE2 CFCE1 CFD15 CFD07 CFD14 CFD06 CFD13 CFD05 CFD12 CFD04 CFD11 CFD03 CFCD1 4 SW5 Silkscreen: PROG 1 SYSACE_RESET_B 2 J18 H-1X2 3 3 D H-1X2 2 FPGA_PROG_B CP1 P3 Failsafe Mode Enabled VCC3V3 2 P2 POR_BYPASS POR_TEST POR_RESET P4 = OR SYSACE_ERR_LED 35_GND 26_GND 18_GND 9_GND 144_GND 136_GND 129_GND 120_GND 111_GND 46_GND 54_GND 64_GND 83_GND 75_GND 91_GND 100_GND 112_GND 110_GND 2 P1 4 3 SW4 35 26 18 9 144 136 129 120 111 46 54 64 83 75 91 100 112 110 1 NC1 NC2 NC3 NC4 NC5 NC6 NC7 NC8 NC9 NC10 NC11 NC12 NC13 NC14 NC15 VCCH_1 VCCH_17 VCCH_37 VCCH_55 VCCH_92 VCCH_73 VCCH_109 VCCH_128 10 15 25 57 84 94 99 126 Pushbutton FPGA_PROG_B 2 14 16 19 20 21 22 23 24 27 28 29 30 31 32 VCCL_10 VCCL_15 VCCL_25 VCCL_57 VCCL_84 VCCL_94 VCCL_99 VCCL_126 NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC CFGINIT CFGPROG CFGTDO CFGTMS CFGTCK CFGTDI CFGADDR0 CFGADDR1 CFGADDR2 CFGMODEPIN CLK STATLED ERRLED TSTTMS TSTTCK TSTTDO TSTTDI FPGA PROG 1 17 37 55 92 73 109 128 2 4.7K RP2 2 D 5% 1 6 P1 4 4.7K 1 5% VCC3V3 FPGA_TDI FPGA_EXP_TMS FPGA_EXP_TCK SYSACE_TDI VCC3V3 From CPLD Combined FPGA & CPU PC4 Connector CFG_ADDR_OUT0 CFG_ADDR_OUT1 CFG_ADDR_OUT2 System ACE A LED-GRN-SMT DS3 140 Silkscreen "System ACE" "Error LED" LED-RED-SMT DS4 1% 4.7K Title: NC 14 12 10 8 6 4 2 13 11 9 7 5 3 1 System ACE SCHEM, ROHS COMPLIANT ML505/6/7 VIRTEX-5 EVALUATION PLATFORM, 1280415 0381241 A 1-22-2008_14:51 Date: Sheet Size: B Ver: A Rev: 02 J1 Sheet SYSACE_ERR_LED 1 SA_ERR_RES 140 4 SYSACE_STAT_LED R51 1 2 2 1 SA_STAT_RES 2 1 87832-1420 PC4_HALT_B PC4_TDI PC4_TDO PC4_TCK PC4_TMS R50 2 5% Silkscreen "System ACE" "Status LED" VCC3V3 5 CLK_33MHZ_SYSACE CPLD_TDO From CLKGEN RP2 1 SYSACE_CFGMODEPIN 1% 3 2 7 of Drawn By 27 BP 1 4 3 2 1 VCC3V3 VCC3V3 FPGA_DOUT_BUSY R57 0.1UF X5R 10V 2 1 PLAT_FLASH_CE_B NC 4 3 CP11 2 1 0.1UF X5R 10V PROM_CCLK-R NC NC 1% 84.5 R59 2 2 SPI_DIN 1.21K NC 1 SRAM_FLASH_D3 SRAM_FLASH_D2 SRAM_FLASH_D1 FPGA_DIN-RR60 49.9 SPI Program Header SPI_CE_B 2 TMS FLASH_OE_B 3 TDI FPGA_DIN 4 TDO FPGA_CCLK 5 TCK 6 GND 7 VCC3V3 FPGA_PROG_B 1%FPGA_DIN CFG_ADDR_OUT1 CFG_ADDR_OUT0 PLAT_FLASH_EXT_SEL_B VCC3V3 TMS TDI TDO TCK GND Platform Flash #2 NC NC VCC3V3 VCC1V8 1 R61 2 FPGA_DOUT_BUSY-R FPGA_PROG_B PLAT_FLASH_CF_B DNP 1% PROM_CCLK-R 2 1 0.1UF X5R 10V PLAT_FLASH_CE2_B-R 0 NC 5% 4 3 CP13 2 1 0.1UF X5R 10V 4 3 CP12 2 R62 NC NC B SRAM_FLASH_D5 SRAM_FLASH_D4 SPI Flash NC NC NC NC VCC3V3 NC NC SRAM_FLASH_D3 SRAM_FLASH_D2 FLASH_OE_B 5 FPGA_CCLK 6 SPI_CE_B 1 DATA_IN CLOCK 2 SPI_DIN SELECT_B 3 SRAM_FLASH_D1 FPGA_DIN-R CFG_ADDR_OUT1 CFG_ADDR_OUT0 PLAT_FLASH_EXT_SEL_B DATA_OUT WRITE_B 7 HOLD_B M25P80 U6B B 4 R63 SRAM_FLASH_D7 SRAM_FLASH_D6 GND PLAT_FLASH1_TDO PC4_TCK PC4_TMS PLAT_FLASH2_TDO 1 2 D7_48 48 D6_47 47 GND_46 46 VCCO_45 45 D5_44 44 D4_43 43 DNC_42 42 DNC_41 41 DNC_40 40 DNC_39 39 VCCO_38 38 DNC_37 37 GND_36 36 DNC_35 35 VCCINT_34 34 D3_33 33 D2_32 32 GND_31 31 VCCO_30 30 D1_29 29 D0_28 28 REV_SEL1_27 27 REV_SEL0_26 26 EN_EXT_SEL_B_25 25 VDD 1 5 6 7 8 5 6 7 8 NC FPGA_INIT_B FPGA_CCLK PLAT_FLASH_CE2_B VCC3V3 VCC1V8 8 1DNC_1 2GND_2 3DNC_3 4VCCINT_4 5BUSY_5 6CF_B_6 7GND_7 8VCCO_8 9CLKOUT_9 10CEO_B_10 11OE/RESET_B_11 12CLK_12 13CE_B_13 14DNC_14 15VCCINT_15 16DNC_16 17GND_17 18DNC_18 19TDI_19 20TCK_20 21TMS_21 22TDO_22 23GND_23 24VCCJ_24 C VCC3V3 VCC1V8 VCC3V3 D Silkscreen: HDR_1x7 SPI Prog J2 1 1 PROG_B INIT 2 5% 1 FPGA_CCLK FLASH_OE_B NC NC NC NC M25P16-VMF6P U6 1% 0 R49 R64 FLASH_CE_B 16 CLK 15 DIN 14 NC7 13 NC6 12 NC5 11 NC4 10 GND 9 WR_B NC XCF32P-VOG48 TSOP50P2000X1200-48 U4 PROM_CCLK-C C SPI_CE_B 1 1 NC NC NC NC 1 HOLD_B 2 VDD 3 NC0 4 NC1 5 NC2 6 NC3 7 CS_B 8 DOUT NC NC NC NC SRAM_FLASH_D5 SRAM_FLASH_D4 2 PC4_TDI PC4_TCK PC4_TMS PLAT_FLASH1_TDO SRAM_FLASH_D7 SRAM_FLASH_D6 VCC3V3 1 4 5% D7_48 48 D6_47 47 GND_46 46 VCCO_45 45 D5_44 44 D4_43 43 DNC_42 42 DNC_41 41 DNC_40 40 DNC_39 39 VCCO_38 38 DNC_37 37 GND_36 36 DNC_35 35 VCCINT_34 34 D3_33 33 D2_32 32 GND_31 31 VCCO_30 30 D1_29 29 D0_28 28 REV_SEL1_27 27 REV_SEL0_26 26 EN_EXT_SEL_B_25 25 2 3 1 2 CP10 DNP 1% R58 0 FPGA_CCLK PLAT_FLASH_CE2_B FPGA_INIT_B 5 6 7 8 5 6 7 8 2 1 VCC1V8 FPGA_PROG_B PLAT_FLASH_CF_B 1 1%FPGA_DOUT_BUSY-R 2 VCC3V3 1DNC_1 2GND_2 3DNC_3 4VCCINT_4 5BUSY_5 6CF_B_6 7GND_7 8VCCO_8 9CLKOUT_9 10CEO_B_10 11OE/RESET_B_11 12CLK_12 13CE_B_13 14DNC_14 15VCCINT_15 16DNC_16 17GND_17 18DNC_18 19TDI_19 20TCK_20 21TMS_21 22TDO_22 23GND_23 24VCCJ_24 NC 1 1% D NC DNP R56 C18 X5R 2 10V 0.1UF VCC3V3 VCC1V8 49.9 2 VCC3V3 Platform Flash #1 VCC3V3 113 R55 1 R65 1% VCC1V8 DNP 1% Populate to Bypass Plat Flash #2 XCF32P-VOG48 TSOP50P2000X1200-48 U5 Misc Config Platform Flash, SPI Flash VCC3V3 Silkscreen: SysACE Config, Mode pins VCC3V3 A 1 2 3 4 5 6 7 8 16 15 14 13 12 11 10 9 SRAM_FLASH_D0_EN 1 FPGA_DIN 2 3 OE C19 X5R 2 10V 0.1UF 1 SN74LVC1G126 SW3 CFG_ADDR_IN2 CFG_ADDR_IN1 CFG_ADDR_IN0 FPGA_M2 FPGA_M1 FPGA_M0 FPGA_FALLBACK_EN SYSACE_CFG_EN VCC 5 Title: A GND Y 4 SRAM_FLASH_D0 Misc Config,Platform Flash, SPI Flash SCHEM, ROHS COMPLIANT ML505/6/7 VIRTEX-5 EVALUATION PLATFORM, 1280415 0381241 U7 A 1-22-2008_14:51 Date: Ver: A Rev: 02 SDMX-8-X Config DIP switches Sheet Size: B Toggles connection from Plat Flash D0 to SRAM D0 Sheet 4 3 2 8 of Drawn By 27 BP 1 4 3 VCC_SUPRCLK 2 J54 1 1 VEE_18 VEE_223 R71 1 CLKBUF_Q3_P CLKBUF_Q3_N GND_11 GND_99 GND_1313 U11 VCC_CLKMUX 2 1% 5% 3 5% 4 2 Q3_N11 Q3_P12 6CLK_SEL R226 100 3CLK1_P 4CLK1_N 1 1CLK0_P 2CLK0_N 0 ICS85401 1 1% R227 GND_SUPRCLK FPGA_DIFF_CLK_OUT_P FPGA_DIFF_CLK_OUT_N GND_CLKMUX 100 2 GND_SUPRCLK SMAs, Generation, MUX and Buffer User Clock OUT5_N_16 16 5 OUT6_13 13 CLK_OUT6-R 22_IIC/JTAG_B 28_SHUTDOWN/OE 3 CLK_LOSS_TP 24 19 31 20 CLK_TMS CLK_TDI CLK_TDO CLK_TCK 1 2 2_GND 9_GND 14_GND 18_GND 30_GND 2 2 CLK_FPGA_P CLK_FPGA_N R77 27.4 1% RP6 10K 5% 22 28 2 9 14 18 30 J14 CLK_27MHZ_FPGA TP1 GOUT/LOSS_CLKIN_3 GIN2/TMS_24 GIN0/SDA/TDI_19 GOUT0/TDO/LOSS_LOCK_31 GIN1/SCLK/TCLK_20 1 R79 0 5% VCC3V3 5 R81 USER_CLK-R 27.4 USER_CLK 1% Clocking - Differential Clock, System Clock & User Clock 1 TMS 3.3V 2 OUT CLK Prog GND 6 8 110880 X1 Title: Differential Clock, System Clock, User Clock SCHEM, ROHS COMPLIANT ML505/6/7 VIRTEX-5 EVALUATION PLATFORM, 1280415 0381241 A 1-22-2008_14:51 Date: Sheet Size: B Sheet 3 GND TCK 5 VCC OSC TDO IIC Address = 0x6a 4 1 C32 120PF 2 50V NPO TDI 4 0 5% R80 IIC_SDA_MAIN U8 HDR_1x6 J3 1 3 IIC_SCL_MAIN IDT5V9885 Silkscreen: 2 1 Silkscreen: "CLK GEN" "JTAG EN" 27_GIN3/SUSPEND 25_GIN4/TRST_B 21_GIN5/CLK_SEL 1 C31 0.01UF 2 16V X7R VCC3V3 2 CLK_IIC_JTAG_B 27 25 21 CLK_33MHZ_FPGA OE 2 15 27.4 1% 1 1 C37 0.1UF 2 X5R 10V 4 1 OUT5_P_15 R76 2 VCC3V3 5_XTALOUT CLK_33MHZ_SYSACE AVDD_CLK R78 10 5% 1 5 CLK_XTAL_OUT R75 1 C36 0.1UF 2 10V X5R B VCC3V3 2 CLK_OUT4N-R 27.4 1% VCC3V3 1 11 CLK_12MHZ_USB 1 C35 0.1UF 2 10V X5R 6 OUT4_N_11 4_XTALIN/REFIN CLK_24.576MHZ_AUDIO 27.4 1% 9 6 RP6 10K 5% CLK_OUT4P-R 27.4 1% 10 OUT4_P_10 10 OUT3_8 R74 8 6 RP6 10K 5% CLK_OUT3-R R73 7 6 RP6 10K 5% 8 CLK_25MHZ_ENET 2 CLK_OUT2-R 27.4 1% 1 C34 0.1UF 2 10V X5R 2 4 CLK_XTAL_IN 1 1_CLKIN X2 RP6 10K 5% 29 OUT2_29 1 ABLS 25MHZ CLK_OUT1-R VCC3V3 1 C33 0.1UF 2 10V X5R 2 NC 4 6 OUT1_6 R72 2 1 System Clock Generation 1 RP6 10K 5% IDT5V9885 TQFP32 1 3 7_VDD 12_VDD 17_VDD 26_VDD 32_VDD 1 1 7 12 17 26 32 NC 23_AVDD 1 RP6 10K 5% C J13 32K10K-400E3 GND1 2 GND2 3 GND3 4 1 SIG GND4 5 GND5 6 GND6 7 GND7 8 GND19 GND212 GND315 GND414 GND517 NC 5NC_5 NC 7NC_7 NC 16NC_16 GND_SUPRCLK 1 2 SMA_DIFF_CLK_OUT_P SMA_DIFF_CLK_OUT_N U10 1 23 VDD_1313 VDD_88 Q_P11 Q_N10 VCC3V3 VCC3V3 J12 32K10K-400E3 GND1 2 GND2 3 GND3 4 1 SIG GND4 5 GND5 6 GND6 7 GND7 8 U12 47 5% 1 47 RP9 8 1% 2 CLK_N 47 2 CLKBUF_Q1_P CLKBUF_Q1_N To FPGA CLKBUF_Q2_P CLKBUF_Q2_N Q2_P15 Q2_N14 5% 2 SUPRCLK1_N0 2N0 SUPRCLK1_N1 3N1 SUPRCLK1_N2 4N2 SUPRCLK1_M0 19M0 SUPRCLK1_M1 20M1 SUPRCLK1_M2 21M2 SUPRCLK1_SEL1 17SEL1 SUPRCLK1_SEL0 16SEL0 CLKBUF_D0_P4 CLK_P CLKBUF_D0_N5 2 GND_CLKMUX Q1_P17 Q1_N16 47 5% 5% 5% 5% 5% 5% 5% 5% 5% 4.7K 4.7K 4.7K 4.7K 4.7K 4.7K 4.7K 4.7K 1 1 To MGT CLKBUF_Q0_C_P CLKBUF_Q0_C_N Q0_P20 Q0_N19 RP9 7 1 1% NC 84.5 REF_CLK24 VDD_1010 VDD_1818 8OE 3CLK_SEL 2CLK_EN 6PCLK_P 7PCLK_N 0 2 1 10 NC 18MSTR_RST 22REF_OE 2 SUPRCLK1_Q0_P SUPRCLK1_Q0_N 5% 5% 5% 9 5 6 7 8 5 6 7 8 SUPRCLK_OE 4.7K 6 RP5 4.7K 8 5% 7 5% 5% 4.7K 6 RP5 4.7K 6 RP5 5 4 3 2 1 4 3 2 1 Q0_P6 Q0_N7 27.4 1% R70 RP7 RP7 RP7 RP7 RP8 RP8 RP8 RP8 15TEST_CLK 1 124 R221 1 124 1% R223 VCCA9 R224 VCC_SUPRCLK VCC_SUPRCLK ICS8543 1% VCCA_SUPRCLK VCCO_CMOS1 11XTAL_OUT1 12XTAL_IN1 CLKMUX_SEL 4.75K VCC_SUPRCLK VCCO_PECL5 R220 SUPRCLK_TCLK 1 SUPRCLK_TCLK-R SUPRCLK1_SEL0-R 4 2 1 VCC10 RP9 6 RP9 5 14XTAL_IN0 13XTAL_OUT0 2 R69 2 5 SUPRCLK1_SEL1-R 5% 1 0.01UF 16V X7R VCC_CLKMUX 84.5 1% R222 SUPRCLK1_XTAL1_O SUPRCLK1_XTAL1_I SUPRCLK1_M2-R 3 GND_CLKMUX D ICS843001-21 SUPRCLK1_XTAL0_O SUPRCLK1_XTAL0_I SUPRCLK1_M1-R NC J11 32K10K-400E3 GND1 2 GND2 3 GND3 4 1 SIG GND4 5 GND5 6 GND6 7 GND7 8 4 3 2 1 CP21 0.1UF X5R 10V 4 3 2 1 CP20 X4 SUPRCLK1_M0-R 5% SMA_DIFF_CLK_IN_P SMA_DIFF_CLK_IN_N VCC_SUPRCLK 19.44MHZ OUT 4.7K 1 RP5 4.7K 1 RP5 4.7K 6 RP5 FERRITE-220 1 C30 0.1UF 2 10V X5R 2 1 2 1 2 1 1% R67 DNP 1% 1 C23 22PF 2 50V NPO R68 2 DNP C20 1 22PF 50V 2 NPO 1 C21 22PF 2 50V NPO C22 1 22PF 50V 2 NPO 1 SUPRCLK1_N2-R 2 1 C29 0.1UF 2 10V X5R FB8 ABLS SUPRCLK1_N1-R 5% 1 C28 0.1UF 2 10V X5R GND_SUPRCLK SUPRCLK1_N0-R 1 RP5 4.7K 1 RP5 1 C27 0.1UF 2 10V X5R AVDD_CLK RP6 10K 5% 1 A 1 C25 1 C26 0.1UF 10UF 2 10V 2 X5R X5R 10V GND_SUPRCLK 1 2 3 4 5 6 7 8 VCC3V3 VCC_CLKMUX FERRITE-220 OSC GND VCC3V3 FB7 X3 Diff Clocks: B VCC_SUPRCLK 5 25.5625MHZ 0 SDMX-8-X 6 FERRITE-220 VCC3V3 SW6 7 FB6 GND_SUPRCLK 16 15 14 13 12 11 10 9 8 2 110880 X5 C 5 ABLS VCC_SUPRCLK VCC_SUPRCLK Default to 25MHz 1 8 OE VCC 1 C24 0.1UF 2 10V X5R 4 6 GND_SUPRCLK 7 8 GND_SUPRCLK D J10 32K10K-400E3 GND1 2 GND2 3 GND3 4 1 SIG GND4 5 GND5 6 GND6 7 GND7 8 VCCA_SUPRCLK R66 10 5% FERRITE-220 1 1 2 VCC3V3 FB5 2 9 of Ver: A Rev: 02 Drawn By 27 BP 1 4 3 VCC2V5 VCC2V5 VCC2V5 2 VCC2V5 1 VCC3V3 10 RP10 6 120 5% GPIO_LED_3-F 2 DS13 GPIO_LED_3-R 1 1 GPIO_SW_N 2 P1 P4 P2 P3 North 4 3 D RP13 1 4.7K 2 5% SW10 LED-GRN-SMT LED-GRN-SMT 9 RP10 6 120 5% GPIO_LED_5-F DS12 GPIO_LED_5-R 1 2 8 RP10 6 120 5% GPIO_LED_6-F 2 DS11 GPIO_LED_6-R 1 LED-GRN-SMT 7 RP10 6 120 5% GPIO_LED_7-F 2 LED-GRN-SMT GPIO_LED_7-R 1 DS10 NC NC NC D NC 2 RP10 1 120 5% RP10 3 1 120 5% 4 RP10 1 120 5% RP10 5 1 120 5% GPIO LEDs and Buttons Pushbutton VCC3V3 West Center East Pushbutton 1 GPIO_SW_S GPIO_LED_3 GPIO_LED_5 GPIO_LED_6 GPIO_LED_7 2 P1 P4 P2 P3 4 3 RP13 1 4.7K 3 5% SW11 South 3 1 2 2 2 2 1 Q4 NDS331N 1 Q3 NDS331N Q2 NDS331N Q1 NDS331N 1 3 3 3 VCC3V3 Pushbutton 1 GPIO_SW_E 2 P1 4 P4 P2 3 P3 LEDs: 0 RP13 1 4.7K 5% 4 1 2 3 4 5 6 7 SW12 C C VCC3V3 Pushbutton CPLD_LED_0 CPLD_LED_1 CPLD_LED_2 CPLD_LED_4 1 GPIO_SW_W 2 P1 P4 P2 P3 4 3 Edge Drive Jog Encoder Switch RP13 1 4.7K 5 5% Edge Drive Jog Encoder SW13 3 SW2 RP13 6 4.7K 5% 7 ROTARY_ENCODER B 150 RP11 6 5% SW14 Silkscreen: CPU RESET Pushbutton CPLD_LED_C CPLD_LED_W CPLD_LED_E CPLD_LED_S CPLD_LED_N 1 2 2 1 P4 P2 P3 4 FPGA_CPU_RESET_B 3 SW7 TL3301EF100QG LED-GRN-SMT 2 1 LED-GRN-SMT DS24 1 2 LED-GRN-SMT DS23 2 1 LED-GRN-SMT DS21 2 1 150 5% 10 CPLD_LED_C-R GPIO - Buttons, LEDs, Switches Title: 6 9CPLD_LED_W-R 6 150 5% RP14 8CPLD_LED_E-R 150 5% RP14 6 150 5% RP14 7CPLD_LED_S-R 6 150 5% RP14 NC 5CPLD_LED_N-R 1 150 5% RP14 NC 3 4 1 150 5% RP14 5% 1 1 NC 2 MH2 150 5% RP14 MH1 RP14 10 MH3 SDMX-8-X 1 1 1 A P1 MH4 4.7K 9 8 4.7K 5% 6 RP12 4.7K 5% 6 RP12 7 4.7K 5% 6 RP12 5 4.7K 5% 1 RP12 4.7K 5% 6 RP12 4 3 MH5 1 2 MH8 1 1 RP12 4.7K 5% 1 RP12 4.7K 5% 1 RP12 16 15 14 13 12 11 10 9 1 1 2 3 4 5 6 7 8 DS20 SW8 LED-GRN-SMT DS22 VCC1V8 GPIO_DIP_SW1 GPIO_DIP_SW2 GPIO_DIP_SW3 GPIO_DIP_SW4 GPIO_DIP_SW5 GPIO_DIP_SW6 GPIO_DIP_SW7 GPIO_DIP_SW8 9 P3 FPGA_ROTARY_INCA 6 RP13 4.7K 5% P2 4 10 P4 6 RP13 4.7K 5% 10 CPLD_LED_0-R 9CPLD_LED_1-R 5% 150 5% RP11 6 150 150 RP11 6 5% 8CPLD_LED_2-R 7CPLD_LED_4-R RP11 6 150 5% 5DONE-R RP11 1 5% 150 2 P1 FPGA_ROTARY_INCB FPGA_ROTARY_PUSH 8 LED-GRN-SMT DS17 2 GPIO_SW_C 1 1 2 LED-GRN-SMT DS16 2 LED-GRN-SMT DS15 1 2 LED-GRN-SMT DS14 1 2 LED-GRN-SMT DS2 1 2 LED-GRN-SMT DS1 RP11 1 150 5% 4INIT_B-R 3BUSERR_1-R RP11 1 5% 150 RP11 1 B 1 VCC1V8 6 B 5 SW1B 4 SW2 3 SW1A 2 COM 1 A Pushbutton 1 1 2 LED-RED-SMT DS6 2 2BUSERR_2-R 1 LED-RED-SMT DS5 VCC3V3 6 RP13 4.7K 5% CPLD_FPGA_DONE CPLD_FPGA_INIT_B BUS_ERROR_1 BUS_ERROR_2 Mounting Holes GPIO Buttons, LEDs, Switches, GPIO SCHEM, ROHS COMPLIANT ML505/6/7 VIRTEX-5 EVALUATION PLATFORM, 1280415 0381241 A 1-22-2008_14:51 Date: Sheet Size: B Sheet 4 3 2 10 of Ver: A Rev: 02 Drawn By 27 BP 1 4 3 2 XGI Expansion Interface MICTOR 38 VCC3V3 HDR1_2 HDR1_4 NC FPGA_EXP_TMS FPGA_EXP_TCK EXPANSION_TDO FPGA_TDO GPIO_LED_N GPIO_SW_N GPIO_LED_C GPIO_SW_C GPIO_LED_W GPIO_SW_W GPIO_LED_S GPIO_SW_S GPIO_LED_E GPIO_SW_E GPIO_LED_0 GPIO_LED_1 GPIO_LED_2 GPIO_LED_4 NC NC IIC_SCL_EXP IIC_SDA_EXP HDR1_10 HDR1_12 HDR2_36_SM_15_P HDR2_34_SM_15_N HDR1_22 HDR1_24 HDR1_30 HDR1_32 HDR1_38 HDR1_40 HDR1_46 HDR1_48 HDR1_50 HDR1_52 VCC3V3 HDR1_58 HDR1_60 NDS331N Q8 B1 B2 B3 B4 B5 B6 B7 B8 B9 B10 B11 B12 B13 B14 B15 B16 B17 B18 B19 B20 B21 B22 B23 B24 B25 B26 B27 D HDR1_6 HDR1_8 TRC_TS6 TRC_TS5 TRC_TS4 TRC_TS3 TRC_TS2E TRC_TS1E TRC_TS2O TRC_TS1O MICTOR_22 MICTOR_20 MICTOR_18 MICTOR_16 HDR1_14 HDR1_16 HDR1_18 HDR1_20 HDR1_26 HDR1_28 HDR1_34 HDR1_36 VCC3V3 HDR1_42 HDR1_44 NC R82 TRC_VSENSE 0 HDR2_42_SM_14_N HDR2_44_SM_14_P NC NC 5% TRC_CLK NC NC HDR1_54 HDR1_56 38 36 34 32 30 28 26 24 22 20 18 16 14 12 10 8 6 4 2 37 35 33 31 29 27 25 23 21 19 17 15 13 11 9 7 5 3 1 MICTOR_37 MICTOR_35 MICTOR_33 MICTOR_31 MICTOR_29 MICTOR_27 MICTOR_25 MICTOR_23 CPU_TRST FPGA_CS0_B CPU_TMS CPU_TCK NC CPU_TDO NC PC4_HALT_B MICTOR_5 NC NC C HDR1_62 HDR1_64 1 3 2 IIC_SCL_MAIN J16 NDS331N Q9 IIC_SDA_MAIN FPGA_CS0_B (CPU TDI) NC CPU_TMS J6 PC4_HALT_B VCC2V5 VCC3V3 VCCO_EXP 2 NC 3 4 5 6 7 8 NC 5% 10K 5% RP15 6 NC 10 1 B 10K 332 1% RP15 6 NC 9 6 5% RP15 2 7 1 10K R91 5% 10K 5% RP15 6 8 J51 CPU_TDO CPU_TCK BDM 10K 10K 5% RP15 1 5 VCC3V3 10K 5% RP15 1 VCC3V3 4 2 1 3 RP15 VCC2V5 10K 5% RP15 3 1 HDR1_2 HDR1_4 HDR1_6 HDR1_8 HDR1_10 HDR1_12 HDR1_14 HDR1_16 HDR1_18 HDR1_20 HDR1_22 HDR1_24 HDR1_26 HDR1_28 HDR1_30 HDR1_32 HDR1_34 HDR1_36 HDR1_38 HDR1_40 HDR1_42 HDR1_44 HDR1_46 HDR1_48 HDR1_50 HDR1_52 HDR1_54 HDR1_56 HDR1_58 HDR1_60 HDR1_62 HDR1_64 HDR1x32 J7 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 2 2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40 42 44 46 48 50 52 54 56 58 60 62 64 Matched Length Traces Independent signals B A1 A2 A3 A4 A5 A6 A7 A8 A9 A10 A11 A12 A13 A14 A15 A16 A17 A18 A19 A20 A21 A22 A23 A24 A25 A26 A27 P22 G5 G4 G3 G2 G1 NC J4 1 3 5 7 9 11 13 15 17 19 21 23 25 27 29 31 33 35 37 39 41 43 45 47 49 51 53 55 57 59 61 63 SOFTTOUCH PRO FULL 2 HDR2_2_SM_8_N HDR2_4_SM_8_P HDR2_6_SM_7_N HDR2_8_SM_7_P HDR2_10_DIFF_0_N HDR2_12_DIFF_0_P HDR2_14_DIFF_1_N HDR2_16_DIFF_1_P HDR2_18_DIFF_2_N HDR2_20_DIFF_2_P HDR2_22_SM_10_N HDR2_24_SM_10_P HDR2_26_SM_11_N HDR2_28_SM_11_P HDR2_30_DIFF_3_N HDR2_32_DIFF_3_P HDR2_34_SM_15_N HDR2_36_SM_15_P HDR2_38_SM_6_N HDR2_40_SM_6_P HDR2_42_SM_14_N HDR2_44_SM_14_P HDR2_46_SM_12_N HDR2_48_SM_12_P HDR2_50_SM_5_N HDR2_52_SM_5_P HDR2_54_SM_13_N HDR2_56_SM_13_P HDR2_58_SM_4_N HDR2_60_SM_4_P HDR2_62_SM_9_N HDR2_64_SM_9_P MICTR38P_REC VCC5 1 2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40 42 44 46 48 50 52 54 56 58 60 62 64 Mictor SoftTouch Pro 1 C 1 3 5 7 9 11 13 15 17 19 21 23 25 27 29 31 33 35 37 39 41 43 45 47 49 51 53 55 57 59 61 63 Matched Length Traces Differential Pairs D HDR1x32 J5 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 1 CPU_TRST CPU_VCC 9 10 NC 11 12 NC NC 13 14 NC NC 15 16 XGI - Expansion Connector J15 J20 1 3 5 Mark Pin 1 2 4 6 Pin 14 must be removed. Title: A A 1-22-2008_14:51 Date: Bank 11/13 Expansion Connector Voltage 1-3 & 2-4 = 3.3V 3-5 & 4-6 = 2.5V 4 XGI - Expansion Headers SCHEM, ROHS COMPLIANT ML505/6/7 VIRTEX-5 EVALUATION PLATFORM, 1280415 0381241 Sheet Size: B Sheet 3 2 11 of Ver: A Rev: 02 Drawn By 27 BP 1 3 1 CONN_MS_DATA 2 NC 3 1 LCD_CPLD_E LCD_CPLD_RS 5% 4.7K RP22 5% 4.7K RP22 3 2 1 5% 4.7K RP21 4.7K 3 1 NC 1 2 5% 4.7K RP22 8 RP22 7 1 5% 4.7K MOUSE_CLK 1 2 1 NDS331N Q13 FB13 CONN_MS_DATA 3 MOUSE_DATA 2 FERRITE-220 1 C45 1 C46 470PF 470PF 2 50V 2 50V X7R X7R 1/2W 20% LCD Standoffs Silkscreen: "LCD Contrast" 3 3 FERRITE-220 1% R86 0-2K 2 RP21 8 5 2 SH4 SH3 SH2 SH1 1 3 6 VCC5_PS2 6.81K To CPLD To CPLD NC NC NC 6 MH7 LCD_CPLD_DB6 LCD_CPLD_DB4 NC NC LCD_CPLD_RW LCD_VEE 2 4 6 8 10 12 14 6 R85 1 3 5 7 9 11 13 NDS331N Q14 FB12 CONN_MS_CLK J8 LCD_CPLD_DB7 LCD_CPLD_DB5 RP21 C VCC5 MH6 VCC5 CONN_MS_CLK VCC5 1 2 Silkscreen: "Mouse" P3 DB9M NC 2 P5 6 5 1 VCC5_PS2 6 DCD 2 KEYBOARD_DATA VCC1V8 RXD 4 C 5% NC6 VCC NC2 SH4 SH3 SH2 SH1 DATA GND CLK NC TXD 3 DSR_DTR_DCD1 Silkscreen: "Serial " "Port 1" "(FPGA)" DTR 4 H-2X5 CTS_RTS1B GND2 GND 5 2 1 C43 1 C44 470PF 470PF 2 50V 2 50V X7R X7R HDR1x5 J26 DSR 6 3 FERRITE-220 8 2 4 6 8 10 CONN_KBD_DATA 5% 1 3 5 7 9 15 TSOP65P640X500-16 NDS331N Q12 RTS CTS_RTS17 J60 ADM3202ARUZ KEYBOARD_CLK FB11 4.7K DSR_DTR_DCD1B 2 FERRITE-220 NC6 VCC NC2 SH4 SH3 SH2 SH1 DATA GND CLK 1 C39 0.1UF 2 10V X5R VCC5_PS2 FB10 FERRITE-220 CTS 8 C2+ C2- GND UART_C2- RI 9 NC 4 5 UART_C2+ J62 VCC5 UART_TXD UART_RXD 2 7 8 RP21 T2OUT R2IN 2 T2IN R2OUT 3 2 10 9 NDS331N Q11 FB14 CONN_KBD_CLK 1 FPGA_SERIAL1_TX FPGA_SERIAL1_RX UART_T1O UART_R1I 1 14 13 1 T1OUT R1IN 1 T1IN R1OUT 8 5 2 SH4 SH3 SH2 SH1 1 3 6 11 12 NC NC UART2_SOUT UART2_SIN CONN_KBD_CLK H-2X5 CTS_RTS2 UART_V- D VCC5 5 NC V+ V- UART_V+ 11 C1+ C1- 2 6 4 10 16 3V3 4.75K To FPGA 3 2 1 3 1 C42 0.1UF 2 10V X5R GND3 1% 1% 4.75K R84 R83 3 2 1 2 U13 2 4 6 8 10 Silkscreen: "Keyboard" P4 1 1 C38 0.1UF 2 10V UART_C1+ X5R UART_C1- 1 3 5 7 9 VCC5_PS2 1 1 C41 0.1UF 2 10V X5R 1 VCC1V8 3 J61 1 1 PS/2 Mouse 1 To USB VCC3V3 2 To FPGA 1 C40 0.1UF 2 10V X5R USB_SERIAL_TX USB_SERIAL_RX FPGA_SERIAL2_TX FPGA_SERIAL2_RX NC DSR_DTR_DCD2 1 2 CONN_KBD_DATA 2 1 Silkscreen: "Serial Port Select" "1-2: FPGA" "2-3: USB Host" J63 1 7 VCC3V3 D HDR1x5 J25 Silkscreen: "Serial Port 2" "(FPGA/USB)" VCC3V3 1 5% DTE (Serial Host) 2 4.7K 4 LCD Header VCC3V3 VCC3V3 VCC3V3 VCC5 1% 5% 0 R90 8 4 M24C08-WDW6TP R88 2 1% SMB_DX_N Misc - LCD, PS2, UART, Fan Controller VCC1V8 D2 5% Title: 4.7K 5% 4.7K RP22 NC 10 5% 4.7K RP22 9 NC 5% 4.7K RP22 5 4 NC NC RP22 5% 4.7K 5% 4.7K RP21 NC 10 5% 4.7K RP21 9 NC 5% 4.7K RP21 RP21 4 5 NC 0 DT 1 J32 3 2 J31 1 3 6 6 1 1 1 C49 X5R 2 10V 0.1UF 6 VCC3V3 Q10 Silkscreen: "Fan Override" 6 4 LCD, PS2, UART, IIC EEPROM, IIC Fan Controller SCHEM, ROHS COMPLIANT ML505/6/7 VIRTEX-5 EVALUATION PLATFORM, 1280415 0381241 A 1-22-2008_14:55 Date: Sheet Size: B Sheet 4 VCC GND C47 X5R 2 10V 0.1UF 1 IIC Address = 0x50 1 1 A0 A1 A2 WP VCC3V3 C48 DNP 1 D5 KEYED_H-1X3 Silkscreen: "Fan Power" Pin 2: "+" Pin 3: "-" 2 BZX84C15 3.3V 250MW 1 4.75K S NC 1 2 3 7 3 2 DNP 1% SMB_DX_P NC NC VCC5 FAN_CNTRL_TACH1 A SCL SDA FAN_CNTRL_GPIO4 ADT7476 U14 2 NDS331N Q15 2 VCC3V3 U15 6 5 B G 1 3 1 VCC5 NC 1 2 R87 DNP 1% VCCINT VCC1V8 2 1 FAN_ALERT_B 1 2 IIC_SCL_MAIN IIC_SDA_MAIN NC FAN_ALERT_B-F PWM1/XTO24 VCCP23 2.5VIN/THERM_N22 12VIN/VID521 +5VIN20 VID4/GPIO419 D1_P18 D1_N17 D2_P16 D2_N15 GPIO6/MULTI14 PWM3/ADDREN_B13 IIC EEPROM 2 VCC1V8 9 RP20 2 RP20 3 RP20 5 RP20 4 RP20 7 RP20 8 RP20 10 RP20 FLASH_AUDIO_RESET_B FAN_CNTRL_GPIO1 FAN_CNTRL_GPIO2 FAN_CNTRL_GPIO3 1SDA 2SCL 3GND 4VCC 5VID0/GPIO0 6VID1/GPIO1 7VID2/GPIO2 8VID3/GPIO3 9TACH3 10PWM2/ALERT_B 11TACH1 12TACH2 2 4.75K R97 1.0K 1 IIC Address = 0x2C IIC_SDA_MAIN IIC_SCL_MAIN 1 R89 6 5% 6 1.0K 5% 6 1.0K 5% 6 5% 1.0K 1.0K 1 5% 5% 1 1.0K 5% 1 1.0K 1 1.0K VCC3V3 5% IIC Fan controller B VCC3V3 3 2 12 of Ver: A Rev: 02 Drawn By 27 BP 1 NC NC NC NC NC NC NC Silkscreen: "DDR2 SO-DIMM" DDR2_DQS0_N DDR2_DQS0_P DDR2_DQS1_N DDR2_DQS1_P DDR2_DQS2_N DDR2_DQS2_P DDR2_DQS3_N DDR2_DQS3_P DDR2_DM[0:7] DDR2_D[0:63] 2 Title: Sheet Date: 13 of 6 5 3 4 RP30 RP30 DDR2_D[0:63] 1 C66 NPO 2 50V 5.0PF 1 1-22-2008_14:51 Sheet Size: B 27 1 5% 5% 2 47 47 NC NC NC NC 1 4.75K 1 4.7K 4.7K 4.7K 4.7K 1% 1% 5% 7 5% 8 5% 9 5%10 RP31 RP31 1 1 VTTDDR 6 6 6 6 RP31 RP31 RP31 RP31 2 NC NC 2 4.75K R96 VCC1V8 P2 R95 4 5 VTTDDR SDA195 SCL197 SA0198 SA1200 5% 5% 2.5V TANT 4.7K 4.7K 2 DDR2_ODT0 DDR2_ODT1 RP29 RP30 1 1 C64 330UF 8 8 1 ODT0114 ODT1119 5% 5% 47 47 1 DDR2_CS0_B DDR2_CS1_B RP26 RP25 RP27 RP25 RP27 RP30 1 3 1 4 4 2 0.1UF X5R 10V CP40 0.1UF X5R 10V CP39 0.1UF X5R 10V CP38 C63 X5R 2 10V 10UF 8 6 8 5 5 7 RP29 RP26 RP28 RP26 RP28 RP28 RP26 RP29 RP28 RP29 RP25 RP27 RP25 RP27 2 2 1 3 3 2 4 4 4 3 1 2 2 3 0.1UF X5R 10V CP32 0.1UF X5R 10V CP31 1 C62 0.1UF 2 10V X5R S0_B110 S1_B115 5% 5% 5% 5% 5% 5% 47 47 47 47 47 47 7 7 8 6 6 7 5 5 5 6 8 7 7 6 4 3 2 1 4 3 2 1 4 3 2 1 4 3 2 1 4 3 2 1 VCC1V8 DDR2_BA2 DDR2_BA1 DDR2_BA0 DDR2_RAS_B DDR2_WE_B 5% 5% 5% 5% 5% 5% 5% 5% 5% 5% 5% 5% 5% 5% RP31 RP31 1 1 VTTVREF 47 47 47 47 47 47 47 47 47 47 47 47 47 47 2 3 1 C68 0.01UF 2 16V X7R 5% 5% Place Near pin 1 of P2 DDR2_CAS_B C67 NPO 2 50V 5.0PF DDR2_A13 DDR2_A12 DDR2_A11 DDR2_A9 DDR2_A8 DDR2_A7 DDR2_A6 DDR2_A5 DDR2_A4 DDR2_A3 DDR2_A2 DDR2_A1 DDR2_A0 DDR2_A10 4.7K 4.7K 0.1UF X5R 10V CP36 0.1UF X5R 10V CP35 VTTDDR BA285 BA1106 BA0107 RAS_B108 WE_B109 CAS_B113 DDR2_CKE1 DDR2_CKE0 4 3 2 1 4 3 2 1 0.1UF X5R 10V CP30 1 C61 0.1UF 2 10V X5R A13116 A1289 A1190 A991 A893 A792 A694 A597 A498 A399 A2100 A1101 A0102 A10/AP105 VCC1V8 1 C60 0.1UF 2 10V X5R CKE180 CKE079 VTTVREF DDR2_CLK1_P DDR2_CLK1_N DDR2_DQS7_P DDR2_DQS7_N DDR2_DQS6_P DDR2_DQS6_N DDR2_DQS5_P DDR2_DQS5_N DDR2_DQS4_P DDR2_DQS4_N DDR2_CLK0_P DDR2_CLK0_N DDR2_DM[0:7] CK1_P164 CK1_N166 DDR2_D58 DDR2_D59 DDR2_D62 DDR2_D63 DDR2_DM7 DDR2_DQS7_N DDR2_DQS7_P DDR2_D56 DDR2_D60 DDR2_D57 DDR2_D61 DDR2_D50 DDR2_D54 DDR2_D51 DDR2_D55 DDR2_DQS6_N DDR2_DQS6_P DDR2_DM6 DDR2_D48 DDR2_D52 DDR2_D49 DDR2_D53 DDR2_D42 DDR2_D46 DDR2_D43 DDR2_D47 DDR2_DM5 DDR2_DQS5_N DDR2_DQS5_P DDR2_D44 DDR2_D40 DDR2_D45 DDR2_D41 DDR2_D38 DDR2_D34 DDR2_D39 DDR2_D35 DDR2_DM4 DDR2_DQS4_N DDR2_DQS4_P DDR2_D32 DDR2_D36 DDR2_D33 DDR2_D37 4 3 2 1 1 CK0_P30 CK0_N32 VDD1103 VDD2111 VDD3117 VDD481 VDD587 VDD695 VDD7104 VDD8112 VDD9118 VDD1082 VDD1188 VDD1296 VREF1 VDDSPD199 DQ58189 DQ59191 DQ62192 DQ63194 DM7185 DQS7_N186 DQS7_P188 DQ56179 DQ60180 DQ57181 DQ61182 DQ50173 DQ54174 DQ51175 DQ55176 DQS6_N167 DQS6_P169 DM6170 DQ48157 DQ52158 DQ49159 DQ53160 DQ42151 DQ46152 DQ43153 DQ47154 DM5147 DQS5_N146 DQS5_P148 DQ44140 DQ40141 DQ45142 DQ41143 DQ38134 DQ34135 DQ39136 DQ35137 DM4130 DQS4_N129 DQS4_P131 DQ32123 DQ36124 DQ33125 DQ37126 0.1UF X5R 10V CP34 3 69NC8 83NC3 163NC7 50NC6 120NC4 84NC2 86NC1 3VSS1 9VSS2 15VSS3 21VSS4 27VSS5 33VSS6 39VSS7 41VSS8 47VSS9 121VSS10 127VSS11 133VSS12 139VSS13 145VSS14 149VSS15 53VSS16 59VSS17 65VSS18 71VSS19 77VSS20 155VSS21 161VSS22 165VSS23 171VSS24 177VSS25 183VSS26 187VSS27 193VSS28 2VSS29 8VSS30 12VSS31 18VSS32 24VSS33 28VSS34 34VSS35 40VSS36 42VSS37 48VSS38 122VSS39 128VSS40 132VSS41 138VSS42 144VSS43 150VSS44 54VSS45 60VSS46 66VSS47 72VSS48 78VSS49 156VSS50 162VSS51 168VSS52 172VSS53 178VSS54 184VSS55 190VSS56 196VSS57 73DQ26 74DQ30 75DQ27 76DQ31 67DM3 68DQS3_N 70DQS3_P DDR2_DM3 DDR2_DQS3_N DDR2_DQS3_P DDR2_D26 DDR2_D30 DDR2_D27 DDR2_D31 61DQ24 62DQ28 63DQ25 64DQ29 DDR2_D24 DDR2_D28 DDR2_D25 DDR2_D29 55DQ18 56DQ22 57DQ19 58DQ23 49DQS2_N 51DQS2_P 52DM2 DDR2_DQS2_N DDR2_DQS2_P DDR2_DM2 DDR2_D18 DDR2_D22 DDR2_D19 DDR2_D23 43DQ16 44DQ20 45DQ17 46DQ21 DDR2_D16 DDR2_D20 DDR2_D17 DDR2_D21 35DQ10 36DQ14 37DQ11 38DQ15 26DM1 29DQS1_N 31DQS1_P DDR2_DM1 DDR2_DQS1_N DDR2_DQS1_P DDR2_D10 DDR2_D14 DDR2_D11 DDR2_D15 20DQ12 22DQ13 23DQ8 25DQ9 14DQ6 16DQ7 17DQ2 19DQ3 10DM0 11DQS0_N 13DQS0_P DDR2-SO-DIMM 4DQ4 5DQ0 6DQ5 7DQ1 DDR2_D12 DDR2_D13 DDR2_D8 DDR2_D9 DDR2_D6 DDR2_D7 DDR2_D2 DDR2_D3 DDR2_DM0 DDR2_DQS0_N DDR2_DQS0_P DDR2_D4 DDR2_D0 DDR2_D5 DDR2_D1 4 3 2 5 6 7 8 3 5 C58 X5R 2 10V 10UF 6 1 7 1 C57 0.1UF 2 10V X5R C53 X5R 2 10V 10UF 8 1 C56 0.1UF 2 10V X5R 1 C52 0.1UF 2 10V X5R 5 5 6 7 8 1 C55 0.1UF 2 10V X5R 1 C50 0.1UF 2 10V X5R 6 1 C51 0.1UF 2 10V X5R 7 8 5 6 7 8 5 6 7 B 5 6 8 5 6 4 7 8 5 A 7 8 C 6 D 7 8 1 4 1 VCC1V8 D VCC1V8 DDR2_CLK0_P DDR2_CLK0_N DDR2_CLK1_P DDR2_CLK1_N DDR2_CKE1 DDR2_CKE0 DDR2_BA2 DDR2_BA1 DDR2_BA0 DDR2_RAS_B DDR2_WE_B DDR2_CAS_B DDR2_CS0_B DDR2_CS1_B DDR2_ODT0 DDR2_ODT1 Ver: A Rev: 02 C DDR2_SDA DDR2_SCL VTTDDR B DDR2 SO-DIMM DDR2 SO-DIMM SCHEM, ROHS COMPLIANT ML505/6/7 VIRTEX-5 EVALUATION PLATFORM, 1280415 0381241 A Drawn By BP 4 3 2 1 VCC2V5 1% 7TD3_P NC NC SCLK_P SCLK_N NC NC SIN_P113 SIN_N112 SGMII_TX-C_P SGMII_TX-C_N SOUT_P107 SOUT_N105 SGMII_RX-C_P SGMII_RX-C_N MDIP3_CAP MDIP2_CAP 1 C75 0.01UF 2 X7R 16V 1 C76 0.01UF 2 X7R 16V 1 2 3 MDIP1_CAP 9VCC 10GND MDIP0_CAP 1 C77 0.01UF 2 X7R 16V 111 LED_LINK10 110 LED_LINK100 101 LED_LINK1000 100 LED_DUPLEX 011 LED_RX 010 LED_TX 001 GND 000 D SH2SH2 SH1SH1 RJ45 1 C79 0.01UF 2 X7R 16V VCC2V5 P6 FB21 2 SCLK_P110 SCLK_N109 PHY_HSDACP PHY_HSDACN 4 8TD3_N 1 HSDAC_P53 HSDAC_N54 10/100/1000 RJ45 AND MAGNETICS 124RXD4 123RXD5 121RXD6 120RXD7 PHY_MDIP3_P PHY_MDIN3_N 5TD2_N 8 RP33 47 5% PHY_RXD4 PHY_RXD5 PHY_RXD6 PHY_RXD7 MDI3_P61 MDI3_N62 4TD2_P 7 RP33 47 5% 3RXD0 128RXD1 126RXD2 125RXD3 PHY_MDIP2_P PHY_MDIN2_N 6 RP33 47 5% PHY_RXD0 PHY_RXD1 PHY_RXD2 PHY_RXD3 MDI2_P56 MDI2_N57 6TD1_N 5 RP33 47 5% 7RXCLK 8RXER 4RXDV PHY_MDIP1_P PHY_MDIN1_N 4 PHY_RXCLK PHY_RXER PHY_RXCTL_RXDV MDI1_P46 MDI1_N47 Bit [2:0] Pin 3TD1_P 5 RP32 47 5% 4.99K 1% 2 PHY_MDIP0_P PHY_MDIN0_N 3 2 5% 4.7K R102 RP34 1 PHY_RESET PHY_RSET PHY_CRS PHY_COL MDI0_P41 MDI0_N42 6 RP32 47 5% 31CLK125 32INT_B 37COMA 36RESET_B 39RSET 115CRS 114COL PHY_INT PHY_COMA 1 33MDIO 35MDC 2 NC Pin to Constant Mapping 1TD0_P 2TD0_N 7 RP32 47 5% 2 1 D 2 4.75K PHY_MDIO PHY_MDC The PHY MDIP Pins below are Media Dependent Interface Pins (MDIP), and are all bidirectional pins. 1 4.75K R101 R100 1 8 RP32 47 5% 1% PHY_AVDD0 FERRITE-220 NC 50NC_50 VCCINT VCC2V5 PHY_AVDD0 5 6 7 8 5 6 7 8 B 71VDDOX_71 34VDDOX_34 0.1UF X5R 10V 4 3 CP51 2 1 4 3 2 1 CP50 0.1UF X5R 10V VCC2V5 94VSS_94 93VSS_93 84VSS_84 83VSS_83 66VSS_66 65VSS_65 63VSS_63 60VSS_60 58VSS_58 55VSS_55 51VSS_51 48VSS_48 45VSS_45 43VSS_43 40VSS_40 38VSS_38 22VSS_22 21VSS_21 15VSS_15 9VSS_9 1VSS_1 VCCINT VCC2V5 PHY_AVDD0 0.01UF 16V X7R 4 3 CP53 2 1 0.01UF 16V X7R 4 3 2 CP52 1 5 6 7 8 5 6 7 8 VCC2V5 A 1 C80 10UF 2 X5R 10V 1 C81 10UF 2 X5R 10V 122VDDO_122 30VDDO_30 11VDDO_11 5VDDO_5 1 C82 1000PF 2 50V X7R 1 C83 1000PF 2 50V X7R LED-GRN-SMT DS32 1 PHY_CONFIG0 VCC2V5 2 LED-GRN-SMT DS33 1 CONFIG088 CONFIG187 CONFIG286 CONFIG382 CONFIG481 CONFIG580 CONFIG679 2 2 LED-GRN-SMT DS34 1 2 LED-GRN-SMT DS35 PHY_CONFIG4 PHY_CONFIG5 PHY_LED_RX 1 2 PHY_LED_LINK100-R PHY_LED_LINK1000-R PHY_LED_DUPLEX-R PHY_LED_RX-R PHY_LED_TX-R NC AVDD_104104 AVDD_6464 AVDD_5959 AVDD_5252 AVDD_4949 AVDD_4444 NC PHY_AVDD0 VDDOH_8989 VDDOH_9797 VDDOH_7373 RP35 3 150 5% 1 RP35 4 150 5% 1 RP35 5 150 5% 1 "100" C J22, J23 pins 1-2: GMII/MII to Cu J22, J23 pins 2-3: SGMII to Cu, no clk J22 pins 1-2, J24 ON: RGMII, modified MII in Cu "1000" VCC2V5 "DUP" RP35 7 150 5% 6 RP35 8 150 5% 6 RP35 9 150 5% 6 RP35 10 150 5% 6 VCC2V5 J22 1 VCC2V5 J23 PHY_CONFIG4 1 1 PHY_CONFIG5 2 2 PHY_LED_LINK10 3 3 "RX" "TX" 2 PHY_CONFIG0 PHY_LED_DUPLEX 1 2 PHY_LED_LINK1000 Pin Bit[2] Bit[1] Bit[0] CFG0 PHYADR[2] PHYADR[1] PHYADR[0] 000 CFG1 ENA_PAUSE PHYADR[4] PHYADR[3] 000 CFG2 ANEG[3] ANEG[2] ANEG[1] 111 CFG3 ANEG[0] ENA_XC DIS_125 111 CFG4 HWCFG_MD[2] HWCFG_MD[1] HWCFG_MD[0] 111 CFG5 DIS_FC DIS_SLEEP HWCFG_MD[3] 111 CFG6 SEL_BDT INT_POL 75/50 OHM 010 VCC2V5 DVDD_118118 DVDD_117117 DVDD_9696 DVDD_9090 DVDD_8585 DVDD_7878 DVDD_2727 DVDD_2323 DVDD_1717 DVDD_1212 DVDD_66 DVDD_22 VCCINT VSS_127127 VSS_119119 VSS_116116 VSS_111111 VSS_108108 VSS_106106 VSS_103103 VSS_102102 VSS_101101 B PHYAddr "00111". Don't advertise the PAUSE bit Auto-Neg en, advertise all caps; prefer slave. Auto crossover enabled. 125 CLK option disabled. GMII to Cu mode. Fiber/copper autodetect diasabled. Sleep mode disabled. MDC/MDIO selected. Active LOW interrupt 50Ohm SERDES option. 10/100/1000 PHY VCCINT VCC2V5 PHY_AVDD0 FB20 1 C70 10UF 2 X5R 10V VSSC_7474 M88E1111 U16 1 C71 1000PF 2 50V X7R 1 C72 1000PF 2 50V X7R FERRITE-220 1 C73 10UF 2 X5R 10V 1 C74 1000PF 2 50V X7R Title: 10/100/1000 PHY SCHEM, ROHS COMPLIANT ML505/6/7 VIRTEX-5 EVALUATION PLATFORM, 1280415 0381241 A 1-22-2008_14:51 Date: Sheet Size: B Sheet 4 5% 1 LED Silkscreen "10" 5% 1 0 PHY_LED_DUPLEX PHY_LED_RX PHY_LED_TX LED-GRN-SMT DS31 PHY_LED_LINK10-R R104 LED_DPLX95 LED_RX92 LED_TX91 2 1% PHY_LED_LINK10 PHY_LED_LINK100 PHY_LED_LINK1000 1 VCC2V5 RP35 2 150 DNP LED_LINK10100 LED_LINK10099 LED_LINK100098 LED-GRN-SMT DS30 2 CLK_25MHZ_ENET NC J24 XTAL176 XTAL275 R103 NC NC 67TDI 69TMS 68TRST_B 72TDO 70TCK NC 1 6 4.7K 5% 6 NC NC SEL_OSC77 1 25TXD4 26TXD5 28TXD6 29TXD7 8 PHY_TXD4 PHY_TXD5 PHY_TXD6 PHY_TXD7 5% 18TXD0 19TXD1 20TXD2 24TXD3 7 PHY_TXD0 PHY_TXD1 PHY_TXD2 PHY_TXD3 4.7K RP34 5 5% 1 4.7K RP34 4 5% 4.7K RP34 1 3 1 4.7K RP34 5% NC 9 5% 4.7K RP34 5% 4.7K RP34 6 6 RP34 10 NC C 14GTXCLK 10TXCLK 13TXER 16TXEN 2 PHY_TXC_GTXCLK PHY_TXCLK PHY_TXER PHY_TXCTL_TXEN 3 2 14 of Ver: A Rev: 02 Drawn By 27 BP 1 4 3 2 1 DVI_D0_N DVI_D0_P Near U13 DVI_D1_N DVI_D1_P To DVI Connector DVI_D2_N DVI_D2_P D VCC5 TPS73633DBVT 1 2 3 1 C102 1UF 2 10V X5R IN DVI_CLK_P DVI_CLK_N OUT 5 DVI_VCCA DVI_HPDET GND 1 C103 EN NR_FB 2 C104 1 0.01UF 2 X7R 16V U18 DVI_HSYNC DVI_VSYNC DVI_RED DVI_GREEN DVI_BLUE 4 DNP D 1% 38 37 39 R116 1 R117 45 3 2 1 C106 0.1UF 2 10V X5R C VCC3V3 2 1 R G B 48 47 9 30 31 24 25 27 28 DVDDV VREF R111 100 4.75K XCLK_N XCLK_P 2 1% 56 57 HSYNC VSYNC RESET_B DVI_XCLK_N DVI_XCLK_P HPDET 13 TLC_P TLC_N DVI_RESET_B D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0 TDC2_N TDC2_P 50 51 52 53 54 55 58 59 60 61 62 63 1 4.75K 1 12 49 DGND0 DGND2 DGND3 6 11 64 TVDD1 TVDD2 23 29 TGND1 TGND2 TGND3 20 26 32 AVDD 18 FB30 DVI_DVDD 2 DVDD1 DVDD2 DVDD3 1 C DVI_D11 DVI_D10 DVI_D9 DVI_D8 DVI_D7 DVI_D6 DVI_D5 DVI_D4 DVI_D3 DVI_D2 DVI_D1 DVI_D0 TDC1_N TDC1_P GND_VIDEO TDC0_N TDC0_P 21 22 VCC3V3 FERRITE-220 C90 1 0.1UF 2 10V X5R C91 1 0.1UF 2 10V X5R C92 1 0.1UF 2 10V X5R 1 C93 10UF 2 X5R 10V 1% VCC3V3 VCC1V8 DVI_DE DVI_H DVI_V 2 4 5 DE H V 1 2 FB31 DVI_TVDD FERRITE-220 C94 1 0.1UF 2 10V X5R C95 1 0.1UF 2 10V X5R 1 C96 10UF 2 X5R 10V 1 VCC3V3 1% NC 33 DVI_VDD 2 2 FB33 DVI_VCCA FERRITE-220 ISET 1 VDD B U17 CH7301C-TF GND1 GND2 1% 1% 2 1 R115 2 140 R114 1 2 34 40 1 C100 0.1UF 2 10V X5R 1 C101 10UF 2 X5R 10V FB34 2 GPIO1 GPIO0 AS 17 1 7 8 10 AGND2 1 DVI_GPIO1-F NC0 NC1 NC2 NC3 NC4 NC5 NC6 SPD SPC DVI_AS DVI_VCCA 1 C98 10UF 2 X5R 10V FERRITE-220 16 36 41 42 43 44 46 1% 14 15 C97 1 0.1UF 2 10V X5R GND_VIDEO VGA Out Codec NC NC NC NC NC NC NC 2 3 Q18 NDS331N DVI_GPIO1 2 2.43K NDS331N Q16 2 IIC_SDA_VIDEO-F IIC_SCL_VIDEO-F VSWING 3 19 2 DVI_AVDD FERRITE-220 35 IIC_SCL_VIDEO 1 2.43K 1 R110 NDS331N Q17 1 2.43K R113 1 1% 3 2.43K R112 To FPGA B 2 1 FB32 IIC_SDA_VIDEO Title: GND_VIDEO A IIC Address = 0x76 VGA Out Codec SCHEM, ROHS COMPLIANT ML505/6/7 VIRTEX-5 EVALUATION PLATFORM, 1280415 0381241 A 1-22-2008_14:51 Date: Sheet Size: B Sheet 4 3 2 15 of Ver: A Rev: 02 Drawn By 27 BP 1 4 3 2 1 VCC5 2 2 D FERRITE-220 D10 3 VCC5 2 1 C123 X7R 2 50V 270PF NDS331N Q20 1 D BAS40-04 200MA 40V 1 To IIC DVI Bus 2 IIC_CLK_DVI-F 3 1 2 2.43K 1% FB48 IIC_SCL_VIDEO-F 1 R119 1 R118 1 2.43K 1% VCC3V3 FB49 IIC_SDA_DVI-F 3 2 2 FERRITE-220 VCC5 DVI_CONN 3 1 D11 2 1 C124 X7R 2 50V 270PF NDS331N Q21 1 IIC_SDA_VIDEO-F BAS40-04 200MA 40V 6 7 R120 1.21K 1% 3 1 D12 BAS40-04 200MA 40V FB40 3 VCC3V3 D13 2 1 1 2 DVI_HSYNC 1 C111 NPO 2 50V 22PF 17 18 DATA0_N DATA0_P DVI_D1_N DVI_D1_P 9 10 DATA1_N DATA1_P BAS40-04 200MA 40V GND_VIDEO DVI_D2_N DVI_D2_P VCC5 VCC5 1 2 DATA2_N DATA2_P NC NC 12 13 DATA3_N DATA3_P NC NC 4 5 DATA4_N DATA4_P NC NC 20 21 DATA5_N DATA5_P DVI_CLK_P DVI_CLK_N 23 24 DVI_CONN_HPDET To Video Codec C FERRITE-220 DVI_D0_N DVI_D0_P VCC5 2 1 C110 X5R 2 10V 0.1UF 1 2 DVI_HPDET To Video Codec DDC_CLK DDC_DATA 1 C122 X5R 2 10V 0.1UF SHIELD_CLK SHIELD_0/5 SHIELD_1/3 SHIELD_2/4 22 19 11 3 GND0 15 CLK_P CLK_N AGND0 AGND1 C5 C6 16 HPDET SH_GND1 SH_GND2 25 26 DVI_CONN_HSYNC DVI_CONN_VSYNC C4 8 HS VS DVI_CONN_RED DVI_CONN_GREEN DVI_CONN_BLUE C1 C2 C3 RED GREEN BLUE FB41 1 3 VCC3V3 D14 BAS40-04 200MA 40V DVI_RED_TMP C GND_VIDEO 2 1 C112 NPO 2 50V 22PF 1 2 DVI_VSYNC FERRITE-220 14 GND_VIDEO 330MA 5% 1 C114 NPO 2 50V 33PF 82NH DVI_CONN FB43 330MA 5% 1 C115 NPO 2 50V 22PF VCC3V3 D15 P7 3 FB42 2 1 2 1 82NH B 2 1 C113 NPO 2 50V 22PF 1 1 B 75.0 R121 2 1% DVI_RED BAS40-04 200MA 40V GND_VIDEO To Video Codec DVI_GRN_TMP 5% 1 C117 NPO 2 50V 33PF 82NH FB45 330MA 5% 1 C118 NPO 2 50V 22PF VCC3V3 D16 3 FB44 330MA 2 1 2 1 82NH 2 1 C116 NPO 2 50V 22PF 1 1 75.0 R122 2 1% DVI_GREEN BAS40-04 200MA 40V GND_VIDEO DVI_BLUE_TMP DVI Video connector 5% 1 C120 NPO 2 50V 33PF 82NH 330MA 2 1 FB46 FB47 5% 1 C121 NPO 2 50V 22PF VCC3V3 D17 3 330MA 2 1 82NH 2 1 C119 NPO 2 50V 22PF 1 1 75.0 R123 2 1% DVI_BLUE BAS40-04 200MA 40V Title: A GND_VIDEO DVI Video connector SCHEM, ROHS COMPLIANT ML505/6/7 VIRTEX-5 EVALUATION PLATFORM, 1280415 0381241 A 1-22-2008_14:51 Date: Sheet Size: B Sheet 4 3 2 16 of Ver: A Rev: 02 Drawn By 27 BP 1 4 3 2 1 D D SH1 VGAIN_VPP SH1 5% 3 FB52 VGA_IN_RIN-CONN 2 VGA_IN_RIN FERRITE-220 2 1 P8 1 2 1 2 1 VGA_IN_GIN-C 6 GAIN0 VGA_IN_SOGIN 8 VGA_IN_RIN-C 14 RAIN0 NC NC 69 68 VSYNC1 HSYNC1 NC 4 BAIN1 NC 10 GAIN1 NC 12 SOGIN1 NC 16 RAIN1 VGAIN_REFLO 18 VGAIN_REFCM 19 VGAIN_REFHI 20 REFLO REFCM REFHI VCC5 VGAIN_VPP NR/FB 26 38 52 64 VDDO_26 VDDO_38 VDDO_52 VDDO_64 74 76 79 1 5 9 13 VDD_1 VDD_5 VDD_9 VDD_13 NC_R0 NC_R1 RED_0 RED_1 RED_2 RED_3 RED_4 RED_5 RED_6 RED_7 37 36 35 34 33 32 31 30 29 28 NC NC CLAMP EXT_CLK/COAST 73 72 VGA_IN_CLAMP VGA_IN_COAST O/E_FFIELD VSOUT/A0 HSOUT SOGOUT DATACK PWRDN/TRI_ST 21 22 23 24 25 17 VGA_IN_ODD_EVEN_B VGA_IN_VSOUT-R VGA_IN_HSOUT-R VGA_IN_SOGOUT-R VGA_IN_DATA_CLK-R SCL SDA 67 66 IIC_SCL_VIDEO-F IIC_SDA_VIDEO-F 5 GND EN NC NC 4 NC 1 C135 10UF 2 X5R 10V 1 2 U20 Near U13 VCC5 1 C131 0.1UF 2 10V X5R VGAIN_VDD 1 C132 0.1UF 2 10V X5R 1 C133 0.1UF 2 10V X5R U19 AD9980 GND_3 GND_7 GND_11 GND_15 GND_27 GND_39 GND_40 GND_53 GND_65 GND_75 GND_77 GND_80 3 B OUT 1% 2 IN 51 50 49 48 47 46 45 44 43 42 SOGIN0 TPS73118 1 DNP C134 1UF 2 10V X5R R132 1 VPP_74 VPP_76 VPP_79 41 BAIN0 TPS73633DBVT C VGA_IN_RED0 VGA_IN_RED1 VGA_IN_RED2 VGA_IN_RED3 VGA_IN_RED4 VGA_IN_RED5 VGA_IN_RED6 VGA_IN_RED7 5% 1 2 3 4 RP38 8 7 6 5 VGA_IN_VSOUT VGA_IN_HSOUT VGA_IN_SOGOUT VGA_IN_DATA_CLK VGA_IN_PWRDN B 22 1 2 1 2 2 1 2 1 GND 4 IIC Address = 0x4C 0.1UF X5R 10V Title: 4 3 CP129 1 0.1UF X5R 10V 4 0.1UF X5R 10V CP60 5 1 VGA In Codec 6 7 8 5 6 7 8 5 6 A 7 8 1 C139 0.1UF 2 10V X5R VCC3V3 2 VGAIN_VDD 3 VGAIN_VPP 2 1 C137 1 C138 0.01UF 2 X7R 2 DNP 16V CP61 U21 NR_FB 1 EN 4 3 OUT 3 2 1 C136 1UF 2 10V X5R IN 5 2 1 VGA_IN_GREEN0 VGA_IN_GREEN1 VGA_IN_GREEN2 VGA_IN_GREEN3 VGA_IN_GREEN4 VGA_IN_GREEN5 VGA_IN_GREEN6 VGA_IN_GREEN7 1% 0 2 1% DVI_ID2 4 VGA_IN_BIN-C R131 1.21K R168 NC_G0 NC_G1 GREEN_0 GREEN_1 GREEN_2 GREEN_3 GREEN_4 GREEN_5 GREEN_6 GREEN_7 VSYNC0 HSYN0 VGA_IN_BLUE0 VGA_IN_BLUE1 VGA_IN_BLUE2 VGA_IN_BLUE3 VGA_IN_BLUE4 VGA_IN_BLUE5 VGA_IN_BLUE6 VGA_IN_BLUE7 R130 1.21K 5 NC NC R129 7.87K 1% FERRITE-220 63 62 61 60 59 58 57 56 55 54 R128 7.87K 1% VGA_IN_GIN-CONN NC_B0 NC_B1 BLUE_0 BLUE_1 BLUE_2 BLUE_3 BLUE_4 BLUE_5 BLUE_6 BLUE_7 CHANNEL 0 VGA_IN_GIN FB51 6 71 70 FILT CHANNEL 1 VGA_IN_BIN FERRITE-220 7 VDDAV_41 1 C125 82000PF 2 10V X7R 1 C126 8200PF 2 25V X7R 2 VGA_IN_BIN-CONN 78 VGA_IN_FILT 3 7 11 15 27 39 40 53 65 75 77 80 RED FB50 8 2 1 C130 1 C128 1 C127 0.047UF 0.047UF0.047UF 2 10V 2 10V 2 10V NPO 1 C129 NPO NPO 1000PF 2 50V X7R GREEN VGA_IN_VSIN VGA_IN_HSIN NC 9 1% BLUE R127 1.54K 1% 75.0 ID2 10 75.0 1% R126 GND1 5% 75.0 1% R125 RGND 0 2 GGND R167 DVI_ID0 11 2 BGND 12 2 NC1 NC R124 GND2 1 1 ID0 DB15-REC VCC3V3 VGA_IN_FILT-R 13 1 ID1/SDA 14 2 HSYNC 15 1 VSYNC 1 SH2 ID3/SCL C VGAIN_VDD VGAIN_VPP NC 1 SH2 K66X-E15S-N VGA In Codec SCHEM, ROHS COMPLIANT ML505/6/7 VIRTEX-5 EVALUATION PLATFORM, 1280415 0381241 A 1-22-2008_14:51 Date: Sheet Size: B Sheet 4 3 2 17 of Ver: A Rev: 02 Drawn By 27 BP 1 2 2 1 2 CPLD_SPDIF_3 75.0 1% 2 1% P14 2 2 RCA_SPDIF 1.21K 2 1 1 2 R147 1 C144 0.1UF 2 10V X5R 1.21K R205 R204 1 C143 0.1UF 2 10V X5R Silkscreen: "SPDIF Out" 1 C166 0.1UF 2 10V X5R 1 C145 10UF 2 X5R 10V 1 3 CON_RCA_TH RCA_JACK C158 10V 0.1UF X5R MIC2_CONN 2 2 AC97 U22 VCC5_AUDIO 1 C146 0.1UF 2 10V X5R VCC5 VCC5_AUDIO 2 MIC2_CONN MIC1_CONN LINE_OUT_R_CONN 1 1 C157 1UF 2 10V X5R 4 5% 5 5% 1 RP41 4.7K 1 RP41 4.7K AUDIO_VREF_OUT LINE_OUT_L_CONN 1 C149 1UF 2 10V X5R NC 2 5% 1 RP41 4.7K NC 3 5% 1 RP41 4.7K NC 2 7 5% STEREO_JACK_TH 1 B LINE_OUT_R_CONN 4 LINE_OUT_L_CONN 2 P12 Silkscreen: "Line Out" VCC5_AUDIO FERRITE-220 NC 1 1 C148 0.1UF 2 10V X5R 1 C147 0.1UF 2 10V X5R P13 Silkscreen: "Amplified Line Out" 1 C156 10UF 2 X5R 10V LINE_OUT_R_IC LINE_OUT_L_IC FB55 A NC 9 5% 1 Silkscreen: "Line In" 2 HP_OUT_L_IC 25 26 27 28 29 30 31 32 33 34 35 36 P11 HP_OUT_L_CONN 1 C164 X5R 2 10V 1UF 1 R158 2 1 4.75K 1% 4.75K 1% 2 2 1 B C161 10V 1UF X5R HP_OUT_R_IC 1 C165 X5R 2 10V 1UF 1 R143 25_AVDD1 26_AVSS1 27_VREF 28_VREFOUT 29_AFILT1 30_AFLIT2 31_AFILT3 32_AFILT4 33_AVSS4 34_AVDD4 35_LINE_OUT_L 36_LINE_OUT_R R157 2 4.75K 1% 4.75K 1% VCC5_AUDIO NC 1 C155 X5R 2 10V 0.1UF 2 1 R142 4 4 6 RP41 4.7K 1 HP_OUT_R_CONN 6 RP41 4.7K C160 10V 1UF X5R STEREO_JACK_TH STEREO_JACK_TH 1 NC 6 RP41 4.7K 2 1 MIC1_IC MIC2_IC LINE_IN_L_IC LINE_IN_R_IC P10 AD1981B LQFP48 48 47 46 45 44 43 42 41 40 39 38 37 10V TANT MIC1_CONN 2 SPDIF_48 EAPD_47 ID1_N_46 ID0_N_45 AVSS3_44 AVDD3_43 NC_42 HP_OUT_R_41 AVSS2_40 HP_OUT_L_39 AVDD2_38 MONO_OUT_37 2 2 C159 10V 0.1UF X5R 13_PHONE_IN 14_AUX_L 15_AUX_R 16_JS1 17_JS0 18_CD_L 19_CD_GND_REF 20_CD_R 21_MIC1 22_MIC2 23_LINE_IN_L 24_LINE_IN_R C163 150UF 2 13 14 15 16 17 18 19 20 21 22 23 24 NC NC NC NC NC NC NC 1 R141 1 1 3.01K 1% 4 10V TANT C162 150UF 2 1 8 5% STEREO_JACK_TH C 10 5% R140 1 6 RP41 4.7K AUDIO_PHONE Silkscreen: "Microphone In" 3.01K 1% C PC_NC RESET_N_11 SYNC_10 DVDD2_9 SDATA_IN_8 DVSS2_7 BIT_CLK_6 SDATA_OUT_5 DVSS1_4 XTL_OUT_3 XTL_IN_2 DVDD1_1 12 11 10 9 8 7 6 5 4 3 2 1 1 C142 1UF 2 10V X5R AUDIO_BIT_CLK_TMP AUDIO_SDATA_IN_TMP 5% 1 1 VCC3V3 1.21K R206 1 0 2 1% 1% SP1 U45 D 75.0 1% R146 1 AUDIO_SPDIF 1 and Back To CPLD 1 75.0 1% R145 CPLD_SPDIF_2 1% R149 27.4 1% 1 NC Portions of the design below this line are "Analog Ground", and should be inside the moat Y 4 NC R138 1 GND 2 1 C140 1UF 2 10V X5R 2 2 2 A R139 R137 Portions of the design above this line are "Digital Ground", and should be outside the moat 2 4.75K 1% 1 4.75K 1% 3 5 VCC R148 27.4 1% 2 OE 2 R144 CPLD_SPDIF_1 1 1 VCC3V3 R135 SN74LVC1G126 1 C141 10UF 2 X5R 10V VCC3V3 D 1 4.75K 1% 1 4.75K 1% R136 VCC5 100 CLK_24.576MHZ_AUDIO AUDIO_SDATA_OUT AUDIO_BIT_CLK AUDIO_SDATA_IN AUDIO_SYNC FLASH_AUDIO_RESET_B PIEZO_SPEAKER 1 2 3 2 4 1 C150 0.1UF 2 10V X5R 1 C151 270PF 2 50V X7R 1 C152 270PF 2 50V X7R 1 C153 270PF 2 50V X7R 1 3 5 7 9 1 C154 270PF 2 50V X7R J28 2 4 6 8 10 Audio Codec NC NC NC H-2X5 Title: Audio Codec SCHEM, ROHS COMPLIANT ML505/6/7 VIRTEX-5 EVALUATION PLATFORM, 1280415 0381241 A 1-22-2008_14:51 Date: Sheet Size: B Sheet 4 3 2 18 of Ver: A Rev: 02 Drawn By 27 BP 1 2 100 99 98 97 96 95 94 93 92 91 90 89 88 87 86 85 84 83 82 81 80 79 78 77 76 2 1% 1 C170 0.1UF 2 10V X5R 49.9K 1 R151 VCC3V3 SH1 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 HDR1x5 J83 USB_HOST1_D- 3 USB_HOST1_D+ NC NC NC NC 4 5 USB_HOST1_GND Silkscreen: "USB Host" NC NC SH1 SH1 SH2 SH3 SH4 SH2 SH3 SH4 GND USB_HOST1_D+ 4 USB_HOST1_GND 2 3 FERRITE-220 C171 1 10V 0.1UF 2 X5R FB61 FERRITE-220 P18 VCC3V3 MIC2025 U24 OUT28 IN7 OUT16 NC25 NC NC NC NC NC NC NC NC SYSACE_USB_D8 SYSACE_USB_D9 NC C NC SYSACE_USB_D10 SYSACE_USB_D11 SYSACE_USB_D12 SYSACE_USB_D13 SYSACE_USB_D14 SYSACE_USB_D15 NC NC NC SYSACE_MPA01_USB_A0 VCC3V3 B 1 C172 0.1UF 2 10V X5R 1 C173 0.1UF 2 10V X5R 1 C174 0.1UF 2 10V X5R 1 C175 0.1UF 2 10V X5R USB_HOST_VCC NC 1 C176 0.1UF 2 10V X5R 1 C177 150UF 49.9K R153 4.75K 2 1% NC 1 1EN 2FLG 3GND 4NC1 2 10V TANT 1 USB Host Power VCC3V3 VCC3V3 U25 A 1 C178 0.1UF 2 10V X5R 7 WP 8 4 VCC GND SCL SDA 6 5 A0 A1 A2 1 2 3 1% 2 1 2 4.75K R154 1 4.75K 1% R155 VCC3V3 CLK_12MHZ_USB USB_GPIO29 USB_GPIO26 U23 CYP_USB_HOST VCC5 NC NC 1% R152 2 4.75K B 1 75 74 73 72 71 70 69 68 67 66 65 64 63 62 61 60 59 58 57 56 55 54 53 52 51 GND2_75 D8_MISO_74 D9_nSSI_73 D10_SCK_72 D11_MOSI_71 D12_TXD_70 D13_RXD_69 D14_RTS_68 D15_CTS_67 GPIO8_D8_MISO_66 GPIO9_D9_nSSI_65 WR_N_64 VCC0_63 RD_N_62 GPIO10_D10_SCK_61 GPIO11_D11_MOSI_60 GPIO12_D12_59 GPIO13_D13_58 GPIO14_D14_57 GPIO15_D15_SSI_N_56 GPIO16_A0_TXD_PWM0_55 GPIO17_A1_RXD__54 GPIO18_A2_RTS__53 GPIO19_A0_CS0_52 GND1_51 26_GND0 27_A10 28_XTALOUT 29_XTALIN 30_A11 31_A12 32_A13 33_A14 34_MEMSEL_N 35_ROMSEL_N 36_RAMSEL_N 37_VCC1 38_A15 39_GPIO31_SCK 40_GPIO30_SDA 41_GPIO29_OTGID 42_GPIO28_TX 43_GPIO27_RX 44_GPIO26_CTS_PWM3 45_GPIO25_IRQ1 46_GPIO24_INT_IORDY_IRQ0 47_GPIO23_RD_N_IOR 48_GPIO22_WR_N_IOW 49_GPIO21_CS_N 50_GPIO20_A1_CS1 D_P USB_HOST1_D- (DIE UP) 2 D_N USB_HOST1_VCC 2 1 VCC 1 FB60 1 CY7C67300-100AI VCC3V3 VCC3V3 Bypass cap for USB chip 1% 2 NC NC NC NC 2 R156 USB_HOST1_VCC 1_A1 2_A2 3_A3 4_DM2B 5_DP2B 6_AGND 7_A4 8_A5 9_DM2A 10_DP2A 11_OTGVBUS 12_CSWITCHB 13_CSWITCHA 14_VSWITCH 15_BOOSTGND 16_BOOSTVCC 17_A6 18_DM1B 19_DP1B 20_A7 21_AVCC 22_DM1A 23_DP1A 24_A8 25_A9 USB_A15 IIC_SCL_USB IIC_SDA_USB USB_GPIO29 USB_SERIAL_TX USB_SERIAL_RX USB_GPIO26 USB_GPIO25 USB_INT SYSACE_MPOE_USB_RD_B SYSACE_MPWE_USB_WR_B USB_CS_B SYSACE_MPA02_USB_A1 SH2 NC NC NC NC NC NC NC NC NC NC NC NC USB_PERI1_D+ 1 GND3_100 BEL_N_A0_99 BEH_N_98 A16_97 A18_96 A17_95 GPIO0_D0_94 GPIO1_D1_93 GPIO2_D2_92 GPIO3_D3_91 GPIO4_D4_90 GPIO5_D5_89 VCC2_88 GPIO6_D6_87 GPIO7_D7_86 RESET_N_85 RSVD_84 D0_83 D1_82 D2_81 D3_80 D4_79 D5_78 D6_77 D7_76 USB_GPIO25 2 1 USB_PERI1_D- 20.5K 1% NC NC C VCC3V3 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 R150 USB_PERI1_VCC SHLD1 SHLD2 Silkscreen: "USB Peripheral 1" USB_B_PERI_SMT 1 VCC 2 D_N 3 D_P 4 GND P17 1 D NC NC NC NC NC NC NC NC D SYSACE_USB_D6 SYSACE_USB_D7 USB_RESET_B 3 NC NC NC NC NC SYSACE_USB_D0 SYSACE_USB_D1 SYSACE_USB_D2 SYSACE_USB_D3 SYSACE_USB_D4 SYSACE_USB_D5 4 USB Controller "Abort Boot" 2 1 Title: J33 SDA/SCL lines swapped for an EEPROM larger than 16KB USB Controller SCHEM, ROHS COMPLIANT ML505/6/7 VIRTEX-5 EVALUATION PLATFORM, 1280415 0381241 A 1-22-2008_14:51 Date: Sheet Size: B Ver: A Rev: 02 M24128-BWDW6TP Sheet 4 3 2 19 of Drawn By 27 BP 1 4 3 2 1 The burst order mode of the SRAM is set to "Linear" by default 49.9 1% VCC3V3 6 5% 6 5% 6 5% 6 5% 7 RP50 4.7K 8 RP50 4.7K 9 RP50 4.7K 10 RP50 4.7K VCC3V3 SRAM_FLASH_A0 SRAM_FLASH_A1 SRAM_FLASH_A2 SRAM_FLASH_A3 SRAM_FLASH_A4 SRAM_FLASH_A5 SRAM_FLASH_A6 SRAM_FLASH_A7 SRAM_FLASH_A8 SRAM_FLASH_A9 SRAM_FLASH_A10 SRAM_FLASH_A11 SRAM_FLASH_A12 SRAM_FLASH_A13 SRAM_FLASH_A14 SRAM_FLASH_A15 SRAM_FLASH_A16 SRAM_FLASH_A17 SRAM_FLASH_A18 SRAM_FLASH_A19 SRAM_FLASH_A20 SRAM_FLASH_A21 CFG_ADDR_OUT0 CFG_ADDR_OUT1 29 A1 25 A2 24 A3 23 A4 22 A5 21 A6 20 A7 19 A8 8 A9 7 A10 6 A11 5 A12 4 A13 3 A14 2 A15 1 A16 55 A17 18 A18 17 A19 16 A20 11 A21 10 A22 9 A23 26 SRAM_FLASH_D0 SRAM_FLASH_D1 SRAM_FLASH_D2 SRAM_FLASH_D3 SRAM_FLASH_D4 SRAM_FLASH_D5 SRAM_FLASH_D6 SRAM_FLASH_D7 SRAM_FLASH_D8 SRAM_FLASH_D9 SRAM_FLASH_D10 SRAM_FLASH_D11 SRAM_FLASH_D12 SRAM_FLASH_D13 SRAM_FLASH_D14 SRAM_FLASH_D15 34 DQ0 36 DQ1 39 DQ2 41 DQ3 47 DQ4 49 DQ5 51 DQ6 53 DQ7 35 DQ8 37 DQ9 40 DQ10 42 DQ11 48 DQ12 50 DQ13 52 DQ14 54 FLASH_AUDIO_RESET_B FLASH_CLK SRAM_FLASH_WE_B FLASH_OE_B NC FLASH_CE_B 44 RST_B 45 CLK 14 WE_B 32 OE_B 27 RFU 30 CE_B 15 WP_B 46 ADV_B 56 FLASH_ADV_B FLASH_WAIT VCC013 VCC133 1 C185 10UF 2 X5R 10V C186 1 0.1UF 2 X5R 10V VCC3V3 VCCQ38 VPP43 0.1UF X5R 10V 4 3 CP75 2 1 VSS012 VSS128 VSS231 1 C187 10UF 2 X5R 10V C A24 DQ15 B WAIT 7NC 5% 8NC 5% 9NC 5% 10 5% 6 RP51 4.7K 6 RP51 4.7K 6 RP51 4.7K 6 RP51 4.7K U27 5NC 5% 1_DQPC 2_DQC 3_DQC 6_DQC 7_DQC 8_DQC 9_DQC 12_DQC 13_DQC 18_DQD 19_DQD 22_DQD 23_DQD 24_DQD 25_DQD 28_DQD 29_DQD 30_DQPD 51_DQPA 52_DQA 53_DQA 56_DQA 57_DQA 58_DQA 59_DQA 62_DQA 63_DQA 68_DQB 69_DQB 72_DQB 73_DQB 74_DQB 75_DQB 78_DQB 79_DQB 80_DQPB VCC1V8 1 RP51 4.7K 1% 1% 1 2 3 6 7 8 9 12 13 18 19 22 23 24 25 28 29 30 51 52 53 56 57 58 59 62 63 68 69 72 73 74 75 78 79 80 NC NC NC 4NC 5% 49.9 49.9 1% 37_A0 36_A1 35_A 34_A 33_A 32_A 44_A 45_A 46_A 47_A 48_A 49_A 50_A 81_A 82_A 83_A 99_A 100_A 84_E18 43_E36 42_E72 39_E144 38_E288 66 16 14 90 76 71 67 60 55 40 26 21 17 10 5 91 77 70 65 61 54 41 27 20 15 11 4 1 RP51 4.7K 2 49.9 1 5% 5% 5% 5% 5% 5% 5% 5% 5% 5% 5% 5% 5% 5% 5% 5% SRAM_DQP3 R160 SRAM_D31_RES SRAM_D30_RES SRAM_D29_RES SRAM_D28_RES SRAM_D27_RES SRAM_D26_RES SRAM_D25_RES SRAM_D24_RES SRAM_D23_RES SRAM_D22_RES SRAM_D21_RES SRAM_D20_RES SRAM_D19_RES SRAM_D18_RES SRAM_D17_RES SRAM_D16_RES SRAM_DQP2 R161 SRAM_DQP1 R162 SRAM_FLASH_D15_RES SRAM_FLASH_D14_RES SRAM_FLASH_D13_RES SRAM_FLASH_D12_RES SRAM_FLASH_D11_RES SRAM_FLASH_D10_RES SRAM_FLASH_D9_RES SRAM_FLASH_D8_RES SRAM_FLASH_D7_RES SRAM_FLASH_D6_RES SRAM_FLASH_D5_RES SRAM_FLASH_D4_RES SRAM_FLASH_D3_RES SRAM_FLASH_D2_RES SRAM_FLASH_D1_RES SRAM_FLASH_D0_RES SRAM_DQP0 R163 2 2 1 5% 5 RP50 4.7K 3 5% 1 RP51 4.7K 7 8 6 5 6 5 7 8 6 5 7 8 7 8 6 5 47 47 47 47 47 47 47 47 47 47 47 47 47 47 47 47 5% 5% 5% 5% 5% 5% 5% 5% 5% 5% 5% 5% 5% 5% 5% 5% 2 1 5% 4 RP50 4.7K 2 5% 2 1 3 4 3 4 2 1 3 4 2 1 2 1 3 4 47 47 47 47 47 47 47 47 47 47 47 47 47 47 47 47 1 1 5% 3 RP50 4.7K 1 RP51 4.7K RP56 RP56 RP56 RP56 RP57 RP57 RP57 RP57 RP58 RP58 RP58 RP58 RP59 RP59 RP59 RP59 8 7 6 5 8 7 6 5 8 7 6 5 5 6 7 8 37 36 35 34 33 32 44 45 46 47 48 49 50 81 82 83 99 100 84 43 42 39 38 NC_66 NC_16 NC_14 VSS_90 VSS_76 VSS_71 VSS_67 VSS_60 VSS_55 VSS_40 VSS_26 VSS_21 VSS_17 VSS_10 VSS_5 VDD_91 VDDQ_77 VDDQ_70 VDD_65 VDDQ_61 VDDQ_54 VDD_41 VDDQ_27 VDDQ_20 VDD_15 VDDQ_11 VDDQ_4 5 SRAM_FLASH_D15 SRAM_FLASH_D14 SRAM_FLASH_D13 SRAM_FLASH_D12 SRAM_FLASH_D11 SRAM_FLASH_D10 SRAM_FLASH_D9 SRAM_FLASH_D8 SRAM_FLASH_D7 SRAM_FLASH_D6 SRAM_FLASH_D5 SRAM_FLASH_D4 SRAM_FLASH_D3 SRAM_FLASH_D2 SRAM_FLASH_D1 SRAM_FLASH_D0 1 2 3 4 1 2 3 4 1 2 3 4 4 3 2 1 SRAM_FLASH_A1 SRAM_FLASH_A2 SRAM_FLASH_A3 SRAM_FLASH_A4 SRAM_FLASH_A5 SRAM_FLASH_A6 SRAM_FLASH_A7 SRAM_FLASH_A8 SRAM_FLASH_A9 SRAM_FLASH_A10 SRAM_FLASH_A11 SRAM_FLASH_A12 SRAM_FLASH_A13 SRAM_FLASH_A14 SRAM_FLASH_A15 SRAM_FLASH_A16 SRAM_FLASH_A17 SRAM_FLASH_A18 SRAM_FLASH_A19 SRAM_FLASH_A20 SRAM_FLASH_A21 CFG_ADDR_OUT0 CFG_ADDR_OUT1 87_CEN_B 92_CE3_B 97_CE2 98_CE1_B 31_MODE 64_ZZ 93_BWA_B 94_BWB_B 95_BWC_B 96_BWD_B 85_ADV/LD_B 86_OE_B 88_WE_B 89_CLK 6 B RP52 RP52 RP52 RP52 RP53 RP53 RP53 RP53 RP54 RP54 RP54 RP54 RP55 RP55 RP55 RP55 87 92 97 98 31 64 93 94 95 96 85 86 88 89 7 SRAM_D31 SRAM_D30 SRAM_D29 SRAM_D28 SRAM_D27 SRAM_D26 SRAM_D25 SRAM_D24 SRAM_D23 SRAM_D22 SRAM_D21 SRAM_D20 SRAM_D19 SRAM_D18 SRAM_D17 SRAM_D16 SRAM_CEN_B SRAM_CE3_B SRAM_CE2 SRAM_CS_B SRAM_MODE SRAM_ZZ SRAM_BW1 SRAM_BW0 SRAM_BW3 SRAM_BW2 SRAM_ADV_LD_B SRAM_OE_B SRAM_FLASH_WE_B SRAM_CLK D Silkscreen: "Strata FLASH" "256 MBit" 8 C Silkscreen: "Synchronous SRAM" "9 MBit - 36 X 256K" 1 1 1 5% NC D 2 RP50 4.7K VCC3V3 Memory: Synchronous SRAM, Strata FLASH VCC3V3 SRAM_ZBT_256KX36 U26 Title: 0.1UF X5R 10V Sync. SRAM, FLASH SCHEM, ROHS COMPLIANT ML505/6/7 VIRTEX-5 EVALUATION PLATFORM, 1280415 0381241 A 1-22-2008_14:51 Date: Sheet Size: B Sheet 4 3 Ver: A Rev: 02 4 3 CP71 2 1 0.1UF X5R 10V 4 3 CP70 2 1 5 6 7 8 5 C181 1 C182 1 0.1UF 0.1UF 2 X5R 2 X5R 10V 10V 6 1 C180 10UF 2 X5R 10V 7 8 A 2 20 of Drawn By 27 BP 1 3 TP10 1 1 U3 XC95144XL_10TQ100C 1 VCCIO_88 VCCIO_51 VCCIO_38 VCCIO_26 VCCINT_98 VCCINT_57 VCCINT_5 TMS_47 TDO_83 TDI_45 TCK_48 GND_100 GND_84 GND_75 GND_69 GND_62 GND_44 GND_31 GND_21 IO_8_17_73 IO_8_15_72 IO_8_14_71 IO_8_12_70 IO_8_11_68 IO_8_9_67 10 5% RP61 6 4.7K 88 51 38 26 98 57 5 47 83 45 48 100 84 75 69 62 44 31 21 73 72 71 70 68 67 2 4.7K 6 RP60 4.7K 8 5% 9 5% 10 5% RP61 1 4.7K RP61 1 4.7K 27 25 24 23 10 9 8 7 6 4 3 2 1 99 22 20 19 18 17 16 15 14 13 12 11 5 5% 7 5% 1 RP60 4.7K 6 RP60 4.7K NC NC RP61 6 4.7K RP61 1 4.7K 7 5% 2 5% 5 5% RP61 1 4.7K PLAT_FLASH_CF_B CPLD_SPDIF_2 PCIE_PERST_B PCIE_WAKE_B GPIO_LED_N GPIO_LED_S GPIO_LED_E GPIO_LED_W GPIO_LED_C CLK_33MHZ_FPGA CPLD_SPDIF_3 CPLD_LED_N CPLD_LED_S CPLD_LED_E CPLD_LED_W CPLD_LED_C FPGA_FALLBACK_EN SYSACE_CFG_EN FPGA_CCLK USB_RESET_B CPLD_SPDIF_1 SYSACE_CFGMODEPIN AUDIO_SPDIF RP61 6 4.7K RP61 6 4.7K 5% NC 9 5% NC 8 3 6 RP60 4.7K 6 RP60 3 5% 4 5% IO_GCK3_3_8_27 IO_3_6_25 IO_3_5_24 IO_GCK2_3_2_23 IO_2_17_10 IO_2_15_9 IO_2_14_8 IO_2_12_7 IO_2_11_6 IO_GTS2_2_9_4 IO_GTS1_2_8_3 IO_GTS4_2_6_2 IO_GTS3_2_5_1 IO_GSR_2_2_99 IO_GCK1_1_17_22 IO_1_15_20 IO_1_14_19 IO_1_12_18 IO_1_11_17 IO_1_9_16 IO_1_8_15 IO_1_6_14 IO_1_5_13 IO_1_3_12 IO_1_2_11 28_IO_3_9 29_IO_3_11 30_IO_3_12 32_IO_3_14 33_IO_3_15 34_IO_3_17 87_IO_4_2 89_IO_4_5 90_IO_4_6 91_IO_4_8 92_IO_4_9 93_IO_4_11 94_IO_4_12 95_IO_4_14 96_IO_4_15 97_IO_4_17 35_IO_5_2 36_IO_5_5 37_IO_5_6 39_IO_5_8 40_IO_5_9 41_IO_5_11 42_IO_5_12 43_IO_5_14 46_IO_5_15 TP11 A 1 1% CFG_ADDR_R1 1% CFG_ADDR_R0 49_IO_5_17 74_IO_6_2 76_IO_6_5 77_IO_6_6 78_IO_6_8 79_IO_6_9 80_IO_6_11 81_IO_6_12 82_IO_6_14 85_IO_6_15 86_IO_6_17 50_IO_7_2 52_IO_7_5 53_IO_7_6 54_IO_7_8 55_IO_7_9 56_IO_7_11 58_IO_7_12 59_IO_7_14 60_IO_7_15 61_IO_7_17 63_IO_8_2 64_IO_8_5 65_IO_8_6 66_IO_8_8 4.75K 4.75K 28 29 30 32 33 34 87 89 90 91 92 93 94 95 96 97 35 36 37 39 40 41 42 43 46 VCC3V3 49 74 76 77 78 79 80 81 82 85 86 50 52 53 54 55 56 58 59 60 61 63 64 65 66 B 2 5% 3 5% 4 5% C 4.7K 1 RP60 4.7K 1 RP60 4.7K 1 RP60 D TP12 TP13 0.1UF X5R 10V CP81 0.1UF X5R 10V VCC3V3 FLASH_AUDIO_RESET_B CPLD_LED_0 CPLD_LED_1 CPLD_LED_2 CPLD_LED_4 GPIO_LED_0 GPIO_LED_1 GPIO_LED_2 GPIO_LED_4 CPLD_TP2 CPLD_TP1 CPLD_FPGA_DONE CPLD_FPGA_INIT_B FPGA_DOUT_BUSY FPGA_RDWR_B FPGA_DIN FPGA_DONE FPGA_INIT_B FPGA_PROG_B FPGA_CS_B FPGA_M2 FPGA_M1 FPGA_M0 CPLD_TP0 CPLD_TP10 4 3 2 1 4 3 5 6 7 8 CP80 1 1 2 CFG_ADDR_IN2 CFG_ADDR_IN1 CFG_ADDR_IN0 CFG_ADDR_OUT2 CFG_ADDR_OUT1 R165 CFG_ADDR_OUT0 R166 CPLD_IO_1 SRAM_FLASH_WE_B LCD_FPGA_DB7 LCD_FPGA_DB6 LCD_FPGA_DB5 LCD_FPGA_DB4 LCD_FPGA_RW LCD_FPGA_E LCD_FPGA_RS LCD_CPLD_DB7 LCD_CPLD_DB6 LCD_CPLD_DB5 LCD_CPLD_DB4 LCD_CPLD_RW LCD_CPLD_E LCD_CPLD_RS PLAT_FLASH_CE_B FPGA_CPU_RESET_B SRAM_FLASH_D0_EN 2 2 5 6 4 7 8 1 4 2 1 VCC3V3 D VCC3V3 VCC3V3 C PC4_TMS CPLD_TDO PLAT_FLASH2_TDO PC4_TCK VCC3V3 PLAT_FLASH_EXT_SEL_B SYSACE_RESET_B FPGA_CS0_B NC BUS_ERROR_1 BUS_ERROR_2 B VCC3V3 CPLD - Misc signal control Title: Sheet CPLD - Misc signal control SCHEM, ROHS COMPLIANT ML505/6/7 VIRTEX-5 EVALUATION PLATFORM, 1280415 0381241 Date: 1-22-2008_14:51 Sheet Size: B 21 of 27 1 Ver: A A Rev: Drawn By 02 BP 2 AVCC_PLL U1 K3AVCCPLL_116 FB70 AVCC_PLL_116 FERRITE-220 G3AVTTRX_116 AVTT_RX_116 2 1 FB71 FERRITE-220 F3AVTTTX1_116 L3AVTTTX2_116 2 AVTT_TX_116 2 1 FB72 AVCC_MGT AVCC_MGT_116 FERRITE-220 1 FERRITE-220 1 C331 0.22UF 2 10V X7R 1 C332 0.22UF 2 10V X7R LOC=X0Y4 J3MGTAVCC1_116 J4MGTAVCC2_116 FB73 1 C330 0.22UF 2 10V X7R FF1136 BANK 116 1 C333 0.22UF 2 10V X7R CLKBUF_Q0_N CLKBUF_Q0_P RXN0_116H1 RXP0_116G1 TXN0_116G2 TXP0_116F2 SFP_RX_N SFP_RX_P SFP_TX_N SFP_TX_P RXN1_116J1 RXP1_116K1 TXN1_116K2 TXP1_116L2 SMA_RX_N SMA_RX_P SMA_TX_N SMA_TX_P 2 1 T3AVCCPLL_112 AVCC_PLL_112 FERRITE-220 REFCLKN_112P3 REFCLKP_112P4 2 AVTT_RX_112 2 1 FB75 AVTT_TX_112 N3AVTTRX_112 FERRITE-220 M3AVTTTX1_112 U3AVTTTX2_112 1 FB76 FERRITE-220 2 1 AVCC_MGT_112 FERRITE-220 1 C336 0.22UF 2 10V X7R 1 C337 0.22UF 2 10V X7R R170 RREF 1 1 C335 0.22UF 2 10V X7R 2 1 C334 0.22UF 2 10V X7R FF1136 BANK 112 R3MGTAVCC1_112 R4MGTAVCC2_112 FB77 C CLKBUF_Q0_C_P AVTT C3AVTTRX_120 49.9 1% AVCC_MGT LOC=X0Y3 V4RREF_112 2 1 AVCC_PLL_114 2 2 AVTT_TX_114 2 1 AVTT_RX_114 AVCC_MGT_114 FERRITE-220 1 FB80 FERRITE-220 1 FB81 FERRITE-220 1 C338 0.22UF 2 10V X7R SGMIICLK_QO_N SGMIICLK_QO_P RXN0_112P1 RXP0_112N1 TXN0_112N2 TXP0_112M2 SGMII_RX_N SGMII_RX_P SGMII_TX_N SGMII_TX_P RXN1_112R1 RXP1_112T1 TXN1_112T2 TXP1_112U2 LOOPBK_116_N LOOPBK_116_P U1 C6AVCCPLL_124 AVTT SGMII_RX-C_N SGMII_RX-C_P SGMII_TX-C_N SGMII_TX-C_P C9AVTTRX_124 AVCC_MGT NC NC NC NC REFCLKN_124C8 NC NC C10AVTTTX1_124 C5AVTTTX2_124 FF1136 REFCLKP_124D8 A8 BANK 124 RXN0_124 RXP0_124A9 D7MGTAVCC2_124 C7MGTAVCC1_124 NC U5NC TXN0_124B9 TXP0_124B10 NC NC NC NC RXN1_124A7 RXP1_124A6 TXN1_124B6 TXP1_124B5 NC NC NC NC C SG-BGA-6046 AB3AVCCPLL_114 1 C339 0.22UF 2 10V X7R 1 C340 0.22UF 2 10V X7R 1 C341 0.22UF 2 10V X7R W3AVTTRX_114 REFCLKN_114Y3 REFCLKP_114Y4 FF1136 BANK 114 AC3AVTTTX1_114 V3AVTTTX2_114 LOC=X0Y2 AA3MGTAVCC1_114 AA4MGTAVCC2_114 U1 AM9AVCCPLL_126 SATACLK_QO_N SATACLK_QO_P AVTT RXN0_114Y1 RXP0_114W1 TXN0_114W2 TXP0_114V2 SATA1_RX_N SATA1_RX_P SATA1_TX_N SATA1_TX_P RXN1_114AA1 RXP1_114AB1 TXN1_114AB2 TXP1_114AC2 SATA2_RX_N SATA2_RX_P SATA2_TX_N SATA2_TX_P AM6AVTTRX_126 AVCC_MGT AM10AVTTTX1_126 AM5AVTTTX2_126 REFCLKN_126AM7 FF1136 REFCLKP_126AL7 AP7 BANK 126 RXN0_126 RXP0_126AP6 AM8MGTAVCC2_126 AL8MGTAVCC1_126 U4VREF V5VTRXC VCC_RXC NC VALUE=SG-BGA-6046 NC NC TXN0_126AN6 TXP0_126AN5 NC NC NC NC RXN1_126AP8 RXP1_126AP9 TXN1_126AN9 TXP1_126AN10 NC NC NC NC SG-BGA-6046 AVCC_PLL AVCC_PLL AVCC_PLL_118 2 1 FB82 FERRITE-220 AVTT_RX_118 2 1 FB83 FERRITE-220 AVTT_TX_118 2 1 FB84 AVCC_MGT RXN1_120C1 RXP1_120D1 TXN1_120D2 TXP1_120E2 F4MGTAVCC2_120 D5MGTAVCC1_120 SG-BGA-6046 FB79 AVTT NC NC NC NC AVCC_PLL FERRITE-220 B RXN0_120A2 RXP0_120A3 TXN0_120B3 TXP0_120B4 FF1136 BANK 120 D AVCC_PLL U1 FB78 AVCC_MGT NC NC C4AVTTTX1_120 E3AVTTTX2_120 AVCC_PLL AVTT REFCLKN_120D4 REFCLKP_120E4 SG-BGA-6046 U1 FB74 AVCC_MGT U1 D3AVCCPLL_120 SG-BGA-6046 AVCC_PLL AVTT AVCC_PLL 1 C85 1 C84 0.01UF 0.01UF 2 16V 2 16V X7R X7R AVTT REFCLKN_116H3 REFCLKP_116H4 1 CLKBUF_Q0_C_N 1 C87 1 C86 0.01UF 0.01UF 2 16V 2 16V X7R X7R 2 1 D 1 Z1 Z2 X5R X5R 2 10V 2 10V 0.01UF 0.01UF 3 1 4 FERRITE-220 AVCC_MGT_118 2 1 FB85 FERRITE-220 1 C342 0.22UF 2 10V X7R 1 C343 0.22UF 2 10V X7R 1 C344 0.22UF 2 10V X7R 1 C345 0.22UF 2 10V X7R U1 AH3AVCCPLL_118 REFCLKN_118AF3 REFCLKP_118AF4 FF1136 BANK 118 DEVICE=SG-BGA-6046 AE3AVTTRX_118 AD3AVTTTX1_118 AJ3AVTTTX2_118 LOC=X0Y1 AG4MGTAVCC2_118 AG3MGTAVCC1_118 RXN0_118AF1 RXP0_118AE1 TXN0_118AE2 TXP0_118AD2 RXN1_118AG1 RXP1_118AH1 TXN1_118AH2 TXP1_118AJ2 U1 AM4AVCCPLL_122 PCIE_CLK_QO_N PCIE_CLK_QO_P AVTT PCIE_RX_N PCIE_RX_P PCIE_TX_N PCIE_TX_P AL3AVTTRX_122 AVCC_MGT LOOPBK_114_N LOOPBK_114_P REFCLKN_122AL4 REFCLKP_122AL5 NC NC RXN0_122AM1 RXP0_122AL1 TXN0_122AL2 TXP0_122AK2 NC NC NC NC RXN1_122AP2 RXP1_122AP3 TXN1_122AN3 TXP1_122AN4 NC NC NC NC FF1136 BANK 122 AK3AVTTTX1_122 AM3AVTTTX2_122 AK5MGTAVCC2_122 AJ4MGTAVCC1_122 SG-BGA-6046 SG-BGA-6046 Title: A MGT Banks SCHEM, ROHS COMPLIANT ML505/6/7 VIRTEX-5 EVALUATION PLATFORM, 1280415 0381241 A 1-22-2008_14:55 Date: Sheet Size: B Sheet 4 B 3 2 22 of Ver: A Rev: 02 Drawn By 27 BF 1 3XTAL_OUT SATACLK_XTAL_IN 4XTAL_IN X6 1C215 0.01UF 2 16V X7R C202 1 0.1UF 10V 2 X5R SATA2_TX_N SATA2_TX_P 3XTAL_OUT SGMIICLK_QO-C_P NQ06 SGMIICLK_QO-C_N 4XTAL_IN OE5 X7 GND_SGMIICLK GND_SGMIICLK GND_SGMIICLK SGMIICLK_QO_P GND_7 SATA2_RX-C_P SATA2_RX-C_N 6 HRX+ 5 HRXD 4 GND_4 SATA2_TX-C_N SATA2_TX-C_P J41 3 HTX2 HTX+ 1 GND_1 SLOT SATA Host 1 MGT 118_0 SATA 7 SGMIICLK_QO_N U29 25.000MHZ 1C211 0.01UF 2 16V X7R Q07 1C213 1C212 0.01UF 0.01UF 2 16V 2 16V X7R X7R SGMIICLK_XTAL_IN C209 1 0.1UF 10V 2 X5R VDD8 SATA1_RX_P SATA1_RX_N C210 1 0.1UF 10V 2 X5R 1% 2 SGMIICLK_XTAL_OUT DNP 125.00 MHz Clock SATA1_TX_N SATA1_TX_P Ethernet SGMII Clock - 125MHz GND_7 SATA1_RX-C_P SATA1_RX-C_N 6 HRX+ 5 HRX4 GND_4 SATA1_TX-C_N SATA1_TX-C_P C J40 3 HTX2 HTX+ 1 1C214 0.01UF 2 16V X7R C206 10UF 2 X5R 10V 1 C208 33PF 2 50V NPO 1 R211 1 1 C205 0.01UF 2 16V X7R SATA2_RX_P SATA2_RX_N VDD_SGMIICLK 2GND ABLS 2 1 2 1 C204 0.01UF 2 16V X7R 2 JMP Off = 75 MHz JMP On = 150 MHz GND_SATACLK VDDA_SGMIICLK ICS844021I 1VDDA 1 C207 33PF 2 50V NPO R21010 5% J56 1 7 SATA Clock - 75/150 MHz 2 FB94 1 FERRITE-220 FERRITE-220 FB95 VDD_SGMIICLK VDDA_SGMIICLK SATACLK_QO-C_N FREQ_SEL5 GND_SATACLK GND_SATACLK 1 Q_N6 SATA SATACLK_QO_P SATACLK_QO_N U44 GND_SATACLK VCC3V3 SATACLK_QO-C_P 1C217 1C216 0.01UF 0.01UF 2 16V 2 16V X7R X7R 25.000MHZ Q_P7 SATA Host 2 MGT 118_1 1C218 0.01UF 2 16V X7R 2 VDD8 2GND SATACLK_XTAL_OUT 1 VDD_SATACLK C203 1 0.1UF 10V 2 X5R 1 C200 NPO 2 50V 22PF ABLS 1% C226 10UF 2 X5R 10V 1 1 DNP 1 C225 0.01UF 2 16V X7R 2 VDDA_SATACLK ICS844071I 1VDDA R175 C198 1 C199 0.1UF 0.01UF 2 10V 2 16V X5R X7R 1 C201 NPO 2 50V 22PF 1 2 1 2 FB92 VDDA_SATACLK R21310 5% 2 D 3 VDD_SATACLK 1 FB93 1 VCC3V3 FERRITE-220 FERRITE-220 4 GND_1 SLOT C NC PCIE_RX_P PCIE_RX_N B12 RSVD_1 B13 GND_4 B14 PET0_P B15 PET0_N B16 GND_5 B17 PRSNT_B_2 B18 GND_6 PCIE_PERST_B PCIE_CLK_QO-C_P PCIE_CLK_QO-C_N A12 GND_8 A13 REFCLK_P A14 REFCLK_N A15 GND_9 A16 PER0_P A17 PER0_N A18 GND_10 1 C219 0.01UF 2 16V X7R NC NC NC NC NC NC 1 1 C221 0.1UF 2 10V X5R PCIE_WAKE_B-R 5% PCIE_PRSNT_B PCIE_TX-C_P PCIE_TX-C_N PCI_E-FINGER-1X B SMA_RX-C_N J42 32K10K-400E3 GND1 2 GND2 3 GND3 4 1 SIG GND4 5 GND5 6 GND6 7 GND7 8 SMA_RX-C_P J43 32K10K-400E3 GND1 2 GND2 3 GND3 4 1 SIG GND4 5 GND5 6 GND6 7 GND7 8 SMA_RX_N SMA_RX_P 1 C220 0.01UF 2 16V X7R 0 NC NC 1 C223 1 C222 0.1UF 0.1UF 2 10V 2 10V X5R X5R 1 PCIE_WAKE_B 2 R212 NC NC NC A1 PRSNT_B_1 A2 12V_4 A3 12V_5 A4 GND_7 A5 TCK A6 TDI A7 TDO A8 TMS A9 3V3_2 A10 3V3_3 A11 PERST PCIE_CLK_QO_P PCIE_CLK_QO_N PCIE_TX_P PCIE_TX_N 1 C224 0.1UF 2 10V X5R NC NC P21 B1 12V_1 B2 12V_2 B3 12V_3 B4 GND_1 B5 SMCLK B6 SMDAT B7 GND_2 B8 3V3_1 B9 TRST_B B10 3V3_AUX B11 WAKE_B 2 NC NC NC Q5 NDS331N PCI-E Connectors MGT_114_0 3 PCIE_PRSNT_B_FPGA SMA Connectors - MGT_112_1 J44 32K10K-400E3 1 Q42 NDS331N 1% R173 TP20 VCC1V8 Q40 3 MGT Clocks and Connectors 2 IIC_SDA_SFP Title: 1 TP21 NDS331N TP22 Q41 1 VCC3V3 3 2 1 J81 Silkscreen: 1 3 3 "FULL BW" "RT_SEL" "LOW BW" B J45 32K10K-400E3 GND1 2 GND2 3 GND3 4 1 SIG GND4 5 GND5 6 GND6 7 GND7 8 SFP_TX_DISABLE_FPGA MGT Connectors SCHEM, ROHS COMPLIANT ML505/6/7 VIRTEX-5 EVALUATION PLATFORM, 1280415 0381241 P19 SFP_CONN_CASE 4 2 6 5% 1 1 Silkscreen: J82 "SFP EN" 2 1 SFP MODULE MGT_102B 5% 1 5% 1 5% 6 SFP_TX_FAULT SFP_TX_DISABLE SFP_MOD_DEF2 SFP_MOD_DEF1 SFP_MOD_DETECT SFP_RT_SEL SFP_LOS Silkscreen: "SFP OK" 2 3 4 5 6 7 8 1 TX_FAULT_22 TX_DISABLE3 MOD_DEF2_44 MOD_DEF1_55 MOD_DEF0_66 RATE_SELECT_77 LOS_88 2 1 2121_GND 2222_GND 2323_GND 2424_GND 2525_GND 2626_GND 2727_GND 2828_GND 2929_GND 3030_GND 3131_GND 1 1 6 5% 6 5% 4.7K NC 10 RP70 4.7K NC 9 RP70 4 3 2 1 CP90 0.1UF X5R 10V 5 6 7 8 A 1 1VEET_1 17VEET_17 20VEET_20 DS40 VCC3V3 VCC3V3 LED-GRN-SMT 140 VCC3V3 SFP_TX_P SFP_TX_N 5% 1 C192 1 C191 1 C190 10UF 0.1UF 0.1UF 2 X5R 2 10V 2 10V 10V X5R X5R TDP_1818 TDN_1919 1 1 C193 0.1UF 2 10V X5R 9VEER_9 10VEER_10 11VEER_11 14VEER_14 SMA_TX_N SMA_TX_P 2 1 C194 10UF 2 X5R 10V SFP_RX_N SFP_RX_P 5% 2 1 FERRITE-220 RDN_1212 RDP_1313 3 FB91 15VCCR_15 16VCCT_16 2 RP70 4.7K 7 RP70 4.7K 3 RP70 4.7K 4 RP70 4.7K 5 RP70 4.7K 8 RP70 4.7K VCC3V3 SFP_VCCR SFP_VCCT 2 1 FB90 FERRITE-220 GND1 GND2 GND3 SIG GND4 GND5 GND6 GND7 3 2 IIC_SCL_SFP A 1-22-2008_14:51 Date: Sheet Size: B Ver: A Rev: 02 NDS331N Sheet 2 23 of Drawn By 27 BF 1 4 3 2 MGT PLL Regulator 1 MGT VTT Regulator TPS74401 TPS74401 VCC3V3 1 15 SS 16 1 C245 0.1UF 2 10V X5R 1 C246 0.1UF 2 10V X5R D 1 15 SS 2 16 FB 1 C248 10UF 2 10V X5R 1 C249 0.1UF 2 10V X5R AVTT_FB 1 12 U33 21 2 EN 17 14 13 2 3 4 12 21 1 C233 1000PF 2 X7R 50V 11 1/16W AVCC_PLL_FB 1 BIAS GND_12 FB 1 C244 X5R 2 10V 1UF 10 1.2V @ 3A 1 18 19 20 VOUT_1 VOUT_18 VOUT_19 VOUT_20 GND_TAB 2 1 C235 0.1UF 2 10V X5R AVTT TI NC_17 NC_14 NC_13 NC_2 NC_3 NC_4 GND_12 GND_TAB U30 17 14 13 2 3 4 R176 = 1.13K 1% R177 = 4.53K 1% EN NC_17 NC_14 NC_13 NC_2 NC_3 NC_4 FXT Only (ML507) AVCC_PLL = 1.0V @ 3A 11 1 C234 10UF 2 10V X5R FAN_CNTRL_GPIO4 R184 1 C232 0.1UF 2 10V X5R VCC5 VIN_5 VIN_6 VIN_7 VIN_8 2.43K 1% 1 C231 0.1UF 2 10V X5R BIAS R176 1 C230 X5R 2 10V 1UF 10 1 18 19 20 R177 R176 = 2.43K 1% R177 = 4.99K 1% AVCC_PLL_SS D AVCC_PLL TI VOUT_1 VOUT_18 VOUT_19 VOUT_20 9 PG 5 6 7 8 AVTT_SS VCC5 LXT & SXT (ML505/6) AVCC_PLL = 1.2V @ 3A VIN_5 VIN_6 VIN_7 VIN_8 2.43K 1% 5 6 7 8 FAN_CNTRL_GPIO2 4.99K 1% Voltage Output Settings 9 R185 PG 1 C247 1000PF 2 X7R 50V 2 4.99K 1% VCC3V3 TPS74401 PG 5 6 7 8 VCC5 10 BIAS 11 EN FAN_CNTRL_GPIO3 C AVCC_MGT VOUT_1 VOUT_18 VOUT_19 VOUT_20 1 18 19 20 1 15 SS GND_12 GND_TAB NC_17 NC_14 NC_13 NC_2 NC_3 NC_4 12 21 17 14 13 2 3 4 U31 1 C239 1000PF 2 X7R 50V 1.0V @ 3A TI R178 1 C238 0.1UF 2 10V X5R 9 2 FB 16 1 C240 10UF 2 10V X5R 1 C241 0.1UF 2 10V X5R AVCC_MGT_FB 1 R179 1 C237 0.1UF 2 10V X5R AVCC_MGT_SS 1 C236 X5R 2 10V 1UF VIN_5 VIN_6 VIN_7 VIN_8 1.13K 1% C 2 4.53K 1% MGT AVCC Regulator VCC1V8 B B MGT RXC Regulator AVTT VCC_RXC 1 2 FB96 1 C256 0.22UF 2 10V X7R FERRITE-220 MGT Power Supplies Title: A MGT Power Supplies SCHEM, ROHS COMPLIANT ML505/6/7 VIRTEX-5 EVALUATION PLATFORM, 1280415 0381241 A 1-22-2008_14:51 Date: Sheet Size: B Sheet 4 3 2 24 of Ver: A Rev: 02 Drawn By 27 BF 1 4 3 2 5v to 3.3V Regulator 1 5v to 1.0V Regulator VCC5 VCC5 6 2 VCC5 1 8 3 4 1% 1 R191 2 U35 NA TANT VADJ GND_3 GND_4 2 1 C267 10UF 2 10V X5R 1.21K 2 3V3_ADJ NC 11 C279 1 470UF 6.3V 2 POSCAP INH/UVLO C280 470UF 1 C281 10UF 6.3V 2 10V POSCAP X5R 1 C282 10UF 2 10V X5R 1 C283 10UF 2 10V X5R U37 SNS_P 6 VOUT 5 SNS_N 7 1.0V @ 16A max VCCINT 1 2 VADJ 7 C265 NS D C284 1 1000UF C285 1 1000UF 2.5V 2 POSCAP 2.5V 2 POSCAP C286 NS 1 C288 10UF 2 10V X5R NA TANT 8 C264 1 680UF 4V 2 POSCAP TI PTH08T220W R195 1% 2 1 R194 0 5% 2 VIN 1 5 1 GND_3 GND_4 SNS_N 6.81K R190 INH/UVLO 3.3V @ 10A max VCC3V3 3 4 NC 11 VOUT TT SNS_P TI PTH08T240W SYNC VIN 9 1 C263 10UF 2 10V X5R 1 6.3V POSCAP 1 C262 10UF 2 10V X5R TRACK 2 1 C261 10UF 2 10V X5R TT 2 C260 470UF SYNC TRACK 1 1 10 9 1 10 2 VCC5 D MODE_SYNC_1V0 1% MODE_SYNC_3V3 20.5K INT_ADJ 5v to 1.8V Regulator VCC5 MODE_SYNC_1V8 C 1 9 TRACK SYNC TT 1 1 2 C290 470UF 6.3V POSCAP 2 1 C291 10UF 2 10V X5R 1 C292 10UF 2 10V X5R 1 C293 10UF 2 10V X5R R196 VCC5 VIN TI PTH08T240W NC 11 INH/UVLO SNS_P 6 VOUT 5 SNS_N 7 2 1.21K 10 1% C 1 C295 NS 2.5V 2 POSCAP 1 C297 10UF 2 10V X5R NA TANT 8 3 4 1 R197 4.75K 1% 2 U38 C294 1 1000UF VADJ GND_3 GND_4 2 1.8V @ 10A max VCC1V8 1V8_ADJ 5V Power - Jack, Switch and LED B B 5V Power Synchronizing Circuit MODE_SYNC_3V3 CD4069 2 PWR_JACK P20 J15 1 2 3 4 R199 NC 3 1 C276 470PF 2 50V X7R 2 5V Power Supplies VCC5-R PWR_XTAL2 1 C275 220PF 2 50V X7R VCC5 VCC5_TMP 1 2 X8 350KHZ PWR_XTAL1 1.00M 1% A NC 1 1% MODE_SYNC_1V0 MODE_SYNC_1V8 562 12 R198 1 SH1 SH2 U39 13 2 CD4069 MODE_SYNC_B Title: 1 10 LED-GRN-SMT DS41 U39 11 H-1X4-200 CD4069 MODE_SYNC_A 14 14 8 7 CD4069 U39 9 7 14 6 7 CD4069 U39 5 1 7 4 2 CD4069 14 U39 3 3 7 2 7 14 U39 1 SW1 SPDT 14 VCC5 Power Supplies SCHEM, ROHS COMPLIANT ML505/6/7 VIRTEX-5 EVALUATION PLATFORM, 1280415 0381241 A 1-22-2008_14:51 Date: Sheet Size: B Sheet 4 3 2 25 of Ver: A Rev: 02 Drawn By 27 BP 1 4 3 2 3.3v to 2.5V (VCC AUX) Regulator 1 5V to 0.9V (DDR VTT VREF) Regulator TPS74401 VCC3V3 PG 11 BIAS 1 18 19 20 EN R200 SS GND_12 GND_TAB NC_17 NC_14 NC_13 NC_2 NC_3 NC_4 16 1 C320 1000PF 2 X7R 50V 1 C304 0.1UF 2 10V X5R 9 1 C310 1UF 8 2 10V 7 X5R VTTVREF_REF 6 VIN VDDQSNS S5 VLDOIN GND 2 S3 PGND VTTSNS D VTTVREF 0.9V @1.4A VTTVREF 1 2 1 C313 10UF 2 10V X5R 3 4 5 1 C314 10UF 2 10V X5R 1 C312 10UF 2 10V X5R PWRPAD 11 1C311 0.1UF 2 X5R 10V 3.3v to 2.5V Regulator VTT VTTREF AUX_FB 1 12 21 17 14 13 2 3 4 U40 2 FB 1 C303 10UF 2 10V X5R VCC1V8 U42 TPS51100DGQ 10 1 15 2.5V @ 3A VCC5 VOUT_1 VOUT_18 VOUT_19 VOUT_20 1% 1 C302 0.1UF 2 10V X5R VCCAUX TI R201 1 C301 0.1UF 2 10V X5R AUX_SS 1 C300 X5R 2 10V 1UF FAN_CNTRL_GPIO1 3.57K 10 9 1% VCC5 D VIN_5 VIN_6 VIN_7 VIN_8 1.69K 5 6 7 8 5V to 0.9V (DDR2 VTT DDR) Regulator TPS74401 VCC3V3 C PG EN TI VCC5 VOUT_1 VOUT_18 VOUT_19 VOUT_20 1 18 19 20 15 R202 1 SS GND_12 GND_TAB NC_17 NC_14 NC_13 NC_2 NC_3 NC_4 12 21 17 14 13 2 3 4 U41 1 C321 1000PF 2 X7R 50V 2 FB 16 1 C308 10UF 2 10V X5R 1 C309 0.1UF 2 10V X5R 1 C315 1UF 2 10V X5R VTTDDR_REF 2V5_FB 1 2 1C316 0.1UF 2 X5R 10V VCCINT VCC1V8 U43 TPS51100DGQ 10 1% BIAS 11 C 2.5V @ 3A 3.57K 10 FLASH_AUDIO_RESET_B VCC2V5 1% 1 C307 0.1UF 2 10V X5R 9 R203 1 C306 0.1UF 2 10V X5R 2V5_SS 1 C305 X5R 2 10V 1UF VIN_5 VIN_6 VIN_7 VIN_8 1.69K 5 6 7 8 VCC5 9 8 7 6 VTTDDR VIN VDDQSNS S5 VLDOIN GND VTT S3 PGND VTTREF VTTSNS 1 0.9V @1.4A VTTDDR 2 1 C318 10UF 2 10V X5R 3 4 5 1 C319 10UF 2 10V X5R 1 C317 10UF 2 10V X5R PWRPAD 11 VCC3V3 FMC_15 J76 VCC3V3 FMC_15 5V and 3.3V Power Supplies 1 VCCINT 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 J70 2 3 4 5 6 7 8 9 10 11 12 13 14 15 FMC_15 1 B 1 B J71 FMC_15 J77 Title: 2 3 4 5 6 7 8 9 10 11 12 13 14 15 2 3 4 5 6 7 8 9 10 11 12 13 14 15 A Power Supplies SCHEM, ROHS COMPLIANT ML505/6/7 VIRTEX-5 EVALUATION PLATFORM, 1280415 0381241 A 1-22-2008_14:51 Date: Sheet Size: B Sheet 4 3 2 26 of Ver: A Rev: 02 Drawn By 27 BP 1 4 3 2 1 VCCINT Caps 0.1UF X5R 10V D 4 3 2 1 CP103 0.1UF X5R 10V 4 3 2 1 CP102 0.1UF X5R 10V 4 2.5V TANT 3 2 CP101 2.5V TANT 2 2 1 C372 330UF 4 1 3 C371 330UF CP100 1 2 1 C363 X5R 2 10V 10UF 1 1 C362 X5R 2 10V 10UF 5 1 C361 X5R 2 10V 10UF 6 1 C360 X5R 2 10V 10UF 7 1 C359 X5R 2 10V 10UF 8 1 C358 X5R 2 10V 10UF 5 1 C357 X5R 2 10V 10UF 6 1 C354 0.1UF 2 10V X5R 7 1 C353 0.1UF 2 10V X5R 8 1 C369 0.1UF 2 10V X5R 5 1 C368 0.1UF 2 10V X5R 6 1 C366 1 C367 0.1UF 0.1UF 2 10V 2 10V X5R X5R 7 1 C365 0.1UF 2 10V X5R 8 1 C364 0.1UF 2 10V X5R 5 1 C352 0.1UF 2 10V X5R 6 1 C351 0.1UF 2 10V X5R 7 8 1 C350 0.1UF 2 10V X5R 0.1UF X5R 10V VCCINT D VCCO Caps 0.1UF X5R 10V 1 C380 1 C381 0.1UF 0.1UF 2 10V 2 10V X5R X5R 1 C382 0.1UF 2 10V X5R 1 C383 0.1UF 2 10V X5R 1 C384 0.1UF 2 10V X5R 1 C385 0.1UF 2 10V X5R 1 C390 X5R 2 10V 10UF 1 C391 X5R 2 10V 10UF 1 C392 X5R 2 10V 10UF 1 C387 X5R 2 10V 10UF 1 C388 X5R 2 10V 10UF 1 C394 1 47UF C395 1 47UF C396 1 47UF C397 1 47UF C398 1 47UF C399 1 47UF C400 1 47UF C401 1 47UF C402 1 NS 2 6.3V 2 TANT 6.3V 2 TANT 6.3V 2 TANT 6.3V 2 TANT 6.3V 2 TANT 6.3V 2 TANT 6.3V 2 TANT 6.3V 2 TANT NA 2 TANT C403 NS NA TANT 4 3 CP122 2 1 4 3 CP121 2 1 5 6 7 8 5 6 7 8 0.1UF X5R 10V VCC3V3 C C VCCO_EXP VCCAUX VTTVREF 6.3V TANT 1 C422 0.01UF 2 16V X7R 1 C423 0.01UF 2 16V X7R 1 C424 0.01UF 2 16V X7R 1 C425 0.01UF 2 16V X7R 0.1UF X5R 10V 6.3V 2 TANT 1 C421 0.01UF 2 16V X7R 4 2 1 C420 0.01UF 2 16V X7R C434 47UF 3 C433 1 47UF CP110 1 1 0.1UF X5R 10V 4 3 CP128 2 1 1 C432 X5R 2 10V 10UF 5 1 C431 0.1UF 2 10V X5R 6 1 C430 0.1UF 2 10V X5R 7 6.3V TANT 8 2 5 C428 47UF 6 1 7 8 1 C426 0.1UF 2 10V X5R 2 VCC2V5 1 C373 0.1UF 2 10V X5R 1 C374 0.1UF 2 10V X5R 1 2 C375 33UF 6.3V TANT 1 C377 X5R 2 10V 10UF 1 C378 X5R 2 10V 10UF VCCAUX Caps 0.1UF X5R 10V 1 C410 0.1UF 2 10V X5R 1 C411 0.1UF 2 10V X5R 1 C412 X5R 2 10V 10UF 1 C413 X5R 2 10V 10UF 1 C414 1 47UF C415 1 47UF C416 1 47UF 2 6.3V 2 TANT 6.3V 2 TANT 6.3V 2 TANT B C417 47UF 6.3V TANT 4 3 2 CP131 1 4 3 CP130 2 1 5 6 7 8 5 6 7 8 B 0.1UF X5R 10V VCC1V8 Title: A FPGA Decoupling SCHEM, ROHS COMPLIANT ML505/6/7 VIRTEX-5 EVALUATION PLATFORM, 1280415 0381241 A 1-22-2008_14:51 Date: Sheet Size: B Sheet 4 3 2 27 of Ver: A Rev: 02 Drawn By 27 BP 1
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