CALIFORNIA STATE UNIVERSITY, NORTHRIDGE
A TONE CONTROL DIGITAL FILTER
1\
A project submitted in partial satisfaction of the
requirements for the degree of Master of Science in
Engineering
by
Rolando de los Angeles Santos
June, 1979
The project of Rolando de los Angeles Santos is
approved:
Ephraim Mendelovicz
California State University, Northridge
ii
DEDICATION
To my wife Mariana, my son Rolando, and my parents
without whom this would not have been possible.
iii
TABLE OF CONTENTS
Page
1) Dedication •••••••••••••••••••••••••••••••••• iii
2) Abstract. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . vi
3) Derivation ........................... , ...... 1
4) Implementation •••••••••••••••••••••••••••••• 60
5) Operation and Test Procedure •••••••••••••••• 67
6) Test Results •••••••••••••••••••••••••••••••• 69
7) Bibliography •••••••••••••••••••••••••••••••• 7J
8) Appendix 1 (Calculator Programs) •••••••••••• 74
9) Appendix 2 (Specifications) ••••••••••••••••• 85
10) Appendix J (Logic Circuits) ••••••••••••••••• 92
iv
TABLE OF FIGURES AND GRAPHS
Page
1) Figure 1; Ideal Response •••••••••••••••••••••• 2
2) Figure 2; Filter Circuit ...................... 2
J) Figure J; Equivalent Circuit •••••••••••••••••• 4
4) Table l; Resistor Values for Different Filter
Gains. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
5) Table 2; Filter Coefficients •••••••••••••••••• 10
6) Table J; Filter Coefficients Hexadecimal
Notation ......................................... 11
7) Tables 4 through 24; Gain and Phase of Filter. 13-53
8) Figures 4 through 24; Gain and Phase of
Filter Plots ••••••••••••••••••••••••••••••••••••• 14-54
9) Figure 25; Timing Diagram ••••••••••••••••••••• 56
10) Figure 26; Box Layout ••• .- ••••••••••••••••••••• 57
11) Table 25; Prom Addresses for Constants •••••••• 58
12) Table 26; Definition of Abbreviations ••••••••• 61
13) Photograph 1; Boost Response, Small Signal •••• 70
14) Photograph 2; Cut Response, Small Signal •••••• 71
15) Photograph 3; Large Signal Boost Response ••••• 71
16) Photograph 4; Large Signal Cut Response ••••••• 72
v
ABSTRACT
A TONE CONTROL DIGITAL FILTER
by
Rolando de los Angeles Santos
Master of Science in Engineering
This graduate project consists of an application of a
digital filter to a real world problem.
The conditioning
of signals in the audio world has up to very recent times
been accomplished with analog devices.
Negative feedback
tone control in vacuum tube circuits was introduced for the
first time by P. J. Baxandall in 1952.
After this, the
operational amplifier in integrated circuit form appeared,
and up to now has been the primary building block for audio
filters.
The transfer function of a basic tone control passive
circuit will be derived.
After prewarping the cutoff
frequencies of this analog filter, the bilinear z transform
will be used to yield a usable digital filter.
The cons-
tants of the digital filter will be determined by the
potentiometer setting in the analog filter that would yield
the desired frequency response characteristics.
A total of
21 sets of constants will result since the range of attenuation levels varies from 0 to -40 db in 2 db increments.
The circuit will be preceded by a data acquisition
module that will digitize the analog signal, and followed
by a signal recovery module that will convert the digital
output to an analog waveform for reproduction.
vii
DERIVATION
The treble shaping circuit response should look like
the one depicted in figure 1.
Since the range of frequen-
cies of interest is from about JO Hz to 20 KHz, f1 will be
selected as 2 KHz and f2 as 20 KHz.
These will be the
final frequencies of the digital filter so that the analog
equivalent frequencies will differ from these values
because of the bilinear transformation.
The circuit shown
in figure 2 accomplishes the task described above.
The treble turnover frequency f1 occurs when the reactance of C1 equals R1 and the reactance of C2 equals RJ•
Therefore ,
1
-1-
The maximum amount of treble boost at frequency f2
is obtained when the reactance of C1 equals RJ• so :
1
f 2 -- 27fRJCl
•
-2-
The maximum amount of treble boost or cut is given by
the following ratios
a
1
--
-
·-
---------
•-.-
-
--
. ··---
--------
·-·-----~---------~--~--~---~~
I
GAIN
'
FIGURE
\
\DEAL RESPONSE
FIGURE 2
FlLTER ClRCUlT
----~
---
~-
-- -
---~
~-
---~---
'
RJ
c1
--= treble boost or cut amount
Rl- c2
-J-
For this circuit to operate properly, the potentiometer value R2 has to be much greater than Rl, and R1 in turn
has to be greater than RJ•
To calculate the frequency response of the circuit,
potentiometer R2 is divided into two resistors, Rb and Rc·
This simplifies the calculation of the frequency response
by taking Rl in parallel with Rb and RJ in parallel with
Rc·
The values of Rb and Rc are different for each trans-
fer function that is selected in the final realization and
are responsible for the variations of the coefficients of
the digital filter.
The exact values for Rc are determined
with a calculator program.
The values for Rb are obtained
from these by the following relationship :
-4When substituting Rb and Rc into the circuit, the diagram of figure J results.
The equation for the input vol-
tage is :
RlRb
1 t 1
ei = I [ sC1
sC2 of Rl+ Rb
1
+ R3Rc]
RJ+Rcj •
-5-
Similarly :
eo
=I
[
s~2 + ~~~~c] ·
-6-
From these equations for the input and output voltage
waveforms, the analog transfer function can be derived.
division of equation 6 by 5, yields :
The
4
l
i
I
RB
Rl
RC
FIGURE 3
EQUIVALENT ClRCUIT
5
_
e· -
~
l.
_L
sC2
1
1
sCl + sC2
+ R3Rc
+
R3 Rc
•
RlRb
R3Rc
Rl+Rb + R.3fRc
-7-
By definition the ratio of C1 to C2 equals
Cl _ r
C2'
-8-
then ,
_L
H(s)
sC2
1
1
srC2 + sC2
R3Rc
+ R3 Rc
+
R3Rc
R.3+Rc
RbRl "
+ Rb+Rl
-9-
Finally, taking l/sC2 as a common multiple in the
denominator :
l + sC2R3Rc
R3+Rc
•
R3Rc
RbRl]
+ sC 2 [ RJ+Rc + Rb+Rl
H(s)
-10-
Having the filter transfer function in terms of s,
the transfer function in terms of z (the discrete variable)
can be obtained by means of the bilinear z transformation,
which is defined as follows :
_2
-11-
s-T
where ; T = 1/fs and fs is the sampling frequency.
Since, fs
= 50Xlo.3
Hz, then 1/fs = T = 2.Xlo-5 sec.
Finally :
s=
z] ·
1Xlo5 [ 11 +- z
-12-
Substituting this expression in equation 10 above
results in the following expression for the digital transfer
function.
H(z)
=1 +
-13-
1
r
This equation is rearranged to yield :
H(z)
-14-
(l+i')+ lXl05 ( l-i') C2R3Rc + C2RbR~1 •
(l+.!)
r
Rc+RJ
Rb+Rl j
Finally, separating numerator and denominator for
easier representation
1
numH( z) - 1 + l>(lo5(C2R3Rcl + z'[l-1Xlo5 C2R3Rcl .
RJ+Rc ]
RJ+Rc J '
denomH(z) - 1 +.! +lXl-05 [C2R3Rc + C2RbRlJ
r
RJ+Rc
Rb+Rl
z·l [l-t.! _
r
-15-
+
lXlO~ ( C2R3Rc
+ C2RbRl\l
Rc+RJ
Rb+Rl1J
•
_16 _
For the sake of simplified _notation, define
A= l
+ r1 + lXlo5
B = l
+ 1r
C = 1
2RJRc) ;
+ 1Xl05 ( C
R34Rc
D
[ C2R3Rc + C2RbRl)
RJ+Rc
Rb+Rl
-lXlo5 ( C2RcR3
RJ+Rc
+ C2RbRl)
Rb+Rl
J
-17-18-
-19-
1 - 1Xlo5 ( C2R3Rc)
RJ+Rc
-20-
Since. H(z) = Y(z)/X(z), then
Xi..U _ c + nz-1
-21-
X(z) - A +Bz-1
This equation can be expanded to :
AY(z) + Bz'" 1Y(z) = CX(z)
+ Dz- X(z)
1
The corresponding difference equation is
1
-22-
f
Ay(n)
+
By(n-1) =Cx(n)
+
Dx(n-1)
-23-
•
Therefore the digital filter is :
y(n)
= C/A(x(n)] + D/A (x(n-1)]-
B/A(y(n-1))
•
-24-
To determine the constants for this recursive digital
filter, the values of the capacitors and resistors in the
original circuit have to be determined.
As stated pre-
viously, the bilinear transformation causes a frequency
warping which has to be compensated for before proceeding
to use it.
The equation giving the relationship between
the analog and the digital frequencies is ,
fs = (l/7tT} tan(7t'fzT)
-25-
The values for the cutoff frequencies are obtained by
substituting the appropiate values in equation 25
f1 = (50000/1'() tan(7C'•2000/50000)
f2
=
= 2010.5945
(50000/~) tan(~·20000/50000)
Hz
= 48982.8548 Hz •
Using these values in equation 1 and assuming a value
of 1000 Ohms for R3, the value of C2 is obtained :
C2
~ 2~~1R3
2n(2010.~945}1000
= 7.9158151Xlo-8 fd •
To obtain Cl, equation 2 is used
Cl =
2"~2R3
=27t'(48982.~548)1000
=-3· 249197Xl0-
9
fd •
Now, the ratio of C1 to C2 can be calculated.
r
= cCl2
= .04104 69037 •
Finally, knowing C1, R1 can be obtained using equation
1.
'
8
Rl
= 2n~ 1c1 ~ 2rr(2010.5945)~.249197Xl0-9
1
Rl= 2.4J62J74Xl04 Ohms.
Since Rc and Rb are still to be determined before
establishing the different constants, a calculator program
was used to find the value of Rc that would yield the desired gain at 20 KHz.
The program decrements the value of Rc
from an initial value of 1M
and compares the magnitude of
the transfer function at 20 KHz given the specific value of
Rc, to the desired gain at 20 KHz.
When a value of Rc is
reached which yields an equal or smaller gain, the program
stops and this value is used.
This program yields a result
that is accurate to within less than one Ohm.
See appendix
one for a listing of the program.
The values of Rc that correspond to the desired gains
are tabulated in table one.
There are twenty-one values of
Rc, each one producing a gain of 0 db to -40 db in 2 db
increments.
Using equations -17- through -20- the filter coefficients are calculated, now that all the variables are known.
Table two shows the decimal values for the filter coefficients. These are ; -B/A for y(n-1), C/A for x(n), and D/A
for x(n-1).
A calculator program was also used to calculate
these coefficients.
The program also changes these numbers
into base two notation (binary).
See appendix one for a
listing of the program.
Changing the numbers into binary notation introduces
f'
•
9'
····-·-···---····----·
TABLE
Gain (Db) *
--
........
··--·---····-··-·--......._..,
1
Rc (Ohms)
I
Rb (Ohms)
i
iI
I
I
0
-2
-4
-6
-8
-10
-12
-14
-16
-18
-20
-22
-24
-26
-28
-30
-32
-34
-36
-38
-40
998612
997798
996730
995282
993250
990238
985620
977609
961193
911250
39428
3319
1537
916
606
42)
306
225
168
125
92
Resistor Values for
Different Filter Gains
*At 20 KHz.
1388
2202
3270
4718
6750
9762
14380
22391
38807
88750
960572
996681
998463
999084
999394
999577
999694
999775
999832
999875
999908
i
-----
---
-
10'
--
TABLE
Gain
(Db)
0
-2
-4
-6
-8
-10
-12
-14
-16
-18
-20
-22
-24
-26
-28
-JO
-J2
-J4
-J6
-J8
-40
-··----
------··--------~-
2
-B/A
C/A
-.16167
-.02982
.09568
.21428
.)2466
.42644
.51621
.5962)
.66572
.72519
·77064
.76911
.76776
.76668
.76582
.76514
.76459
.76416
.76)81
.76)52
.76)29
.51740
.45868
.40278
.)4996
.)0079
.25546
.21547
.1798J
.14888
.122)9
.09999
.08177
.067)0
.05581
.04668
.OJ9J8
.0))60
.02894
.02526
.02222
.0197J
D/A
-.40124
-.J5569
-.Jl2J5
-.271)8
-.2JJ26
-.19810
-.16709
-.1)946
-.11545
-.09491
-.07706
-.05868
-.04408
-.0)248
-.02)26
-.01589
-.01006
-.005J5
-.00164
.00142
.00)94
Filter Coefficients
I
.. -----···--------~--------· - ____________________i
11
-
--
-·· -·
--------~-~-----
- ··- -
...
------~~-----------
-,
--
TABLE 3
Gain( Db)
0
-2
-4
-6
-8
-10
-12
-14
-16
-18
-20
-22
-24
-26
-28
-30
-.32
-.34
-J6
-J8
-40
I
-B/A
C/A
D/A
F5A7
FE17
061F
ODB6
14C7
1B4A
2109
2628
2A9B
2E69
.3152
3139
3122
3111
3103
30F7
.30EF
.30E7
.30E2
)ODD
JOD9
211D
1D5A
19C7
1665
1.340
1059
ODCA
OB82
0987
07D5
0666
E652
E9.3C
053B
044E
0392
02FC
0285
0226
OlDA
019D
Ol6C
0143
Filter Coefficients
Hexadecimal Notation
ECO~
EEAl
Fll2
F.352
F54E
F71.3
F89C
F9ED
FBll
FCJE
FD2E
FDEC
FE8.3
FEFB
FF5B
FFA8
FFE5
0017
0040
I
Ii
I
12·
an error that comes about because of the finite register
length used to represent the numbers.
As an end result,
this error can be considered as noise introduced by the system.
Since the format used by the multiplier is two's complement, the error introduced can be defined as s
Et
= Q(x)
-
X
-26-
where x is the number before truncation and Q(x) is the
number after truncation.
lows
The error will be bounded as fol-
1
-2-b
<
Et
,<.
0
-27-
where b is the register length.
The largest possible error considering the absolute
value will be z-b which is a negligible number considering
that the register length is 16 bits.
Table three gives the same coefficients as table two
but in hexadecimal notation.
Two bits have been reserved
for the sign and the 2° term, to provide for the possibility
of a
1 result.
The result, therefore, will consist of one
sign bit, one bit for the integer part, and 28 bits for the
fractional part.
The magnitude and phase response for each different
set of coefficients are shown in figures 4 through 24 and
the corresponding data for these plots are tabulated in
tables 4 through 24.
Refer to appendix one for the pro-
grams used to obtain this information.
1)
--
--------
. TABLE -4---------- -- ----
-·---------
0 Decibel Setting
Frequency (Hz)
0
1000
2000
)000
4000
5000
6ooo
7000
8000
9000
10000
11000
12000
1)000
14000
15000
16000
17000
18000
19000
20000
Gain (v/v)
Phase {radians)
.1
.1116
.1408
.1793
.2225
.2684
.3160
.3649
.4147
.4652
.5165
.5682
.6203
.6724
.7243
0
.4163
.694
.8486
.9299
·9693
.9833
.9809
·9670
·9446
.9156
.8809
.8413
·7974
.7492
.6972
.6412
.5816
.5184
.4518
·382
·7755
.8255
.8738
·9195
.9619
1.0000
Gain and Phase of Filter
14'
.,
15
. TABLE u 5 - ----·---- --
--u-----~----------~
-2 Decibel Setting
Frequency (Hz)
Gain ( v /v)
1
Phase (radians)
I
'·
0
1000
2000
JOOO
4000
5000
6000
7000
8000
9000
10000
11000
12000
13000
14000
15000
16000
17000
18000
19000
20000
.1
.1115
.1404
.1781
.22
.26)6
.J08
.J52J
.J961
.4J92
.4812
0
.4025
.6664
.8076
.8758
.5612
.9026
·9046
.891
.8668
.8J5J
-7982
·7571
.7127
·5987
.6656
.6)42
.6164
.6675
.5653
.6984
.7267
.5127
.4588
.40J8
.J478
.2911
.522
-7523
·7748
-7942
Gain and Phase of Filter
. ·----------
-
- - - ------- -
-- ---
----~----
~-
l
--
-
-- .
--
--··-·
- - - -..... -
16
_~:--L~-L-~--=-~~----~-.-::-==¥=-:-::-:~:--:-~~=--=t==~~-:-~ ;_,___1
------t--
f··-- ~
~
i--~-
~·
.. -==-E
-- _c-- -~
__ ,c~--,- - .-=[ --
---~,~-~~-
..=--~
"'=~~
--+
=:.
Tr=:
-;.--+::i-;I
. ..
. . '
~~--·-·e-._:_-~~'
I
' t-t-r-
I
:---r-+ \--l-+-+-t-'--'f-1
i
:Tf 0
~-+----tf)_, E:~-~~-~":'=i=~~=="=~l"=~~±==='~=*-=======~~;;~:-~-~-=~~j-_,.,==:::-:":"f 0
- --~:~~~: ... -. --~1-Q.
---
--··
'
; I I;-:, I I
<If
·-.
-=-:-:=---=----==:-:.=-~-r
-. .-.:._ ·~~-~,·_=:t_.tt:' --·
:_- --__,
-=-·=---~-:~
-:<(~.='i::.:L-{:·:=----~:----=--·---'--t='--c___
... i---:.
.. -
--
-:· ::...:::=:F'i=---
;c=-=
.-
.-
-- ------- :__ ::;:-::... :.:.-
~i~--~~~A~~~~~~~;-~~=~~!~~~~~--i~~~~~~~=:~~~
17
-·
----
-~-~----
.
-~
---
··---
-
-----~--
---.------
~---------------
TABLE 6
-4 Decibel Setting
Frequency (Hz)
Gain (v/v)
0
1000
2000
3000
4000
.1
.1114
.1J97
.1763
.2161
5000
.2566
6ooo
7000
8000
9000
10000
11000
12000
13000
14000
15000
16000
17000
18000
19000
20000
.2963
·3347
.J71J
.4057
.4377
.4674
.4947
Phase (radians)
.5195
.542
.5621
.58
·59 58
.6095
.6212
.6309
Gain and Phase of Filter
0
.]856
.6330
·7583
.8116
.8246
.8144
·7901
·7571
.7186
.6767
.6325
.5872
.5411
.4948
.4485
.4024
.]565
.3110
.2558
.2209
18
I
'
'
'
:
__;__---i----1-+~+--f_,_j_
=
'
o_::f-_--
l
I
~--'-
i
~
3:f:
::::::::;=:
r=-~
-.______,-+-
I
19
------
~. ·-----·-··~----··-----
---···---~~--------~---l
TABLE 7
.
I
-6 Decibel Setting
Frequency (Hz)
0
1000
2000
3000
4000
5000
6ooo
7000
8000
9000
10000
11000
12000
13000
14000
15000
16000
17000
18000
19000
20000
Gain (v/v)
Phase (radians)
.1
.1112
.1387
.1736
.2104
.2464
.2804
.3116
·34
.3653
.3879
.4077
.4252
.4404
.4536
.4650
.4749
.4833
.4904
.4963
.5012
0
.3647
·5921
.6987
·7354
·7343
.7125
.6795
.6404
·5984
·5553
.5121
.4695
.4278
.3873
.3478
-3096
.2724
.2361
.2008
.1661
Gain and Phase of Filter
20
I
~_,,:_ -::~-J~::~~ _,-~-
-
.=:~_::::
r=-=- -=-'.7 !---- .-:,.;-'
.:t6-;
~
=
n
=
_,
=
f:
tr-
'
21
TABLE 8
-8 Decibel Setting
Frequency (Hz)
0
1000
2000
3000
4000
5000
6ooo
7000
8000
9000
10000
11000
12000
13000
14000
15000
16000
17000
18000
19000
20000
Gain (v/v)
Phase (radians)
.1
.1109
.1372
.1695
.2021
.2325
.2596
.2831
.3033
.3205
·335
.3472
·3575
.3662
·3735
·3797
.3848
.3891
·3927
·3957
·3981
0
·3389
.542
.6274
.6466
.6322
.6013
.5629
.5216
.4801
.4395
.4oo6
.3635
.3283
.2949
.2631
.2328
.2039
.1760
.1492
.1231
Gain and Phase of Filter
22
- --.------r-----·- ------.---··
---
·=
=
·=::::.:=;= .
...:::?--'---H- .=t
.
. '
--.--,----
--'-
L'+-i--~
-+-+--+-+
----r-1_-H-
·---t+-i---
0
"•~~~-+-+-+~-T--1---+:
~-Ji=tl I--+--'--,--l--+-1--+-lr--:--+-rl o
..
I ' ' .
' '
.
~_;1¥· - ., --~~-~~~ - =~ ~~:d
:;-f,~-·
-- ---~-=E
::::t:::::
'l-
-=l
~--,~~~
.-o."'
;;.f;
___·_-b'.----·-::.
·===..·
::~_
___.___
~
--~=
=-
.i
-7'
L.. k': 'V ··-'- ! . I -:--'\_ ---r-:-r
i.
~
c=J-:
-'----~----
'
~~--- ~ ~~
'=
-=-=::f
'
c.==.
;-'~-
I
'
-L ,......
!
-
~
6
''\F:- ·__ !-= -- _,.:;.~
:_·:J.::%-· --~: ~~
---+--~~-= . .
-- -:-r=-=t---- ~3':::
=r~-=f-~
~
',-i
i
~=- ;c\.c,,_~
-:--' '
~
''~-¥¥-~
~- -:~'- -=t.-=---~;~-~~~-0~,- ~
i
c-r--~
=FfT .
.,.---+--
~
~--.
:
~
. -'\ ___;__ -+-+ -.,._
--'---- -+--r-- ~ . - 1---
o_
.
2}
------
---
--·--
-~--
--
----~--------------------;
TABLE 9
I
'
-10 Decibel Setting
Frequency (Hz)
0
1000
2000
3000
4000
5000
6ooo
7000
8000
9000
10000
11000
12000
13000
14000
15000
16000
17000
18000
19000
20000
Gain (v/v)
Phase (radians)
.1
.1103
.1349
.1635
.1908
.2144
.2342
.2503
.2633
.2739
.2824
.2893
.2949
.2996
.3034
.3065
.3091
.3112
.313
-3144
-3156
0
.3065
.4805
.5424
.5449
.52
.484
.4446
.4054
.3681
-3331
.3007
.2707
.2428
.2169
.1926
.1698
.1481
.1276
.1078
.0888
Gain and Phase of Filter
24
, I
=
I
-~li~~
·_.:,y:~
"--j
~.-~
.=---+
~
-t::c
-:'}:=
•- •=..,__ --:-~=--
' -'
c--,--- --~
=._, ___:::
---;---:-~
I
'
;LI
-~':z-;__:
-;:r --!='>
=====±c
-+
+
===:i:=
----1--7--
·-~-~
c'\;.
-:---------'-- --
'
'
I
25
-
----·--·----
.
-----~----~
TABLE 10
!
-12 Decibel Setting
Frequency (Hz)
0
1000
2000
3000
4000
5000
6000
7000
8000
9000
10000
11000
12000
13000
14000
15000
16000
17000
18000
19000
20000
Gain {v/v)
Phase {radians)
.1
.1096
.1314
0
.267
.4079
.4466
.4356
.4052
.3692
·3333
.2998
.2692
.2415
.2164
.1937
.1729
.1538
.1)62
.1197
.1042
.0896
.1553
.1763
.1932
.2062
.2162
.2239
.2299
.2345
.2381
.2411
.2434
.2453
.2468
.2481
.2491
.25
.2506
.2512
Gain and Phase of Filter
.0756
.0622
--j-- - - - , - -
- - - . - - - ; - - - - - - - · · - - · __________ 1 ____ _
.T
'
'
"·-_c·~-
~1=" ..
=
I
·_[
I
I
I
--~ ~;:; ~
-==
="
==
====·=--::t:•c:_::=~==
-=r- :.. c-.._
....--l.-
:..__:
-
.
'
.
-~
-~1--
:c '
.
. =?S·
j::=-~
t-----:
-·····
~~~
..
•-'---'-
c:....-+-c-~:
·----"-+-
--
!'-
.J'
- -=!',
===
:-:7-T. __:_~.
i
'
"-::1
"""::::;:::::
~:§
~-
--
·--: -..,I
-i-H-+
.J. '--+--
.
r=;=:
'
27
..
-
·~-
. ·-
---
- ·---------··-·-··
--~----
----
-·
---·----------··---~~-~-!
TABLE 11
-14 Decibel Setting
Frequency (Hz)
0
1000
2000
3000
4000
5000
6ooo
7000
8000
9000
10000
11000
12000
13000
14000
15000
16000
17000
18000
19000
20000
Gain (v/v)
Phase (radians)
.1
.1083
.1265
.1445
.1588
.1694
.177
.1824
.1865
.1895
.1917
.1935
.1949
.196
.1969
.1976
.1981
.1986
.199
.1993
.1995
0
.2179
.3217
·3392
.3203
.2903
.2594
.2307
.2051
.1826
.1627
.1450
.1293
.1150
.1020
.0901
.0791
.0688
.0590
.0498
.0409
Gain and Phase of Filter
.
~
~.
1.. - ..
i
__: i :~=.:---;
:
(\l.- ' :
•i
-;-_cbJ'·_ ·,
~
! .-
I
!
-
:1'
;
l
I : \( :1. ;
,
!
i
')•
I
! :..
i
: ;
• ;
~'\ +-\-J(\fJ--+---+-~-+-.;.cr'\
·•
!
I
i
,
j
!
I
·
I
;
i
'
Nl-
!
-~·
'f1:'=
--+-~
I
'
--+~-~~~~.-+l~:~;~~.~~~-++,1~~~~+'~'-+~'~l~-+~-+~~+,~,~~--J~•-~~.~r~.-+,~-++-~--+4~
-=r=
==="
~
_z--'"-;§so.c;-.. Q
=====-~ '=-' - -~-
=
.F==='=
:f
.·t-
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-===-z.
·~- --r--
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-~·---f·=-1
-~f-~
---t-'-- --
.:.:..-:lc.'''-'---··~-:==1"-.::0
. c=:." -·
-~0
b-=-
---r-----+·.,.. :
-=-=':.-o,·,... Jccc:c. ,.:·~-:'? -.~:1i't*•::'.c---• :C_ccC:~=-"---..'_,:c_.,.-,.---.:c:=-:.- :: ., -"o_cocc'oc~o•"l'-==·- _,,:._:;:
Fe•····
..,..-.•-..::::·cc:.:C~·-' ---- ·---- --------- -- ::-;~.-;~}.:0
~-··_·-__ f~':~ -~<~~~;;t~~~~~~~~~~~~~ti~.::j';..-~~~~ ~~;:;.~~
~-'::C~~:~r-~ ·~ .: -~~~==~=~=--:---'- ::=::.~:::::=.=:= ~=== =~~~-=-~- ·::':-::j~~:~:::=--=~~ ~===-~ ~~
·-=-~:..-:: r-=:-=-• ~::•=: ·_:-::-:=--===-=-. ~~::···:= ~~:-=- ==--=:-= ~-.~--~~: -==- , -=·::=~~::::.~~-:.::= --_
:_;: .- .:
.......,----'
: :._:
~-::;~~-
- :-~
i f~
--~
;
'--:-t~
--t----
.--~ - -
'
I
'
~- ~~:
-:~·;·.;<+;
_ __.__._-:-t:C=F~==--~'-+"'-+--'-+--l-t-'·..=t=~.-''-+-'...;.:_~,_:ll+il-;-...,le-.-~+'~-~-+-'"'t-_'"~-:-_,__-'-:-+j-'r-ir.,;;;,,_.__+-+_:,:~-=- ~- t \±-~::=~ ~Lj--
-<C-.---t....;.-.:.--"--'--+-+--+--~-+-------'---'-+-+-+--'-_,_+_1~
'
!
·t-+- ---y--·,'--c,,--1--~-;._,._-J--,-~.
.
,.,
' .....)___;..__._
,,
TABLE 12
-16 Decibel Setting
Frequency (Hz)
0
1000
2000
3000
4000
5000
6ooo
7000
8000
9000
10000
11000
12000
13000
14000
15000
16000
17000
18000
19000
20000
Gain (v/v)
Phase (radians)
.1
.1066
.1196
.1312
.1394
.1449
.1486
.1512
.153
.1543
0
.1578
.2231
.2253
.2058
.1821
.16
.1406
.124
.1096
.0972
.0863
.0767
.0681
.0603
.0532
.0466
.0405
.0347
.0293
.0240
.1553
.1560
.1566
.1570
.1574
.1577
.1579
.1581
.1583
.1584
.1584
Gain and Phase of Filter
-------
'
)0"
==r
_-~
---r--~-r:
. . --r--:=
.
!
.'
~,--~ +-~-"-...i,.,..IJ~ll.'-.
'
~lJ
H :;-·.
I
·~~-·--;--;-~Pt-:.c.'--'--:...: -::-H~L\-:
='-'-+-'!u.l
I .1'\,..:--+-+-l;-\1-~=
§ ===:: -_
_;_;__:.·A-
=E
E:; __ -
,=-__ s-
E=~
=~~-
-- :·" ,...
~
-=
~--
=
I
I
:
!
I
i
_-r-:...: ::::: !.'=".:"
. ~&<'"
··::z=t=:::
--------t- I--·
-=
-_-_-y
'
===
'
31'
TABLE 13
-18 Decibel Setting
Frequency (Hz)
0
1000
2000
3000
4000
.5000
6ooo
7000
8000
9000
10000
11000
12000
13000
14000
1.5000
16000
17000
18000
19000
20000
Gain (v/v)
Phase (radians)
.1
.1039
.1107
.116
.1193
.1214
.1227
.123.5
.1241
.1246
.1249
.12.51
.12.53
.12.54
.12.56
.12.56
.12.57
.12.58
.12.58
.12.59
.12.59
0
.08.5.5
.1144
.1103
.0976
.0846
.0733
.0639
.0.5.59
.0492
.043.5
.038.5
.0342
.0303
.0268
.0236
.0207
.0179
.01.54
.013
.0106
Gain and Phase of Filter
·-------------------
;
·-----~----~--------------
32
;r;. __:. _ - :-
•__j _ .~.-~r~ :-.T~ __
+~-: _;_;:-:::+~:.:_;-_:_;-t-'-;- -;--t--'
-------,----I
"I
I
_j_'
'
:~
I
.t~·
'(Ti
:_ -'_ )f_
-~~--:
I
'
'
~-~~;--:~:,H."J"--1-1---t-+-1-.-'-+--t----£,(- >f-R=t
I
-"----_ '=·~,:~:=:~_~:~co-,
=-
-"--- -_jco,_-:':'·cc~--'~
N
!:::
L.l.o
~-o_--,o~~
;-"=t: . -,=t--
. ~-::-e-r-r· .---;-:~~
=
'
I
I
i
'
I
!
t
I
~.~.~.-.-+!-~~~+~~~,_r++-i-rr+~~~-1-r++-i-r++~r++1~r+4-1~~-1-r+·~~"
'
''
! ; !
11!
:.:;: -,
0
l
I
I
I
I: I 1
~#k--~----
t
___:_
'==+=-
·--
t
J.
-:::=.:_ .
'
I
..
- - _;:_:- _;:_ 0
-=i ~=~ r-1--- -~~
~~=*-. :~Fb+=
~~=t
~~====~~=-~~
1
"'=s=. ~' =~
-
33
-
--···-····----------
----
----,
TABLE 14
-20 Decibel Setting
Frequency (Hz)
0
1000
2000
3000
4000
5000
6ooo
7000
8000
9000
10000
11000
12000
13000
14000
15000
16000
17000
18000
19000
20000
Gain (v/v)
Phase (radians)
.1
.1
.1
.1
.1
.1
.1
.1
.1
.1
.1
.1
.1
.1
.1
.1
.1
.1
.1
.1
.1
Gain and Phase of Filter
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
-:...::::.-tr::::::::=::J:::·r-·::::::=:3+:=E:::::.=:~.-=:=::::·::Jt-==.=
__=__ ~·~~~~~~1!.~-~;_=_~;;~;:~:~=l_-=.::-·=";
,.
.
.
.__ ;~:;::~::.J_.1
..
·_-:-:::_---~--:-------;-----"--'-----
r-------:----r·.
~
,·-··
~
-;-
I
!
'
.. •
'
i
N
t-
o::
=
--
-=v
,. ==== ~---.l=F::--=:C..: ,===i:::,
=
==fl'-f--
-f-,-:.,..
--
.. L.....-j-
~-
!
1
r
I
~~~ +++"-r-
~ : ~:-~.~~-~~~~-4-4~--._JI_f~-+-+1-+-+-L-L~~~-i;-+-+-+-+-+-+-+-~~~~~-+~,-+,~
. -~0·- -~~E:..·-­
~· --·::=-=-~
.-1
. "=+"
0
00
-~~~~~~--~~~,-+-~-+-+-+~-~~~~~~-,~l~-1-+-+-+-+--+~~-L~~~-----+-c
I ~ !·t=--:==·
.~
.•
~--. [To_ .:'i.~•E 0
:::r
==
~
~--~~
=-1.-l
F
==-- .
~-=-=
i
~~~~~~
-===--' ~
=x.
.::t:---.--
---~==
=+
-~-~
-===·
-~
o--
':'_c . - ·- -~~-::.:, ~:=±
_·.:. -:t::.:==
----+-·;
--
=
i--r'
I
I
I
f
TABLE 15
-22 Decibel Setting
Frequency (Hz)
0
1000
2000
3000
4000
5000
6000
7000
8000
9000
10000
11000
12000
13000
14000
15000
16000
17000
18000
19000
20000
Gain (v/v)
Phase (radians)
.1
.0965
.Q906
.0865
.0840
.0826
.0816
.0810
.0806
.0803
.0801
.08
.0798
.0797
.0797
.0796
.0795
.0795
.0795
.0795
.0794
Gain and Phase of Filter
0
-.0837
-.1139
-.1113
-.0992
-.0864
-.0751
-.0655
-.0575
-.0506
-.0448
-.0397
-.0352
-. 0312
-.0276
-.0243
-.0213
-.0185
-.0159
-.0134
-.011
'
J6
--r-·
.-·
~
~C::~ccc='-_::)
:c=
-T
I
··--·
·:--
~-...,...r:::.
-;:
,":')
-
'
:__-'-~--l-'-'---'--·- -----1--'------····· ··-
~ __ .:_!__,'_-!-•-----~·-
37
---~----
---- ----·-- ---
. ----- -~--··---~-------··· ----~-------,
'
TABLE 16
-24 Decibel Setting
Frequency (Hz)
0
1000
2000
)000
4000
.5000
6ooo
7000
8000
9000
10000
11000
12000
1)000
14000
15000
16000
17000
18000
19000
20000
Gain (v/v)
Phase (radians)
.1
.0942
.084)
.0769
.072)
.0694
.0676
.o664
0
-.1.536
-.2211
-.2267
-.2092
-.186)
-.1644
-.1449
-.128
-.1133
-.1006
-.0894
-.0795
-.0706
-.0626
.0655
.0649
.064.5
.0642
.06)9
.06)7
.06)6
.06)4
.06JJ
.06JJ
.06)2
.06)1
.06)1
Gain and Phase of Filter
-.0552
-.0484
-.0420
-.0)61
-.0)04
-.025
J8
'·'i'
.-,~
'
~~--2-+'f~r.-'+! ~~::'
!"+~--1-+!
ii'IL
;(j?.:::'
'i
;~
+
,'
N
~~~~~~-~~~~~t~~==r~~~~- ~--~-::~~~~ ~~-~~~J~i~~~; ffi
--~- ~=:'
==~~
-=+=1-<' :C
IO:::i
~-----:----r-
f-----.-
-_c--===-r
·--~
-
f---
-;~~-~-
--~ ~
···:---~
-~_::;-
=
---
.::::
.
-,.-+-~--
-t-:
'
-- ++:
' '
~
!
__,_,
1
-''-~~+---+-.;_ ·-~~ \ -4-''--"-'+~.!....)ji-+-1-~B-+-,'--+,-+++---!-,-L,-+.-'-+-H-+;-:~-~+->,'~+f+tt+
0
_c,.-1~
~
~%_-_-._
.• :'_•_": __
~-~~::__., c)
l~·i·~-~~S£~·~-i·i·~==~--~~-~~~~~~li~~--~-~-~~·i~-~-~-~~~~~~~~li~~~~-~-·~-~--~~~~--~-~~~~-~-,~;-~-~-s~•?E~--~-~--~-~-~~,
=r=.=.r·
.
- f=
__ .,==!:=-
:r=:
-=tX-
-':1-
·- c:•c-: 'i\c:- ..
::==-'--c=·::,~
~-
='\;~l
- =_·_=;=_
:=::==
.::E='
_- - -
--+--
.
~~
:'_::==E3---ti·
. - -
=
_,_...::t::'
----
.•.-.~--of'-.---
~­
'==!=
~­
·-=e=~-·~
__
.
,_
~
,--~-
' '
71
i
.
0
==t
+-
=+=-=.:-
+-
___ - __
·- --t:'"
'-+-
39"
..
--
-~----
-~--
----
--
-~------~---·
-~--~--~-----------~-~-~~----
-~
I
TABLE 17
I
;
-26 Decibel Setting
Frequency (Hz)
Gain (v/v)
0
1000
2000
3000
4000
.1
.0928
.0801
.0702
.0638
5000
.0597
.0570
.0552
.0539
.0530
.0523
6ooo
7000
8000
9000
10000
11000
12000
13000
14000
15000
16000
17000
18000
19000
20000
t
Phase (radians)
0
-.2108
-.3172
-.34
-.3247
-.2967
-.2666
-.2380
-.2123
-.1894
-.1690
-.1509
-.1346
-.1198
-.1064
-.0940
.0518
.0514
.0511
.0809
.0507
.0505
-.0825
.0504
-.0718
-.0616
.0503
.0502
-.0520
.0501
-.0428
Gain and Phase of Filter
.
-----
-- ·---·-------------------
---------~·-----------~-------------'
4o
__ { ~-=~--j _________!
-r-
--l ----··- - - - - ! -
:_r_~
-:---t
: •
-
- -
- :<c:
:
~
I
~----
t
<~~--~'~-----'-
'
.
1
c' --
.;-===:
;
--~ ::
·.
· ·
--- ,_
1
~tR' :=:!
~cc=:~f~ ==-~- ~----'~~.i.-. P.-;
1
.
~:_.·~·- -=-•Glit_ ~,~--·--=c~-~~J
· -- ~= - - - -- -
..
;· .:Jc,y~til' '+< ·'-LH<fl'+-~'~ .
;E?t'.~=r ~,
--->~:!=--
;
~_.,_I--·
..
- =£=
.
--
!-::::==::=-
·~;· -=:.~ ~~ •~8~
__ ___ ___
__t-o-: _~-~J=·
w-o
:J:
='.E-',
=
'
;-
+--+--
~
~~ :
:'---'·-~""-:.':
-,:-~
I "'
~~'"
1= nisi
-
to·
~~"~
--t-
-~
-
-:---+--
' '
--:
-~-
+--·
~
I
1
1
1
:·+ '-t+-:
1~+1-=,~i-:::t~~-.l.l~.;_''-:-'-i-!~ti=ti=t:ij
+-i-:-_~·:
--t:--;lj1~l-..i;,_--j-i-:f=_t4f=_t~~.:_:~+=.:~+:
·"=='~--=~-~ ==--- _;_ 0
i
8.
:
~~jff~ ===
!='"
~ ~;"-_ ~:2
-----
-·;
:'::
-'~
41
TABLE 18
-28 Decibel Setting
Frequency (Hz)
0
1000
2000
3000
4000
5000
6ooo
7000
8000
9000
10000
11000
12000
13000
14000
15000
16000
17000
18000
19000
20000
Gain (v/v)
Phase (radians)
.1
.0919
.0774
.0657
.0578
.0527
.0492
.0468
.0451
.0438
.0429
.0422
.0416
.0412
.0409
.o4o6
.0404
.0402
.04
.0399
.0398
0
-.2572
-.4003
-.4454
-.4398
-.4128
-·3787
-.3437
-.3103
-.2794
-.2513
-.2256
-.2022
-.1807
-.1609
Gain and Phase of Filter
~.1426
-.1254
-.1092
-.0939
-.0793
-.0653
42
, J
I
l
(
4J
TABLE-19 ____ -
--n---------•••------~
-JO Decibel Setting
Frequency (Hz)
0
1000
2000
3000
4000
5000
6000
7000
8000
9000
10000
11000
12000
13000
14000
15000
16000
17000
18000
19000
20000
I
Gain (v/v)
Phase (radians)
.1
.0914
.0757
0
-.2947
-.4705
.0627
-·5398
.0538
-.5492
-.5294
-.4966
-.459
-.4206
-.3834
-.3481
.0477
.0435
.0406
.0385
.0369
.0357
-.3151
.0348
.0340
-.2842
.0335
-.2554
.033
.0326
.0323
.0321
.0319
.0317
.0316
-.2284
-.2031
-.1791
Gain and Phase of Filter
-.1565
-.1348
-.1141
-.0940
44"
- __j _ _ _ ---------
----- 1- -----------;
--
---,---------=----~
-- ---------- I
-;_-_---~---:-
--f-----
~
C£---4---~•-;
__
-'±:0-=
~~~=
:=(: :::s-1
- --_____,___,___~- - = ~...,..=i==
~---=
===1
i" ---=1=----------·=+~
~
_;_~
.·-r---t--11
=
--
- -
I
0
0
o..
-
~-
---
- ··---.
-·-· -·-· -------·---··
-- ·-- ··-- --- ---·
-------··------·-------·~--------~--~,
TABLE 20
i
i
-32 Decibel Setting
Frequency (Hz)
0
1000
2000
3000
4000
5000
6000
7000
8000
9000
10000
11000
12000
13000
14000
15000
16000
17000
18000
19000
20000
I
Gain ( v/v)
Phase (radians)
.1
.0911
.0746
.0609
.0511
.o44J
.0396
.0)62
.OJJ7
.0)18
.0303
.0292
.0282
.0275
.0269
.0264
.0261
.0257
0
-.3245
-.528
-.6205
-.6472
-.6)89
-.6124
.0255
.0253
.0251
Gain and Phase of Filter
-.577
-.5376
-.4971
-.4568
-.4177
-.)801
-.)441
-.J096
-.2767
-.2452
-.215
-.1858
-.1575
-.1301
I;
46
·.,F.
£-:'_~=±
Of4):=r==·
:
---1-
TABLE 21
-34 Decibel Setting
Frequency (Hz)
0
1000
2000
3000
4000
5000
6ooo
7000
8000
9000
10000
11000
12000
13000
14000
15000
16000
17000
18000
19000
20000
Gain (v/v)
Phase (radians) ·
.1
.0909
.0739
-.5755
.0596
-.689
.0493
.0493
.0369
.0331
.0302
.028
.0263
-·7335
.025
.0239
.023
.0222
.0216
.0211
.0207
.0204
.0201
.0199
Gain and Phase of Filter
0
-.3486
-·7391
-.7228
-.694
-.658
-.618
-·5760
-.5334
-.4907
-.4486
-.4072
-.3666
-.3269
-.2881
-.2502
-.213
-.1765
48
---------+---------~---···------------~'--------~. ---.-_-_-_ __-_-_-_±r---~~------------~~-----_------__~c----.--------~-~+,_-_---_-__-_-_--~-----------~----·------------ l-
~-l"'i-
. ----\-----
1
f,
'I
~_J~-~~_J--~~·
; '
I
:~~:
' :
I
.
1
~~--:-4-f.!i~_J_:_;_\;D.;-;~~+f-=~~¥-~:-ri-{
. . . ~;_:;.. ~::c;~. 4~~:;~~~~·-"
.•_-c:-4 9-- l ~ -::·_:::: _ =
'-~~-"C·• ;i::~
u
=i
-=-~'-'
~-'£~', -~·-'
=:-£
---
-~
--- -~ -~,-- ;==-~-
==!=
~-
r-~=
~~.;:."!=-::e_
--=====.::
~-~~.0~
.=:::
:'=::
~-==+~~~
+~
1
_1
--~~-
~
=-
=~
n
~
~
,_:::j
=t
-~
-- -
-·
--1--·
.c=:==:_
'--,---
i~
::.--
~-
I
~
.--:
I
~
l
I _\.Y
I
--'~·~-~~---~-~--~~~~~~~~-~~·-r~~-~~~-ri ~~-
~'
: : ~--;-~,--.~-r7---~-~~~~-~~~~~.~~~~~~~--+4~-~~-~1-~~~~.7~'~;--r~~~~--T4-~()
. ~'~~~-~;+·_"":.'-·_~-.-•-•. -:.'--11-,_.....-:_-~_- - - -~:-~ir-~ -+~- ·~- =- __:-.~,-.,-;,--~t- i-+i=--'''--:_..;.·--'--.-;-~-:;t-'-i._l!~h;:-:~~~ ~
"--="
-
.:.g:
- ---'--+~
=+
__ ====t='
=l=
'b±-===l=
~
..
--=- :-:- --:- ---vr...=.
..:;..'""'
=:
:cc:=fl""-·-:'1..:::_::=::::=_:·" -.--:!~~
'~--~c·c~-~,-~~~;~~-:.==; ___·--:-~~.~ ~, ••~~:ZZ''
. =-t ==-=E::- .. -
=f.~.
-:"'£
=c~
-11 -·-~
_ E..
~
.:~
- -.
--~-:--:-'-c-~=-=t=,,_-
L~~f---
~---+.
.l;;l"':'::
t=:·
• '•• .•.
zc·
~
-=
.
' -.
-~
~~=t==
.... ,c-:i=
C~ =-.=~ii~
_--.
F==iS· ;::-:
-='L.::.:.;_ _ ,:-~
--+
Q
4g
TABLE 22
-36 Decibel Setting
Frequency (Hz)
0
1000
2000
3000
4000
5000
6ooo
7000
8000
9000
10000
11000
12000
13000
14000
1.5000
16000
17000
18000
19000
20000
Gain (v/v)
Phase (radians)
.1
.0907
0
-.3677
-.6134
-.7449
-.8057
-.8255
-.8211
-.8017
-.7726
--7371
-.6974
-.6548
-.6103
-.5646
-.5180
-.471
-.4237
.0735
.0588
.0482
.0406
.0351
.0311
.0279
.0255
.0235
.022
.0207
.0196
.0187
.0180
.0174
.0169
.0165
.0161
.0158
Gain and Phase of Filter
--3763
-.329
-.2817
-.2345
.
'
50
~
:
-;::=d
--
!-:J:::i:t
f---
---4 --
---
-~
--
···----- ----·
----
~-------·····-
------
-~---------------·---~-~~-
TABLE 23
-38 Decibel Setting
Frequency (Hz)
0
1000
2000
3000
4000
5000
6000
7000
8000
9000
10000
11000
12000
13000
14000
15000
16000
17000
18000
19000
20000
Gain (v/v)
Phase (radians)
.1
.0907
.0732
.0583
.0475
.0397
.034
.0297
.0263
.0237
.0215
.0198
.0183
.0171
.0161
.0152
.0145
.0137
.0133
.0129
.0126
0
-.3834
-.6449
-·7919
-.8674
-.901
-.9091
--9008
-.8812
-.8535
-.8197
-.7811
-·7386
-.6929
-.6443
-·5933
-.5401
-.4851
-.4282
-.3699
-.3103
Gain and Phase of Filter
.,
5J
TABLE 24
-40 Decibel Setting
Frequency (Hz)
0
1000
2000
3000
4000
5000
6000
7000
8000
9000
10000
11000
12000
13000
14000
15000
16000
17000
18000
19000
20000
Gain (v/v)
Phase (radians)
.1
.0906
.0731
0
-.J96J
-.671
-.8310
-.9195
-.9656
-.9857
-.9888
-·9799
-.962
-.9)69
-.9058
-.8693
-.8279
-.7817
-·7309
-.6756
-.6157
-.5514
-.4827
-.4098
.058
.0470
.0391
.0332
.0288
.0253
.0225
.0202
.0183
.0167
.0153
.0142
.OlJ2
.0123
.0116
.0109
.0104
.0099
Gain and Phase o:f Filter
..
---------~~----~~-;--;~~--~~-~~=-.-~-~=-_;-~--~;~~---~---~=-~:1-~:-~~_:--~-.~::;~:--~~~~~~;~~~~=;~:":=~t-~~-~~----~~-=--~t'-'--··-~---;
-·--------i----·-.-i--,-----------j---·--r- -----·--------··--t·-------!· ----------
- ------
--j-
----------- ---
55
The constants are stored in an erasable prom which is
configured as lK by 8 bits.
This permits the change of
constants in case this is desired at some future time.
The
major specifications for the proms are shown in appendix
two.
Two proms are used to generate the 16 bit numbers.
The address scheme used in these proms is simple
because of the fact that only sixty-three locations are
used.
A two position switch in front of the aluminum box
will provide the selection for boost or cut.
The boost
position will'provide a low to bit 7 and the cut position
a high to the same bit.
An eleven position rotary switch
provides bit 6 through 3 to select the appropriate group
of constants inside the boost or cut group.
The individual
constants are selected by bits 2 and 1 which are provided
by the system controller.
The drawing showing the box lay-
out is shown in figure 26.
The starting address for each
block of constants is given in table 25.
Since all signals will be attenuated 20 db when the
flat response is selected, there will be a loss in dynamic
range of the signal.
Maximum boost will yield no attenua-
tion at.20 KHz and maximum cut will provide 40 db of
attenuation at the same frequency.
This situation results
because the output y(n-1) is fed back to the multiplier
through the same pins as the input.
To maximize the
accuracy of the signal being input, the output was selected
as being bounded between zero and one.
This implies that
I
----J-1
I
l I
I
==~,
_ ____.I
I
u
~
I I
___.I
I
I
I
I I
I I I
I I I
STRB
A
B
c
L
D
CLKX
c LK y
c LK p
I
I
MTS
LSPTS
I
ACC
OLTCH
I
~
PRESET
I
BS TX
--------------~====~
---;=:======t'
_ ___.I
1
------------~'
_____,I·
I
l
c NT A
CNTB
I
SHS
FlGURE 25
TIMlNG DIAGRAM
\..n
()'\
BOX LAYOUT
000000000000000
5V RTN I 2 3 4
I
. 8
000000000000000
-5V RTN 5 6
7 8
9
16
000000000000000
12 RTN 9 I 0 11 12
17
24
000000000000000
CLK 13 14 15 16 STRB 25
32
000000000000000
33
'o----------.-------1
INPUT
B.
OUTPUT
'P
i
12
BO~ST 6
14
@
4
~~
CUT
2
18
0
35
~
I
I
iI
I
POWER
I
II
I
OFF
I
20
I
DECIBELS
FIGURE 26
I
----·-·-·-·
.----.. . __________ _j
\.1\
...::!
58
TABLE 25
Address (Hex)
Gain (Db)
028
024
020
01C
018
014
010
ooc
008
004
000
040
044
048
04C
0
-2
-4
-6
-8
-10
-12
-14
-16
-18
-20
-20
-22
-24
-26
-28
-30
-32
-34
-36
-38
-40
050
054
058
05C
o6o
o64
068
Prom Addresses
of Constants
·······--··-.
··-··
-··--··-·-··-·--···-·-· - - · · · · · · - - - - - · - - - - ·
··---··---~
59
only one bit has to be reserved for the integer part, as
mentioned earlier.
This way there will be a maximum amount
of bits to represent the input signal.
An amplifier at the output or a multiplying digital
to analog converter can be used to recover the level of the
signal.
IMPLEMENTATION
The input interface is provided in the form of a low
power schottky
inverter chip which requires
a very small
amount of power as indicated in appendix two, where all
pertinent data of all semiconductor integrated circuits
used in the project is tabulated.
Inverters were used be-
cause the only available tri-state device was an octal inverter chip.
The tri-state capability is necessary to
interface with,the multiplier chip and its multiple inputs.
The output interface is provided with octal latches.
The output will be present on the leading edge of the SHS
signal, and will remain valid until another leading edge
updates it.
The SHS signal is used by the signal recovery
(reconstruction) module at the output of the filter.
meaning of all abbreviations are shown in table 26.
The
The
SHS signal will enable the sample mode of the sample and
hold circuit at the output of the digital to analog converter.
Once
lO~s
have elapsed (enough time for conversion
and acquisition) the signal will become low, ending the
sample mode and starting the hold portion of the cycle.
60
61
TABLE 26
Abbreviation
SHS
STRB
CLK
CLKX
CLKY
CLKP
BSTX
BSTY
MTS
A
B
c
D
CNTA
CNTB
LSPTS
ACC
OLTCH
PRESET
Meaning
Sample and Hold Strobe
Starting Strobe
System Clock
Loads x input to multiplier
Loads y input to multiplier
Produces output of multiplier
Input tri-state enable
Output tri-state enable
Memory tri-state enable
Counter output bit 0
Counter output bit 1
Counter output bit 2
Counter output bit J
Address 0 of memory
Address 1 of memory
Output product tri-state enable
Accumulate enable
Output latch pulse
Master Reset and Preset
Definition of Abbreviations
62
f.
The allowed time for conversion and acquisition takes into
account the possibility of the sample and hold having to
follow a full scale deflection.
Just as a strobe is provided at the output, one is
needed at the input to signal the circuit the moment when
the data is valid.
This signal received from the data
acquisition module, has the name of STRB.
The rising edge
of this signal starts all the calculations involved in the
filter by setting flip-flop Z25.
This enables the clock to
the counter, which will start its counting on the next
falling edge of the CLK signal.
This counter steps the
sequencer prom, which controls the operation of the circuit.
To follow the subsequent explanation, refer to the
timing diagram of the circuit, shown in figure 25.
The control prom is the same as the ones used for
constant storage.
It provides eight control lines, which
are :
1) CLOCK X ( BIT 8 ) ,
2) CLOCK Y ( BIT 7 ),
3) CLOCK P ( BIT 6 ),
4) MEMORY TRI-STATE ( BIT 5 ),
5) ACCUMULATE ( BIT 4 ),
6) BUFFER TRI-STATE ( BIT J ),
7) CONSTANT ADDRESS 0 ( BIT 2 ),
8) CONSTANT ADDRESS 1 ( BIT 1 ).
The accumulate line is low (non-accumulate) until
'
6J
after the first output has been generated.
taken care of by flip-flop Z25.
This is also
This has to be so, because
both x(n-1) and y(n-1) are zero for the first sample.
This
signal is loaded in on the rising edge of either CLOCK X or
CLOCK Y.
After the STRB line has gone high, the CLOCK X and
CLOCK Y signals will load the data and the first constant
respectively into the multiplier.
This is done simulta-
neously since the inputs are located on different pins.
For this operation to occur, the y(n-1) buffers had to be
tri-stated because these bits are loaded into the multiplier through the same pins as the x(n) and x(n-1) quantities.
This is accomplished by inverting BSTX and
applying this to the chip enable pin of the y(n-1) buffers.
The BSTX signal is used because at any given moment, when
y(n-1) is being loaded, x(n) or x(n-1) can not be loaded
at the same time.
of one another.
Thus the enable signals are complements
The y(n-1) information goes through two
inversion steps because of the same reason explained earlier
for the x(n) input buffers.
The CLOCK P signal will go high after the next negative transition of A, causing the product to be generated.
At the
tim~
the constants coming out of the proms are
disabled, since they share the least significant product
output pins.
Again the enable functions for the proms and
the least significant result are complements of one
64
another.
The output latches will be loaded on the falling
edge of OUTLATCH, which is generated by gating MTS with
CLOCK P.
The SHS signal is also generated at this time by
flip-flop Z26.
Now that an output has been generated, the calculation
procedure for the next sample starts.
Note that the quan-
tities that were just now x(n) and y(n) have become x(n-1)
and y(n-1) as far as the next sample is concerned.
The
CLOCK Y signal loads in the next constant (D/A) in, since
the control prom is being addressed now to another location.
The least significant product bits have been disabled and
the proms containing the constants have been enabled.
The
accumulate line is now low to prevent accumulation with the
previous result.
Since x(n) was loaded in previously, it still remains
in the x register of the multiplier chip.
The CLOCK P
line then goes high to produce the first partial result,
D/Ax(n-1).
At this point the accumulate line goes high to
permit the accumulation of the upcoming result with the
one just generated.
The input buffers are disabled by BSTX
and the output tri-state buffers which feedback y(n-1) from
the contents of the output latches are enabled, so that
CLOCK X can load the y(n-1) data into the multiplier chip.
The CLOCK Y line enters the -B/A constant at this time.
The multiply-accumulate operation is then performed to produce an output of ; D/Ax(n-1) - B/Ay(n-1).
The circuit is now ready to receive the next sample
and multiply it by C/A then accumulate the result with
what is now present at the output register of the multiplier
chip.
The next control signal resets the flip-flops and
presets the counter; therefore, it is labeled PRESET.
This
is generated by gating address 9 (count 9) from the counter
with the clock signal.
This signal also ends the SHS pulse.
When the STRB goes high once more, the process described above is repeated except that now, accumulate will
be high for the C/Ax(n) term so as to add it to the previous
D/Ax(n-1) - B/Ay(n-1) result.
The gating used to produce the other timing signals
besides the ones corning from the prom is shown in appendix three.
The logic followed can be checked by comparing
with the timing diagram.
A blue print of the complete
schematic is included in the back cover pocket of the
report.
The original schematic is in the library in a card-
board tube.
The interface will be provided for 8 bits only
since the acquisition and recovery modules operate with
that many bits only.
The input and output registers are
provided for the complete operation in case future expansion
is desired.
The unused portion of the input registers is
grounded while the output ones are left floating.
The last topic is the automatic preset and clear provided at power up by the R-C conbination of R6 and
Co.
voltage across the capacitor will increase exponentially
The
66
once the power is applied, thus assuring that everything
will be in their starting conditions.
dix three.
See drawing in appen-
OPERATION AND TEST PROCEDURE
To operate the circuit, connect the power forms to the
appropriate jacks.
The circuit will require a maximum of
1.8 A of 5 volt power, 195
of 12 volt power.
rnA of
-5 volt power, and 135
rnA
The jacks for the inputs are located on
the left hand side of the box and are labeled correspondingly.
The output jacks are on the right hand side and
are also labeled.
Turn the power on by switching the power on switch to
the "on" position.
The circuit is now ready for operation
as soon as the STRB signal goes high.
To change the cha-
racteristics, simply set the front panel controls to the
appropriate setting.
The attenuation or gain levels are
shown in decibels.
To test circuit operation, a sine wave generator and
an oscilloscope are essential.
A spectrum analyzer could
also be used but is not absolutely necessary.
Checking all
the timing and control signals can be accomplished by using
a logic analyzer.
This way all the signals can be moni-
tored at the same time.
If a logic analyzer is not
68
available, a storage scope with as many channels as possible can be used.
The timing can be cross examined with the
timing diagram.
To check the response of the circuit, a frequency response analysis should be done by providing different frequency sine waves at the input and recording the attenuation observed at the output, as well as the phase shift.
The actual results should follow the data given in the tables and graphs of gain and phase response.
TEST RESULTS
The circuit was tested in a laboratory following the
procedure described in the report.
When small signals were
input to the system, the frequency response of the system
was not as expected.
See photographs 1 and 2.
This came
about because of the quantization error introduced by the
analog to digital converter.
When the input signals are
so small that they approach the quantization level of the
acquisition module, the digital representation stays almost
constant.
The result is that the filter will put out a
wrong result.
When larger signals were input to the system, the
correct frequency response is obtained.
3 and 4.
See photographs
This is indicative that if the acquisition module
were designed to work with 16 bits instead of 8 the problem
at low levels would be resolved.
It should be noted that
no matter how many bits are used there will always be levels
low enough to cause the same thing to happen.
A solution to the dynamic range problem mentioned in
the report would be to multiply the constants for x(n) and
70
x(n-1) by 10.
The level at D.C. with this situation would
be 1 instead of a .1 gain as is now the case.
If this is
done, care should be taken not to increase the input voltage over .5 volts peak-to-peak.
The output of the D/A con-
verter has a full scale output of - 5 volts.
Since the
gain at 20 KHz is now 10, theoretically anything over .5
volts at the input will cause the output
clipped at _ 5 volts.
waveform to be
Actually the input can go up to .7
volts without this happening because of the quantization
error of the input A/D converter.
Photograph 1
Boost Response
Small Signal
71
--~---------------
--·-----
Photograph 2
Cut Response
Small Signal
Photograph .J
Large Signal Boost Response
----
72
Photograph 4
Large Signal Cut Response
BIBLIOGRAPHY
1)
Lawrence P.
Huelsman :
"Active Filters :
Lumped,
Distributed, Integrated, Digital, and Parametric".
Copyright 1970, McGraw Hill, Inc.
2)
Gabor
c.
Ternes, Sanjit K.
Mitra
"Modern
Filter Theory and Design".
Copyright 197J, John Wiley & Sons, Inc.
J)
Alan
v.
Oppenheim, Ronald W.
Schafer :
"Digital
Signal Processing".
Copyright 1975, Alan
v.
Oppenheim and Bell Tele-
phone Laboratories, Inc.
4)
Mischa Schwartz, Leonard Shaw :
"Signal Processing
Discrete Spectral Analysis, Detection and Estimation".
Copyright 1975, McGraw Hill, Inc.
7J
APPENDIX 1
This appendix lists the key strokes necessary to
program the Texas Instruments 59 programmable calculator,
so as to obtain the results listed in this report.
The first program calculates the value of Rc that
yields a given gain at 20 KHz.
To run the program, enter
the desired gain in db and press "B".
When the program
stops, enter the maximum value of Rc.
In this case the
value is 1 Ma.
When the program stops again, the gain will
be in the display and the value of Rc will be in the tat"
register.
Given a value of Rc, the second program prints the
values of the filter constants, both in decimal and binary
notation.
To run the program, enter Rc and press the
following sequence ;
"gto", "11", "r/s".
The results will
be printed out in the following order '
1)
Rc,
2)
A,
3)
B/A in decimal and binary notation,
4)
C/A in decimal and binary notation, and
5)
B/A in decimal and binary notation.
The third program prints out all twenty-one frequency
responses, magnitude and phase.
Enter the twenty-one
values of Rc starting at register #20.
74
Press "rst .. and
75
APPENDIX 1
"r/s ...
The result is printed out in the following order a
1)
Frequency in Hertz,
2)
Gain in volts per volt,
3)
Phase in radiansp and
4)
Phase in degrees.
Each number in the printout will be identified if
the proper code is stored in registers 10, 11, 12, and, 16.
Register 17 can be used to label the phase when output in
degrees.
Register 12 is for Rc, register 11 is for the
gain, register 10 is for the frequency, and finally,
register 16 is for the phase in radians.
To input the pro-
per code, refer to the calculator's manual.
76
l
$
---·
-----
..
·--
-~------~---~----------~-~
APPENDIX 1
STEP
000
001
002
OOJ
004
KEY
lbl
A
rad
sto
00
005
x~t
006
007
008
009
010
011
012
01J
014
015
016
017
018
019
020
021
022
02J
024
1
EE
6
025
026
027
028
029
OJO
x~t
sto
01
7
*
9
1
5
8
1
5
1
EE
+j8
sto
OJ
X
1
EE
Program To Obtain Rc
(For T.I. 59 Calculator)
STEP
KEY
STEP
KEY
062
OJl
EE
J
)(.
OJ2
4
06J
rcl
o64
sto
OJJ
00
OJ4
04
065
.
.
066
OJ5
(
(
OJ6
067
1
068
OJ7
rcl
EE
OJ8
04
069
OJ9
070
J
+
040
rcl
071
+
041
rc1
072
01
042
00
)
07J
)
04J
074
044
sto
075
sto
045
076
05
046
02
lbl
077
rcl
047
078
VX'
048
OJ
1
079
X
049
080
rcl
050
081
rcl
01
051
082
02
X
052
08J
X
2
084
05J
1
054
EE
085
•
4
086
055
5
056
087
J
6
057
x~t
088
2
058
2
089
059
090
J
-+/o6o
X
7
091
7(
061
4
092
-
-
I
I
i
STEP
KEY
09J
094
X
------- - - - - - -
!!
;
2
0
0
0
0
095
096
097
098
099
100
101
102
lOJ
104
105
106
107
108
109
110
111
112
llJ
114
115
116
117
118
119
120
121
122
12J
I
X
5
0
0
0
0
1/x
-
sto
07
P-R
x~t
+
1
+
1
EE
5
X
rc1
02
x~t
inv
P..R
--------~--
-------
'
77
.
-~
-------··-- ------
------------ ------- -·- --- -· -- ~~---- ----- ·- --- ----- ~--
APPENDIX 1
STEP
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
KEY
x~t
sto
08
1
+
·o
4
1
0
4
6
9
0
3
7
sto
10
1/x
1
EE
5
X
(
rcl
02
+
rcl
05
Program To Obtain Rc (cont.)
(For T.I. 59 Calculator)
KEY
STEP
KEY
STEP
186
prd
)
155
08
187
156
188
rcl
X t
157
08
189
rcl
1.58
X
190
07
159
191
p R
160
192
3
x~t
161
193
9
162
+
4
194
1
163
2
195
164
+
196
8
rcl
165
4
197
10
166
198
8
1/x
167
6
199
168
200
3
1
169
201
9
EE
170
202
1/x
5
171
203
:X
172
204
inv
(
173
205
EE
rc1
174
206
isbr
02
175
207
1b1
176
+
208
B
rc1
177
209
05
178
210
2
)
179
211
0
180
212
xtt
181
213
inv
inv
182
214
log
P"'*R
183
215
sto
X t
184
216
13
inv
18.5
--
+
-
~
--
- -----------------
-
--------------------- -------------------------
STEP
217
218
219
220
221
222
223
224
225
226
227
228
229
230
231
232
2)3
2)4
235
236
237
238
239
240
241
242
243
244
245
246
247
KEY
clr
r/s
sto
11
lbl
sbr
A
inv
EE
pse
sto
12
X t
rcl
13
x~t
x~t
X
1
+!sum
11
rc1
11
gto
lb1
)<.
rcl
11_ _ I
7ts
APPENDIX 1
STEP
248
249
KEY
250
251
12
x~t
rcl
r/s
Program To Obtain Rc (cont.)
(For T.I. 59 Calculator)
79
..
-~
---·----~----
---------
.
--
--~---------
APPENDIX 1
STEP
000
001
002
00.3
004
005
006
007
008
009
010
011
012
01.3
014
015
016
017
018
019
020
021
022
02.3
024
025
026
027
028
029
0.30
Program To Obtain The Filter Constants
(For T.I. 59 Calculator)
KEY
STEP
KEY
KEY
STEP
STEP
062
0.31
.3
1
09.3
6
0.32
06.3
094
EE
rcl
2
064
0.3.3
095
+/19
0.34
065
.3
096
8
o66
0.35
7
sto
097
inv
4
0.36
067
098
EE
0.3
EE
068
X
0.37
099
prt
4
0.38
069
100
1
sbr
sto
070
101
0.39
EE
B
04
040
071
102
adv
.3
041
X
072
10.3
r/s
X
042
rcl
104
07.3
rcl
sto
01
04.3
074
105
00
00
•
,
044
106
075
prt
•
(
045
076
(
107
x~t
046
rcl
108
077
1
1
01
047
078
109
EE
EE
048
110
079
6
+
.3
rcl
049
080
111
+
04
050
081
112
rcl
x~t
)
082
051
00
11.3
052
08.3
)
114
sto
sto
084
05.3
115
01
054
05
085
116
sto
7
1
086
055
02
117
056
087
118
rcl
+
9
088
057
119
1
0.3
•
0
X
058
089
120
5
4
059
090
121
2
8
o6o
1
122
091
1
•
061
0
092
4
1;2.3
5
-
-
I
-
-
·- ---------·--------------------------
KEY
4
6
9
0
.3
7
1/x
sto
06
+1
EE
5
X
(
rcl
02
+
rcl
05
)
)(
.3
9
4
2
8
4
8
80
--- ..
-------- -·--
--------···-- ····-------
··---------------~---------------~-----~
'
APPENDIX 1
STEP
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
15.3
154
Program To Obtain The Filter Constants (cont.)
(For T.I. 59 Calculator)
KEY
STEP
KEY
STEP
KEY
STEP
.
186
217
6
5
-:155
rc1
218
X
187
156
3
rc1
188
19
219
9
157
02
220
sto
189
158
inv
221
18
190
159
rst
EE
222
191
160
prt
1b1
223
sto
192
161
sbr
B
224
162
193
19
B
225
inv
194
JxJ
163
1
x~t
226
EE
164
195
0
227
prt
196
165
+
1
sto
228
1
166
197
EE
11
229
198
167
+
sto
230
rc1
5
168
199
14
200
X
06
231
169
rc1
sto
201
232
170
02
202
13
1
233
171
1
234
EE
203
172
204
235
3
5
.
173
rc1
sto
2.36
205
174
X
12
206
(
19
2.37
175
x~t
rc1
207
2.38
176
inv
1b1
02
208
2.39
177
EE
240
1/x
209
178
+
)(
prt
210
rc1
241
179
sbr
2
211
242
05
180
)
B
212
24.3
181
1
1b1
244
21.3
182
214
245
18.3
X
1
x~t
rc1
246
215
184
EE
216
18
1
247
185
-
-
-
-
-
--
--
-.
------
-- --------····-------------------------------------·
KEY
x~t
x~t
ce
sto
10
9
x~t
rc1
11
x=t
1nx
x~t
EE
lb1
1nx
1
0
pind
12
0
sind
12
1
sum
11
rc1
10
gto
1/x
1bl
ce
I
81
82
----·····-----------
-
--
------
-------
-··
---
--------------------,
i
APPENDIX 1
STEP
000
001
002
00.3
004
005
006
007
008
009
010
011
012
01.3
014
015
016
017
018
019
020
021
022
02.3
024
025
026
027
028
029
0.30
Program To Obtain Filter Res)onse
(For T.I. 59 Calculator
STEP
KEY
STEP
KEY
STEP
KEY
2
062
adv
1
0.31
09.3
rad
EE
094
0.32
06.3
•
4
+jo64
rcind
095
0.3.3
8
096
0.34
065
1.3
.3
o66
6
sto
sto
097
0.35
2
00
067
098
0.36
0.3
068
x~t
X
099
0.37
.3
100
rc1
1
069
0.38
7
4
12
EE
101
070
0.39
102
040
EE
op
071
.3
4
04
041
072
X
10.3
042
104
sto
x~t
rcl
07.3
04
op
00
04.3
074
105
.
06
044
-.
106
.
075
(
(
x~t
045
076
107
046
1
rcl
108
1
077
04
EE
EE
047
078
109
6
048
110
079
.3
080
rcl
111
049
+
x~t
112
rcl
081
01
050
)
00
082
051
11.3
)
sto
114
052
08.3
084
sto
01
115
05.3
sto
116
054
085
05
7
02
086
lbl
117
055
056
rcl
118
087
9
1X'
1
088
1
057
0.3
119
120
058
089
X
5
8
rcl
121
rcl
059
090
o6o
1
01
122
02
091
092- - --------;>(.
X - - - - 12.3
061
5
+
KEY
1
EE
5
--
x~t
2
+j'I7('
)(
rcl
10
op
04
rcl
06
inv
EE
op
06
)(
-
-
---
~--
5
0
0
0
0
1/x
-sto
07
p-.R
-~----
--
--
83
i
p '
-----~-------~-------·----
---~----·--·-·-----~.
APPENDIX 1
STEP
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
Program To Obtain Filter Response (cont.)
(For T.I. 59 Calculator)
STEP
STEP
STEP
KEY
KEY
KEY
EE
186
x~t
217
155
7
218
sto
187
156
5
+
)(
188
1
219
157
09
(
220
1/x
158
189
221
rcl
1
190
159
222
02
160
EE
191
161
223
1
192
+
5
224
162
rcl
EE
X
193
rcl
225
163
194
05
5
')I..
)
226
164
02
195
(
227
165
196
166
228
rcl
x~t
x~t
197
02
inv
inv
229
167
198
168
~R
230
P-R
199
sto
sto
200
rcl
169
231
14
201
232
170
05
15
)
202
x~t
x~t
171
233
sto
inv
172
234
203
204
prd
08
x~t
235
173
08
1
rc1
205
236
174
206
rcl
07
175
237
P~R
176
08
207
238
•
)(
0
208
x~t
177
239
4
2
240
178
209
+
241
1
1
210
179
•
0
180
211
242
+
5
4
rcl
212
181
243
3
6
6
244
182
213
09
214
2
183
1/x
245
9
0
184
246
215
3
+
216
185---1
247
3
7
+
-
-
+
-
+
-
KEY
3
5
4
inv
EE
x~t
rcl
11
op
04
x~t
op
06
rcl
14
rcl
15
=
X~
rcl
16
op
04
x~t
op
06
X
7C
--.
,
------·-------------·------------~----
i
84
APPENDIX 1
STEP
248
249
250
251
252
253
254
255
256
257
258
259
260
261
262
263
264
265
266
267
268
269
270
271
272
273
274
275
276
277
278
Program To Obtain Filter Response (cont.)
(For T.I. 59 Calculator)
KEY
STEP
KEY
1
279
X~
280
8
1
0
sum
281
282
13
0
283
x~t
284
sto
rcl
06
285
17
op
286
rst
04
--
X~
op
06
2
0
0
0
0
x~t
rcl
06
x~t
xz.
1
0
0
0
sum
06
gto
~
lbl
APPENDIX 2
This appendix lists the major specifications for the
integrated circuits used in the digital filter.
85
86
APPENDIX 2
Specifications for the SN74LS08
Supply Voltage
MIN.
NOM.
MAX.
UNITS
4.5
5
5.5
volts
High Level Output Current
-400
Low Level Output Current
ifA
8
mA
-.4
rnA
High Level Input Current
Low Level Input Current
High Level Output Voltage
).4
Low Level Output Voltage
.25
High Level Input Voltage
volts
.4
volts
volts
2
Low Level Input Voltage
.8
volts
Propagation Delay, Low to High
8
15
ns
Propagation Delay, High to Low
10
20
ns
Specifications for the SN74LS02
NOM.
MAX.
UNITS
Propagation Delay, Low to High
10
15
volts
Propagation Delay, High to Low
10
15
volts
MIN.
For all other specifications refer to the ones for the
SN74LS08.
Specifications for the SN7404
Supply Voltage
MIN.
NOM.
MAX.
UNITS
4.5
5
5.5
volts
High Level Output Current
-400
JA.. A
Low Level Output Current
16
rnA
High Level Input Current
40
A,A
87
APPENDIX 2
Specifications for the SN7404 (cont ;)
MIN.
NOM.
Low Level Input Current
High Level Output Voltage
-1.6
2.4
Low Level Output Voltage
High Level Input Voltage
MAX.
mA
volts
).4
.2
UNITS
.4
volts
volts
2
Low Level Input Voltage
.8
volts
Propagation Delay, Low to High
12
22
ns
Propagation Delay, High to Low
8
15
ns
Specifications for the SN74LS74
MIN.
Supply Voltage
4.75
NOM.
5
High Level Output Current
MAX.
5.25
-400
UNITS
volts
;t.A
Low Level Output Current
8
mA
High Level Input Current, D
20
_M.A
High Level Input Current, Clear
40
AA
High Level Input Current, Preset
40
/{A
High Level Input Current, Clock
20
/{A
Low Level Input Current, D
-.4
mA
Low Level Input Current, Clear
-.8
mA
Low Level Input Current, Preset
-.8
mA
Low Level Input Current, Clock
-.4
rnA
High Level Input Voltage
2
volts
Low Level Input Voltage
High Level Output Voltage
.8
2.7
).4
volts
volts
88
APPENDIX 2
Specifications for the SN74LS74 (cont.)
MIN.
Low Level Output Voltage
NOM.
MAX.
UNITS
.35
.5
volts
Pulse Width, clock high
25
ns
Pulse Width, preset or clear low
25
ns
Setup Time, high level data
20
ns
Setup Time, low level data
20
ns
Hold Time
5
ns
Specifications for the SN74190
Supply Voltage
MIN.
NOM.
4.5
5
High Level Output Current
Low Level Output Current
MAX.
UNITS
volts
-800
/{A
16
mA
20
MHZ
Input Clock Frequency
0
Width of Clock Input Pulse
25
ns
Width of Load Input Pulse
35
ns
Data Setup Time
20
ns
Data Hold Time
0
ns
High Level Input Voltage
2
volts
Low Level Input Voltage
.8
volts
High Level Input Current
40
)(A
-1.6
mA
Low Level Input Current
High Level Output Voltage
Low Level Output Voltage
2.4
volts
J.4
.2
.4
volts
89
APPENDIX 2
Specifications for the SN74S240
MIN.
NOM.
5
Supply Voltage
MAX.
5.25
UNITS
volts
High Level Output Current
-15
mA
Low Level Output Current
64
mA
High Level Input Current
50
J(A
-400
A,A
Low Level Input Current, A
High Level Output Voltage
2.4
.55
Low Level Output Voltage
High Level Input Voltage
volts
J.4
2
volts
volts
Low Level Input Voltage
.8
Off-state Output Current (High)
50
_.,~fA
-50
,JfA
Off-state Output Current (Low)
volts
Propagation Delay, Low to High
4.5
7
ns
Propagation Delay, High to Low
4.5
7
ns
-2
mA
MAX.
UNITS
Low Level Input Current, G
Specifications for the SN74LS27J
MIN.
Supply Voltage
4.75
NOM.
5
5.25
volts
High Level Output Current
-400
AA
Low Level Output Current
4
mA
JO
MHz
Clock Frequency
0
Width of Clock or Clear Pulse
201
ns
Setup Time
25 f
ns
sf
ns
Data Hold Time
90
APPENDIX 2
Specifications for the SN74LS27J (cont.)
MIN.
High Level Input Voltage
NOM.
MAX.
UNITS
volts
2
volts
Low Level Input Voltage
High Level Output Voltage
J.4
Low Level Output Voltage
.25
volts
.4
volts
High Level Input Current
20
I{A
Low Level Input Current
-.4
mA
MAX.
UNITS
Specifications for the 2708
MIN.
NOM.
Supply Voltage (Vee)
5
volts
Supply Voltage (Vbb)
-5
volts
Supply Voltage (Vdd)
volts
12
Address and Chip Select,
Input Sink Current
1
10
,~fA
Low Level Input Voltage
0
.65
volts
High Level Input Voltage
J
5
volts
High Level Output Voltage
2.4
volts
Specifications for the TDClOlOJ
MIN.
Supply Voltage
4.75
NOM.
5
MAX.
5·25
UNITS
volts
High Level Output Current
-.4
mA
Low Level Output Current
4
rnA
Clock Pulse Width
25
JO
ns
Input Register Setup Time
25
JO
ns
i
91
APPENDIX 2
Specifications for the TDClOlOJ (cont.)
MIN.
Input Register Setup Time
0
High Level Input Voltage
2
NOM.
0
Low Level Output Voltage
.8
2.4
UNITS
ns
volts
Low Level Input Voltage
High Level Output Voltage
MAX.
2.7
volts
volts
volts
·5
75
-.4
.I{A
Clocks High Level Input Current
75
)(A
Clocks Low Level Input Current
-1
mA
High Level Input Current
Low Level Input Current
·3
mA
APPENDIX 3
This appendix depicts the logic circuits needed to
produce the other control signals not obtained from the
control prom.
92
93.
APPENDIX 3
PRESET
D
c ----=---;____
PRESET
B-----.
A
CLK~~-----------
OUTLATCH
CLKP·---~
MTS-~__..
Xl--OUTLATCH
LSPTS
MTS
---(>o-- LS P TS
ACC
CK
Qt------.,
FF
OUTLATCH
_,______ ACC
ACC
FROM PROM
APPENDIX 3
SHS
ACC
·OUTLATc·~
1-----
AUTO
SHS
CLEAR
56..o...
.___ _ AUTO CLEAR
'5+'r