Memory Technology: Putting the “nano” in your iPod Eric Pop Dept. of Electrical & Computer Engineering http://poplab.ece.uiuc.edu E. Pop 1 Applications of Memory • • • • • • E. Pop 1 Gigabyte = 1 GB = 1 billion bytes ≈ 10243 bytes (?!) 1 byte = 8 bits (1/0 state) 1 Human genome ≈ 0.8 GB 1 DVD ≈ 4.7 GB 1 iPod nano = 4 or 8 GB of Flash memory 1 laptop ≈ 2 GB DRAM memory 2 This Is Science, Technology, and Business E. Pop 3 Giga-Bytes and Giga-Dollars Over the same period, memory market accounted for 2535% of total semiconductor market. PS: cost matters!!! E. Pop 4 How do you cram this much information into your pocket?! E. Pop 5 The Scale of Things Source: doe.gov E. Pop 6 The Size of a Nanowire nanowire diameter ~ 50 nm hair diameter ~ 50 µm Source: L. Tong, http://www.nsf.gov/od/lpa/news/03/pr03147.htm E. Pop 7 The Abacus, Ancient Digital Memory Roman Abacus (ca. 200BC) Chinese Abacus (ca. 190AD) • Information represented in digital form • Each rod is a decimal digit (units, tens, etc.) • Finite number of states for each bead • A bead in the abacus is a memory device, not a logic gate Sources: R. Cavin (SRC), Wikipedia E. Pop 8 More on Ancient History Source: C. Webb, IEDM 2001 E. Pop 9 Memory in a Modern Computer $$$$ $$$ $ ¢ Cost Capacity & Latency Source: Brewer, IEEE Circuits and Devices Mag., Apr. 2005 Modern CPU: • Operate at GHz (nanosecond access times) • Modern memory vary from ~1 ns access times (SRAM) to 1 ms access times (hard disk) E. Pop 10 Another Look at the Memory Hierarchy Source: R. Cavin (SRC) E. Pop 11 From Silicon to Bits Vertical Cross-section Packaged die 8-12” silicon wafer (100s of dies) Single transistor E. Pop 12 On-Chip SRAM Cache Memory Lots of SRAM cache (static random-access memory) E. Pop 13 Managing Billions of Bits Memory: – Volatile vs. Non-volatile (charge stored when power is off) – Read-only vs. Read-write – Charge based vs. ??? – Fast vs. Slow – Large bit vs. Small bit area – Cheap vs. Expensive Source: Stanford EE313 Notes http://www.stanford.edu/class/ee313/ E. Pop 14 SRAM = Fastest, Largest, Volatile (6T) • Two inverters in series (“stuck” in either 1 or 0 stable states) + two access transistors • Six transistors total (6T) • Volatile! Bit state (0/1) maintained only while power is ON • Constant leakage current must be replenished power dissipation (~ 10 mA standby for 1 Mb cell array) • 6T SRAM is BIG: ~100 F2 • Fast: < 1 ns access time! E. Pop 15 SRAM = Fastest, Largest, Volatile (6T) • Two inverters in series (“stuck” in either 1 or 0 stable states) + two access transistors all total SRAM • SixAlmost transistors (6T)is • embedded Volatile! Bit state (0/1) within micro- maintained only while processors power is ON these days (why?)current • Constant leakage must be replenished power dissipation (~ 10 mA standby for 1 Mb cell array) • 6T SRAM is BIG: ~100 F2 • Fast: < 1 ns access time! E. Pop 16 DRAM = Fast, Small, Volatile (1T-1C) 64 Mbit DRAM from 1996 http://www.tf.uni-kiel.de/matwis/amat/elmat_en/kap_5/illustr/i5_1_1.html Storage capacitor Word line Access transistor C Access FET Bit line • Bit 1/0: Charge stored on capacitor • Access (~10 ns) with one transistor • “1T-1C” configuration • Read is destructive: charge spills out of Trench Capacitors C ≈ 25 fF capacitor, must be recharged Area: 8-10 F2 • Refresh charge every 64 msec E. Pop 17 DRAM = Fast, Small, Volatile (1T-1C) 64 Mbit DRAM from 1996 http://www.tf.uni-kiel.de/matwis/amat/elmat_en/kap_5/illustr/i5_1_1.html Storage capacitor Word line Access transistor C Access FET Bit line Trivia: DRAM capacitance cannot be miniaturized further due to cosmic ray damage! Trench Capacitors C ≈ 25 fF Area: 8-10 F2 E. Pop 18 FLASH = Slow, Small, Non-Volatile (1T) NOR: “Lucky” electron programming Drain current ~ 50 mA • Charge stored by “tunneling” within single transistor (1T) (yes, this is quantum mechanics storing the Maroon 5 song bits on your iPod nano) • Non-volatile, but relatively slow (~100 ns – 1 µs) • A single bit ~ 100 stored electrons today (2008) • Very, very hard to make this smaller, or charge will leak out! E. Pop 19 Flash Layout: NOR vs. NAND • How do you get more speed out of Flash? • “NAND” layout is slower but denser used for data storage (iPod nano, USB drives, etc.) NOR: 16 Cells • “NOR” layout is faster but 2x larger (less dense) used in cell phones, code storage NAND: 16 Cells • Data access speed also depends on the bit (cell) layout • NOR read ~10s of ns • NAND read ~1 µs Source: Al Fazio, Intel E. Pop 20 Phase-Change = Fast, Small, Non-Volatile • Can we store memory without storing electron charge? • Think about CD/DVDs, magnetic hard drives, even vinyl records • DVDs: “phase-change material” layer changes from crystalline to amorphous when heated by laser beam • 10 ns access time, very small footprint 0.3 Current (A) • Same material (GeSbTe) may be used for very small and fast electrical memory (b) 0.2 Data "0" low-R (fcc) 0.1 Data "1" high-R (a) VTH 0 0 1 2 Voltage (V) 3 4 E. Pop 21 Intel, Samsung, UIUC Hard at Work… Put in perspective: NAND Flash chips of 8+ Gb in production “Samsung completed the first working prototype of what is expected to be the main memory device to replace high density Flash in the next decade – a Phase-change Random Access Memory (PRAM). The company unveiled the 512 Mb device at its sixth annual press conference in Seoul today.” (September 2006) E. Pop 22 Questions? E. Pop 23
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