High LET Single Event Upset Cross Sections
For Bulk and SOI CMOS SRAMs
F.D. McDaniel,a,b,* B.L. Doyle,a G. Vizkelethy,a P.E. Dodd,a and P. Rossi a,c.#
a
Ion Beam Materials Research Laboratory, Sandia National Laboratories, PO Box 5800, MS-1056,
Albuquerque, NM 87185-1056
b
Ion Beam Modification and Analysis Laboratory, Dept. of Physics, PO Box 311427, University of North
Texas, Denton, TX 76203-1427
c
University of Padova and INFN, via Marzolo 8, 35131 Padova, Italy
Abstract. Electronics in spacecraft and satellites are exposed to high-energy cosmic radiation. In addition,
terrestrial radiation can also affect earth-based electronics. To study the effects of radiation upon integrated
circuits and to insure the reliability of electronic devices, cosmic and terrestrial radiations are simulated with ion
beams from particle accelerators. A new, higher Linear Energy Transfer (LET) acceleration system for heavy ions
has been developed at Sandia National Laboratories. Heavy ions from a 6.5 MV EN tandem Van de Graaff
accelerator at 0.25 MeV/amu are injected into a two-stage Radio Frequency Quadrupole (RFQ) linac, which
accelerates the ions to 1.9 MeV/amu. These ions together with those from the Brookhaven National Laboratory
MP Tandem have been used to measure single event upset (SEU) cross sections as a function of LET for both bulk
and Silicon on Insulator (SOI) Complementary Metal Oxide Semiconductor, Static Random Access Memories.
The magnitudes of these cross sections indicate that the upsets in both the SOI and bulk parts are caused by OFFdrain strikes.
*
#
F.D. McDaniel was at Sandia National Laboratories on a faculty sabbatical from the University of North Texas.
P. Rossi is at Sandia National Laboratories on a faculty sabbatical leave from the University of Padua and INFN, Italy.
INTRODUCTION
SEU CROSS SECTIONS
High-energy, cosmic radiation can adversely
affect electronics in satellites and spacecraft. In
addition to secondaries, such as neutrons from
cosmic radiation, which penetrate the earth’s
atmosphere, earth-based electronics can also be
affected by terrestrial radiation sources. A
strong effort is being made to design and
produce electronics circuits, which have been
radiation-hardened. To gauge the success or
failure of these hardening efforts, particle
accelerators are commonly used to simulate the
effects of high-energy radiation on integrated
circuits (ICs) by bombarding the ICs with highenergy, heavy-ions. An ultra-high deposition of
charge or linear energy transfer (LET) [1] is
necessary to produce electronic malfunctions or
single event upsets (SEU) to test the radiationhardened circuits.
The ions are allowed to impinge on an IC and
the number of upsets per incident ion is
determined. For example, for memory chips, a
pattern is written into the memory and then the
chips are irradiated with a known fluence of ions.
After irradiation, the memory is read out to
determine the number of errors. The SEU cross
section is determined by simply taking the ratio
of the number of detected errors or “soft upsets”
to the measured fluence of the beam. By varying
the LET of the incident ion, the SEU cross
sections can be determined as a function of the
ionizing power or LET of the ion. For the
present work, the entire memory device was
irradiated using ≥ 1 cm diameter broad beams of
a number of different LET ions.
CP680, Application of Accelerators in Research and Industry: 17th Int'l. Conference, edited by J. L. Duggan and I. L. Morgan
© 2003 American Institute of Physics 0-7354-0149-7/03/$20.00
355
ACCELERATORS
LET at Surface (MeV/mg/cm2)
MeV-amu/Q2
Sandia
National
Laboratories
(SNLAlbuquerque, NM) Ion Beam Materials Research
Laboratory (IBMRL) is using Radiation Effects
Microscopy (REM) [2] as well as broad beams
of ions to study radiation-hardened ICs. High
LET, heavy ions are produced by a Radio
Frequency Quadrupole Linear Accelerator (RFQ
linac) coupled to a 6.5 MV model EN tandem
Van de Graaff accelerator. The RFQ linac is
designed to accelerate a variety of ions with a
mass-to-charge ratio of m/q ≤ 8. Heavy-ions
from the tandem at an energy/mass of 0.25
MeV/amu are injected into a two-stage RFQ
linac, which boosts the ion energy/mass to 1.9
MeV/amu.
Heavy ions at this velocity are very near the
“Bragg Peak” of the electronic stopping power,
and therefore the charge deposition density is
almost
maximized.
After
magnetic
momentum/charge analysis, the 0.25 MeV/amu
ions from the 6.5 MV EN tandem accelerator are
passed through a 5-10 µg/cm2 carbon stripping
foil to produce higher charge states and then
injected into the RFQ linac. The RFQ linac
operates in a pulsed mode usually at 100 Hz
repetition rate with a pulse length of 50 µs for a
duty cycle factor of 0.005. Since only about
20% of the ions are in the correct phase to be
accelerated by the RFQ linac, of all the ions
exiting the stripper foil, only about 1 ion in a
1000 from the tandem is accelerated. Since after
electron stripping, only one charge state of the
ion is the correct m/q to be accelerated, this
fraction is further reduced by a factor of ~10 to
about 1 ion in 10,000. Fortunately, only a few
hundred to a few thousand ions are needed for
SEU cross-section measurements. See McDaniel
et al. [3] in these proceedings for more
information about the SNL RFQ linac.
The MP tandem at Brookhaven National
Laboratory (BNL) operates with a terminal
voltage near 15 MV, and has a dedicated beam
line for SEU cross-section measurements. A
comparison of the single event IC testing
capabilities of these two accelerator systems is
given in Fig. 1.
90
80
70
60
50
40
30
20
10
0
0-10
20-40
BNL MP
Tandem
40-80
80-160
SNL Tandem
+ RFQ
10
100
1000
Range (microns)
FIGURE 1. Comparison of the LET and ion
range for particles from H to Au accelerated by
the SNL EN tandem-RFQ system and the BNL
MP tandem. The two accelerators have similar
LET ranges, but the BNL tandem provides ions
that have a higher penetration.
static random access memory (SRAM) devices.
The TA788 is a 16k SRAM, where half of the
memory has been radiation hardened by
feedback resistors. The cross-sectional view of
one inverter of the TA788 memory cell is shown
in Figure 2a.
Vss n+ source
p+ drain
n+ drain
p-well
oxide
p+ source
Vdd
n-well
p-epi
p+ substrate
FIGURE 2a. Cross-section view of an inverter of a
memory cell of the TA788 (bulk technology).
In the transistor with the p-channel and n-well,
the n-well/p-epi junction is reversed biased. If
an ion strikes in the n-well, high charge
collection will result. If an ion strikes in the pepi or in the source of the n-channel transistor,
very low charge collection will result. The
charge collection from ion strikes in the drain
depends upon the state of the transistor. If the
DEVICES TESTED
SEU measurements were made on a Sandia
TA788
Complementary
Metal
Oxide
Semiconductor (CMOS6r bulk technology) and
Silicon-on-Insulator (SOI) (CMOS7 technology)
356
transistor is off because the transistor is reverse
biased, the charge collection is high. If the
transistor is on and only the built-in bias is
present, the charge collection will be low in
comparison.
The SOI devices in the experiment were 64k
SRAMs, the cross sectional view is shown in
Figure 2b. In the past, SOI devices were
considered less sensitive to radiation effects than
bulk devices. It was assumed that in contrast to
bulk devices, the insulating buried oxide (BOX)
layer would not allow the charge generated in the
substrate to be collected by the circuit. The only
charge distributed to the individual SRAM
memory cells would be the charge deposited in
the FET gates located in the top silicon layer.
Because this top layer for SOI is usually about
250 nm thick and the ion range or charge
collection length is ~10 µm, the collected charge
for SOI devices is reduced by a factor of ~40
when compared to bulk devices. Therefore, SOI
devices should have much-less SEU sensitivity
than bulk devices.
n+ source
Vss
p+ drain
Sandia National Laboratories ranged from 32 to
103 MeV/mg/cm2. The higher LETs were
obtained by rotating the samples.
-2
10
-3
SEU cross section [cm2]
10
10
-6
10
-7
TANDEM
-8
10
0
TANDEM+RFQ
10 20 30 40 50 60 70 80 90 100 110 120
2
LET[MeV/mg/cm]
FIGURE 3a. SEU cross-sections of the bulk CMOS
TA788 SRAM measured at BNL and SNL.
Vdd
oxide
BNLtotal chip
BNLradhard
SNLtotal chip(Cu)
SNLtotal chip(I)
SNLradhard(Cu)
SNLradhard(I)
SNLradhard(Au)
-5
10
p+ source
n+ drain
-4
10
BOX
p- substrate
FIGURE 2b. Cross-section view of an inverter of an
SOI memory cell showing the buried oxide (BOX).
SEU CROSS SECTION
MEASUREMENTS
Recent SEU cross-section measurements in
TA788 ICs were made using BNL MP tandem
accelerator and the SNL EN tandem accelerator
plus the RFQ linac. Both sets of measurements
were broad beam measurements (≥ 1 cm in
diameter) and are shown in Figure 3a. At
Sandia, we utilized 120 MeV 63Cu, 241 MeV
127
I, and 374 MeV 197Au ions. The ion flux was
measured with a Hamamatsu PIN diode with a
sensitive area of 3.6 x 3.6 mm2. By moving the
diode perpendicular to the ion beam, we
determined the ion flux was 3.5 x 103 ions/cm2/s
and was uniformly spread over an area of ~13 x
25 mm2 for the iodine beam. The fluxes for the
Cu and Au ions were also a few thousand
ions/cm2/s. The LET of these ion beams at
357
The BNL results and the SNL results are in
good agreement with the exception of the Cu
measurements on the radiation hardened part of
the TA788 IC. It appears that the TA788 IC
measured at SNL had a somewhat higher LET
threshold of ~46 MeV/mg/cm2 compared with
~38 MeV/mg/cm2 measured at BNL. However,
the two sets of measurements were made on
different TA788 ICs.
The SEU cross-sections of an SOI SRAM with
a 200 nm BOX on a p-type substrate were
measured at BNL [4].
This measurement
showed a surprisingly large SEU cross section.
Based on the assumed much smaller charge
collection, the expected saturation cross section
(the total area of the gates) was about 0.64
µm2/bit, while the measured cross section was
about 8 µm2/bit which is much closer to the
combined areas of the drains and gates. This
indicated that charge collection (i.e. induction)
did occur through the BOX in contrast to past
assumptions. Charge collection experiments on
thermal capacitors proved that there is significant
charge induced by displacement currents through
the oxide [5, 6]. From these experiments, it was
determined that a thicker BOX or change in the
substrate from the usual p-type to n-type could
reduce, even completely eliminate the charge
collection into the SRAM circuit from the
prototype devices quickly and make selected
SEU cross section measurements on-site.
SOI memory devices with different designs
were tested with the new high LET system and it
was found that the saturation SEU cross section
is closer to the combined drain and gate areas
than to the gate area alone. This indicates that
charge deposited in the substrate can be collected
by the SRAM circuit through induction and
displacement currents. This was confirmed by
model experiments on thermal capacitors. The
mitigation techniques, which included thicker
oxides and n-type substrates derived from the
model experiments, did not seem to significantly
improve the radiation hardness of the devices. In
the future, a combination of broad-beam and
nuclear microprobe experiments is expected to
solve this technologically important problem and
help develop techniques that could improve the
radiation hardness of SOI devices.
substrate. The 64k SRAMs, made on n-type
substrates with 100 nm and 400 nm BOX, were
tested at the SNL SEU facility to see if the above
approaches work. A beam of 241 MeV 127I was
used with a LET of 55 MeV/mg/cm2. The
results are shown in Figure 3b together with the
earlier BNL measurements on 200 nm BOX
SRAM on p-type substrates.
SEU cross section [cm2]
0.01
1E-3
1E-4
BNL, 200 nmBOX, p type
SNL, 100 nmBOX, n-type
SNL, 400 nmBOX, n-type
1E-5
ACKNOWLEDGEMENTS
1E-6
0
20
40
60
80
100
Sandia is a multiprogram laboratory operated
by Sandia Corporation, a Lockheed Martin
Company, for the United States Department of
Energy under Contract DE-AC04-94AL85000.
Work at UNT supported in part by the National
Science Foundation, the Office of Naval
Research,
Texas
Advanced
Technology
Program, and the Robert A. Welch Foundation.
120
2
LET [MeV-cm /mg]
FIGURE 3b.
SEU cross-sections of 64k SOI
SRAMs. The 200 nm BOX p-type substrate were
measured at BNL. The 100 nm and 400 nm BOX on
n-type substrates were measured at SNL.
Although the SEU cross sections are found to
be somewhat smaller for these new devices, it
was not reduced significantly.
The cross
sections are still closer to the combined gate and
drain areas than to the gate area itself. This
measurement therefore presents a serious
problem that IC designers must solve before
SOI-based SRAMs can be used with confidence
in single event effect environments.
REFERENCES
1. LET is Linear Energy Transfer or energy per path length in
MeV/mg/cm2.
2. Doyle, B.L., Vizkelethy, G., Horn, K.M., Walsh, D.S., and
Dodd, P.E., AIP Conference Proceedings 576, New York,
2001, pp. 516-521.
3. McDaniel, F.D., Doyle, B.L., Rossi, P., Buller, D.L.,
Hamm, R.W., and Schone, H., “The Tandem-RFQ Linac
Booster at Sandia National Laboratories,” this proceedings.
4. Dodd, P.E., Shaneyfelt, M.R., Horn, K.M., Walsh, D.S.,
Hash, G.L., Hill, T.A., Draper, B.L., Schwank, J.R., Sexton,
F.W., and Winokur, P.S., IEEE Trans. Nucl. Sci. 48, 1893
(2001).
5. Schwank, J.R., Dodd, P.E., Shaneyfelt, M.R., Vizkelethy,
G., Draper, B.L., Hill, T.A., Walsh, D.S., Hash, G.L., Doyle,
B.L., and McDaniel, F.D., submitted to IEEE Trans. Nucl.
Sci.
6. Vizkelethy, G., Dodd, P.E., Schwank, J.R., Shaneyfelt,
M.R., Walsh, D.S., McDaniel, F.D., and Doyle, B.L., Proc.
of the 8th International Conference on Nuclear Microprobe
Technology and Applications, Takasaki, Japan, September 813, 2002, to be published in Nucl. Instr. Meth. B.
CONCLUSIONS
A new broad-beam SEU cross section
measurement capability has been developed at
SNL based on the combination of an EN tandem
Van de Graaff and RFQ accelerators. The
maximum LET in Si, that this facility can
provide, is ~100 MeV/mg/cm2 (374 MeV gold
beam), which is almost the highest LET found in
nature. The SEU cross sections of CMOS6r
devices measured at SNL agreed very well with
the cross sections measured at BNL. This new
facility will allow SNL designers to test their
358