ECEN 1400
HW 7
Seven segment display
ECEN 1400, Introduction to Analog and Digital Electronics HW 7: Seven segment display (50 pts) This homework will walk through the use of seven segment display chips and the
specialized logic chips that decode BCD into the seven LED signals for the display.
1: CREATE A TWO-DIGIT COUNTER WITH ARBITRARY ROLL OVER (10 PTS)
From homework 4, problem 5, you have a multisim circuit with two cascaded counters.
The first counter cycles through 0 to 15 and the second counter counts the number of
these cycles, also counting 0 to 15. Here we will customize the two counters so each has
an arbitrary maximum. You will need counters that progress from 0 to 5 and 0 to 9 for
your clock.
The ~LOAD pin (9) on the 74161 timers causes the values on pins 3-6 to be loaded into
the counter on the next clock event. Now imagine you had a simple digital logic circuit
to detect when your counter has reached a particular count. If this is inverted (since
~LOAD is active low) and connected to pin nine, the counter will load zeros at the next
clock event, rolling over. Using ANDs and inverters from digital logic lab, design the
required logic to cause the fast, first counter to count 0-6 and the slow, second counter to
count 0-7. These are arbitrary numbers, just to exercise your design skills. Modify your
existing two counter circuit in multisim and use a simulated scope to verify the operation.
Make sure your counter rolls over at the desired value. Turn in 1) a screen capture of the
circuit and 2) a scope trace showing the input clock and the two ~LOAD signals.
Confirm that the scope trace verifies your design. Hint: See the extra credit for lab 5.
Solution: Use an AND gate on QB and QC of counter 1. These will both go high when
the counter first reaches 01102 = 610. Invert the output since pin nine is active low and
connect it to pin 9 (~LOAD). You should tie pins 3-6 (A-D) low. The second counter
should clock on this event, so also wire this to the clock on counter 2. On the output of
counter 2, use two and gates to detect 01112 = 710 and again invert the result before
applying it to ~LOAD.
Note that you will get a different response if you connect your logic to pin 1 (~CLR)
since clear executes immediately and does not wait for the next clock rising edge. That
is, the counters will each appear to roll over one digit earlier. This is slightly dangerous
since the counter actually counts to 6, then very quickly clears to 0. How much time is
spent in the 6 state is not very well determined, so could potentially cause undesirable
behavior somewhere else in the circuit.
Version 2.0, 11/6/13
R. McLeod
1
ECEN 1400
HW 7
Seven segment display
Scope output of input clock and the two roll over signals is below. The first counter rolls
over at 6 clock inputs and the second counter rolls over at 7 cycles of counter 1. I am not
sure what the small “glitch” is in the middle of the third trace.
0 1 2 3 4 5 6 0 1 2 3 4 5 6 0 1 2 3 4 5 6 0 1 2 3 4 5 6 0 1 2 3 4 5 6 0 1 2 3 4 5 6 0 1 2 3 4 5 6 0 1 2 3 4 5 6
(CLK, counter 1)
7
0
1
2
3
4
5
6
7
(~LOAD, counter 1), (CLK counter 2)
(~LOAD,, counter 2) Version 2.0, 11/6/13
R. McLeod
2
ECEN 1400
HW 7
Seven segment display
Grading:
a. 3: correct wiring of load pin of counter 1 (𝑄𝐵 ∙ 𝑄𝐶 wired to pin 9).
b. 3: correct wiring of load pin of counter 2 (𝑄𝐴 ∙ 𝑄𝐵 ∙ 𝑄𝐶 wired to pin 9).
c. 1: Other wirings are correct. (Note: Function generator can replace the 555
timer.)
d. 1: Correct CLK (counter 1) signal on stimulated scope.
e. 1: Correct Load (counter 1) signal on stimulated scope.
f. 1: Correct Load (counter 2) signal on stimulated scope.
2: UNDERSTAND THE DISPLAY DECODER (20 PTS)
a) Fill in the Karnaugh map for the “a” truth table of a BCD to seven segment decoder
(use the truth table in the notes). Assume that states beyond BCD digit 9 are “don’t
care”. On the map, neatly show the groupings that will result in a minimal Boolean logic
expression. Write this logic expression for a as a function of A,B,C and D. Note that
there are multiple ways to group the terms which result in the same complexity.
b) Copy the 1, 0 and X states to the second map and now write a function for NOT(a).
That is, group the zeros on the map and write a function that returns 1 when a is either
zero or “don’t care”. Counting ANDs, ORs and NOTs, which expression would take the
fewer gates to implement?
BA
1
0
1
1
1
0
1
1
0
1
1
0
0
1
1
0
X
X
X
X
X
X
X
X
1
1
X
X
1
1
X
X
Version 2.0, 11/6/13
DC
DC
BA
R. McLeod
3
ECEN 1400
HW 7
Seven segment display
BA
1
0
1
1
1
0
1
1
0
1
1
0
0
1
1
0
X
X
X
X
X
X
X
X
1
1
X
X
1
1
X
X
DC
DC
BA
a = D + A⋅C + A⋅C + A⋅B
a = A ⋅C + A⋅ B ⋅C ⋅ D
a requires 6 ANDs and ORs + 2 NOTs for 8 gates.
NOT(a) requires 5 ANDS and ORs + 4 NOTS for 9 gates.
So a is simpler, although not by much. If you actually need NOT(a) as the output of the
circuit, they end up being identical.
Grading:
Part a) a. 2: correctly fill in the map using the table from note
b. 2: correctly circle the blue section
c. 2: correctly circle the green section
d. 2: correctly circle the red section
e. 2: correctly circle the grey section
f. 2: correct expression
Part b) g. 2: correctly circle the red section
h. 2: correctly circle the blue section
i. 2: correct expression
j. 0.5: a requires 8 gates
k. 0.5: not(a) requires 9 gates
l. 1: point out “a” function requires fewer gates
3: PUT IT TOGETHER WITH SEVEN SEGMENT DISPLAYS (20 PTS)
1. Insert two BCD to seven-segment display decoders under
TTL…74LS…74LS47N. Put each just to the right of your counter. Connect
QA…QD of each counter to A…D of the decoder. Wire pins 3,5, and 4 of the
decoder to 5V.
Version 2.0, 11/6/13
R. McLeod
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ECEN 1400
HW 7
Seven segment display
2. Calculate an appropriate current limiting resistor for the RED LEDs in the seven
segment display. Connect one of these resistors to each of the outputs OA…OG
of both decoders (14 resistors in all).
3. Insert two common anode seven-segment displays under
Indicators…HEX_DISPLAY…SEVEN_SEG_COM_a. Connect the common
anode (labeled CA) to 5 V and the inputs A…G to the outputs of the decoder.
Hit the Simulate arrow and, if all is done right, you should see the two displays counting
from 0 to 6 and 0 to 7. Turn in a screenshot of your schematic.
Grading:
a. 2: find the correct component of decoder (74LS47N).
b. 2: correct wiring between QA~QD of counter 1 and A~D of decoder 1.
c. 2: correct wiring between QA~QD of counter 2 and A~D of decoder 2.
d. 1: wire 3,4,5 pins of decoder 1 to +5V.
e. 1: wire 3,4,5 pins of decoder 2 to +5V.
f. 2: point out the resistance is around 330 ohms.
g. 2: find the correct component of seven segments display.
h. 4: correct wiring between OA~OG of both decoders and A~G inputs of both
displays with a resistor of 330 ohms in between each pair.
i. 2: wire CA pins of seven-segments displays to +5V. (1 for each display.)
j. 2: the wirings of other parts are correct (wiring of load pin of each counter
should be the same as problem 1.)
Version 2.0, 11/6/13
R. McLeod
5