• Lecture 14: State diagrams
ECEN 1400 Introduction to Analog and Digital Electronics
Lecture 14
Finite state machines
•  Finite state machines are the
foundation of nearly all digital
computation.
•  The state diagram captures the
desired system behavior
•  A formulaic process turns this
diagram into state table and then
into a logic circuit.
The example in these notes is taken from All About Circuits at
http://www.allaboutcircuits.com/vol_4/chpt_11/5.html . See this site for
additional explanations.
Robert R. McLeod, University of Colorado
http://en.wikipedia.org/wiki/Finite-state_machine
140
• Lecture 14: State diagrams
ECEN 1400 Introduction to Analog and Digital Electronics
From goal to “states”
Intellectually most difficult step
•  Goal: A circuit which sends a single high
pulse when a button is pressed.
•  Slightly tricky bit: The button could be held
down for many clock cycles, but the circuit
must not send out another pulse until the
button is released and pressed again.
•  So there are 3 states the circuit might be in:
Waiting
for button
to be
pressed
Pressed!
Sending
out pulse
Waiting
for button
to be
released
Robert R. McLeod, University of Colorado
141
• Lecture 14: State diagrams
ECEN 1400 Introduction to Analog and Digital Electronics
State diagram
Add transitions
•  Now connect these states with arrows that
indicate how the button value would move the
system from state to state.
•  These transitions will occur each clock cycle.
•  Also define the starting (entering) state
Not pressed
You can only stay
in this state one
cycle since all
transitions lead
away.
Pressed
Start
Waiting
for button
press.
Send Low
Not pressed
Each state
includes what to
do for both
button
conditions.
Robert R. McLeod, University of Colorado
Pressed!
Not pressed
Waiting
for button
release.
Send Low
Pressed
Send High
Pressed
If button release
happens in the
clock period
immediately
following the
press event.
142
• Lecture 14: State diagrams
ECEN 1400 Introduction to Analog and Digital Electronics
Turn it into numbers
Boolean states and transitions
•  Number states
–  Wait, button not pressed, sending low = 00
–  Active, sending high = 01
–  Wait, button pressed , sending low = 10
•  Button pressed/not = 1/0
•  Send High/Low = 1/0
The “state” of
the circuit,
encoded as a 2
bit number. Will
need flip-flops to
“remember” this
value.
0
1
Start
00
01
0
1
0
1
0
10
The button
value.
0
The output of
the circuit.
1
Robert R. McLeod, University of Colorado
143
• Lecture 14: State diagrams
ECEN 1400 Introduction to Analog and Digital Electronics
Create the state table
•  Name variables
–  State = A,B
–  Input button = I
–  Sent output = Y
AB
I
Y
Don’t care 3 states × 2 button values = 6 rows.
•  Construct a state table that captures design
–  Each row is one transition (arrow on diagram)
–  Inputs are states and button condition at one time
–  Outputs are circuit output and next state
3 input variables (A,B,I) 3 output variables (Anext, Bnext,Y)
Robert R. McLeod, University of Colorado
144
• Lecture 14: State diagrams
ECEN 1400 Introduction to Analog and Digital Electronics
Add flip-flops
•  The circuit needs to
remember what state
it is in. This is a job
for a flip-flop.
J K Func
Qnext
0 0
Hold
Q
0 1
Reset
0
1 0
Set
1
1 1
Toggle
Q
•  We need one for each of A,B.
•  Add to state table as more “outputs”
Four possible conditions of A/B and Anext/Bnext
Row
1A
4A
3B
6A
A/B
0
0
1
1
A/Bnext
0
1
0
1
Robert R. McLeod, University of Colorado
JK function
Reset or Hold
Set or Toggle
Reset or Toggle
Set or Hold
J
0
1
X
X
K
X
X
1
0
145
• Lecture 14: State diagrams
ECEN 1400 Introduction to Analog and Digital Electronics
Karnaugh maps!
J A = BI
KA = I
JB = AI
KB = 1
Y = AB
Robert R. McLeod, University of Colorado
146
• Lecture 14: State diagrams
ECEN 1400 Introduction to Analog and Digital Electronics
Create the circuit
Assuming no bounce
J A = BI
I
KA = I
Note use of
~Q for logic
where ~A
needed.
Y = AB
JB = AI
KB = 1
Clock
•  The system will wait in state A,B,Y = 0,0,0
•  When the button is pressed, it will go to A,B,Y = 0,1,1 for one
clock cycle.
•  If the button is immediately released, the system will return to
A,B,Y = 0,0,0.
•  If the button is held, the system will go to A,B,Y = 1,0,0 until the
button is released, then it will go to A,B,Y = 0,0,0
Robert R. McLeod, University of Colorado
147
• Lecture 14: State diagrams
ECEN 1400 Introduction to Analog and Digital Electronics
Quiz 14.1
Q: For the state diagram shown, what are the
initial states and conditions that cause the
turnstile to be unlocked
A: State = locked, transition = coin
B: State = locked, transition = push
C: State = unlocked, transition = coin
D: A and B
E: A and C
No matter what state you are in, if you put in a coin, the next state is unlocked.
Why would somebody put a coin into an unlocked turnstile??? It doesn’t matter.
If the designer didn’t plan for this condition, the device could freeze up and the
London underground could come to a halt. Bad.
Robert R. McLeod, University of Colorado
148
• Lecture 14: State diagrams
ECEN 1400 Introduction to Analog and Digital Electronics
Quiz 14.2
Q: Assume the state is labeled locked=0 and
unlocked=1. Assume the input is labeled push =
0 and coin = 1. Which is a row in the state table?
A: Current = 0, Input = 0, Next = 1
B: Current = 1, Input = 0, Next = 1
C: Current = 0, Input = 1, Next = 0
D: Current = 1, Input = 1, Next = 0
E: Current = 0, Input = 0, Next = 0
Only locked, push = locked is a valid state transition.
Robert R. McLeod, University of Colorado
149
• Lecture 14: State diagrams
ECEN 1400 Introduction to Analog and Digital Electronics
Quiz 14.3
Q: Consider the state table row: Current = 0,
Input = 1, Next = 1. Only one JK flip flop will
be required for this device. What are the optimal
J and K values to use in the design to implement
this transition?
A: J = 0, K = 0.
B: J = 0, K = 1.
C: J = 1, K = 0.
D: J = 1, K = 1.
E: J = 1, K = X.
Reading from the JK flip flop truth table, if we start in 0 and want to end in 1, we
can either set (J=1,K=0) or toggle (J=1, K=1), so E is the best choice. Both C
and D would work, but are not optimal because X’s on the Karnaugh map help us
reduce the circuit implementation.
Robert R. McLeod, University of Colorado
150