Matakuliah
Tahun
Versi
: H0344/Organisasi dan Arsitektur Komputer
: 2005
: 1/1
Pertemuan 25
Parallel Processing 1
1
Learning Outcomes
Pada akhir pertemuan ini, diharapkan mahasiswa
akan mampu :
• Menjelaskan prinsip kerja parallel
processing
2
Outline Materi
•
•
•
•
•
•
Multiple Processor Organization
Symmetric Multiprocessor
Cache Coherence and The MESI Protocol
Clusters
Non-uniform Memory Access
Vector Computation
3
Multiple processor organizations
The Flynn taxonomy:
• Single instruction, single data (SISD) stream
• Single instruction, multiple data (SIMD) stream
• Multiple instruction, single data (MISD) stream
• Multiple instruction, multiple data (MIMD) stream
4
Multiple processor organizations
A taxonomy of parallel processor architectures:
Processor organizations
SISD
SIMD
Uniprocessor
Vector
Array
processor processor
MISD
MIMD
Shared memory
(tightly couple)
Array processor
(loosely couple)
Symmetric
Non-uniform
multiprocessor memory access
(SMP)
(NUMA)
Clusters
5
Multiple processor organizations
IS
DS
PU
MU
PU1
(a) SISD
CU2
CUn
IS
IS
IS
PU1
PU2
PUn
DS
DS
(a) MIMD (with shared memory)
CU = Control unit
IS = Instruction stream
PU = Processing unit
DS = Data stream
MU = Memory unit
LM = Local memory
IS
PU2
DS
LM1
LM2
DS
PUn
Shared memory
CU1
CU
DS
DS
LMn
(b) SIMD (with distributed memory)
PU1
CU
SISD = Single instruction,
single data stream
SIMD = Single instruction,
multiple data stream
MIMD = Multiple instruction,
multiple data stream
IS
PU2
PUn
DS
DS
DS
LM1
LM2
Shared memory
CU
LMn
(b) MIMD (with distributed memory)
6
Symmetric Multiprocessor
As SMP organization has a number of potential advantage over
a uniprocessor organization, including the following:
• Performance
• Availability
• Incremental growth
• Scaling
7
Symmetric Multiprocessor
Multiprogramming and multiprocessing
Process 1
Process 2
Process 3
(a) Interleaving (multiprogramming, one processor)
Process 1
Process 2
Process 3
(b) Interleaving and overlapping (multiprogramming, multiple processor)
8
Symmetric Multiprocessor
A tightly couple multiprocessor
Processor
Processor
Processor
I/O
Interconnection
network
I/O
I/O
Main memory
9
Symmetric Multiprocessor
Organizational approaches for an SMP can be classified
as follows:
• Time shared or common bus
• Multiport memory
• Central control unit
10
Symmetric Multiprocessor
Time-shared bus
Processor
Processor
L1 cache
L2 cache
L1 cache
L2 cache
Processor
L1 cache
L2 cache
Shared bus
I/O adapter
Main
memory
I/O adapter
I/O adapter
11
Symmetric Multiprocessor
Multiport memory
M1
M2
Mk
P1
I/O1
Pn
I/Om
12
Symmetric Multiprocessor
Central control unit
The central control unit funnels separate data streams back and
forth between independent modules: processor, memory, I/O.
The controller can buffer requests and perform arbitration and
timing functions. It can also pass status and control messages
between processors and perform cache update alerting.
13
Symmetric Multiprocessor
Multiprocessor operating system design considerations:
• Simultaneous concurrent processes
• Scheduling
• Synchronization
• Memory management
• Reliability and fault tolerance
14