List of Paper Published by GTU PG SCHOOL 2013-15 VLSI & ESD Branch Students
ENROLMENT NO.
STUDENT NAME
TITLE OF PAPER
131060752001
AGRAWAL NIRAV
MAHENDRABHAI
131060752005
BHANKHAR DHVANI
ARUNKUMAR
131060752006
PRAJAPATI CHINTAN
NAVINBHAI
131060752010
KANERIYA HARDIK
VALLABHBHAI
NON UNIFORMITY
CORRECTION ALGORITHM
FOR LARGE FORMAT
SHORTWAVE INFRARED
IMAGING ARRAY
SYSTEMVERILOG BASED
VERIFICATION
ENVIRONMENT FOR
WISHBONE INTERFACE OF
AHB-WISHBONE BRIDGE,
AN OVERVIEW OF ON-CHIP
BUS ARCHITECTURE
RELATED TO BRIDGE
DEVELOPING LIBRARY FOR
TRANSPORT LAYER OF
INTERNET PROTOCOL
SUITE ON CUDA PLATFORM
DESIGN OF I2C MASTER
WITH MULTIPLE SLAVE
131060752011
KANJARIYA SAHDEV
DHARAMSHIBHAI
131060752012
KOTHARI JAY CHETAN
131060752013
KUBAVAT MAYUR
NAVINCHANDRA
INTERNAL
SUPERVISOR NAME
LINK FOR PAPER
www.ijritcc.org/download/1432009099.pdf
SAMIR SHROFF
http://www.ijcst.com/vol62/1/25-Bhankhar-Dhvani.pdf,
http://www.ijsres.com/2014/vol-1_issue-6/paper_6.pdf
RAHUL BHIVARE
http://www.ijritcc.org/download/1432009732.pdf
SANTOSH JAGTAP
http://www.ijritcc.org/download/1432538503.pdf
ARCHITECTURE AND
DESIGN OF GENERIC IEEE754 BASED FLOATING
POINT ADDER,
SUBTRACTOR AND
MULTIPLIER
BENCHMARKING REAL TIME
LINUX IMPLEMENTATION
ON EMBEDDED PLATFORM
RUTARTH PATEL
http://www.ijritcc.org/browse/volume-3-issues/may15-volume-3-issue-5/39
MR.BABU
KRISHNAMURTHY
http://www.ijritcc.org/browse/volume-3-issues/may15-volume-3-issue-5/39
DEVELOPMENT OF UVM
BASED REUSABE
VERIFICATION
ENVIRONMENT FOR SHA-3
CRYPTOGRAPHIC CORE
MR. MANJUNATH
GOWDA
http://www.ijritcc.org/download/1432358802.pdf
131060752016
KESARANI MOHSIN
FATEHMOHAMAD
IMPLEMENTATION OF IPV6
IN EMBEDDED DEVICE
USING LWIP TCP/IP STACK
131060752018
PATEL ARPIT
BHARATBHAI
131060752019
HEMEX PATEL
131060752020
HITIXA RAJESHKUMAR
PATEL
131060752021
PATEL MEGHAL
PANKAJKUMAR
131060752024
RATHOD RANJITSINH
VIJAYSINH
131060752025
SHAH BHAVESH
MAHESHBHAI
UVM BASED VERIFICATION
ENVIRONMENT FOR USB
3.0 PHYSICAL LAYER AND
LTSSM OF LINK LAYER
ARM BASED EASY WATER
DISTRIBUTION AND DATA
RECORDING SYSTEM
IMPLEMENTATION OF
WIRELESS SENSOR HUB TO
SUPPORT PROTOCOLS
INTEROPERABILITY
VLSI IMPLEMENTATION OF
REVERSIBLE
WATERMARKING
ALGORITHM
DESIGN OF USB
COMPOSITE DEVICE AND
HOST DRIVER FRAMEWORK
IMPLEMENTATION OF MPU
FOR A SAFE FREERTOS
FRAME-WORK
131060752026
SHAH PARTH
DUSHYANTBHAI
131060752028
THANTH DINESHBHAI
NANJIBHAI
131060752031
HARINDRA G.
BALADANIYA
DESIGN OF MULTICHANNEL
UART CONTROLLER WITH
AXI4.0-LITE INTERFACE
WI-FI BASED SMART
ENERGY METER
DEVELOPMENT OF M2M
FRAMEWORK INTEGRATING
SHORT RANGE WIRED AND
WIRELESS PROTOCOLS
FOR HOME AUTOMATION
SYSTEM
MR. VIKAS
SHRIVASTAVA
http://www.ijritcc.org/browse/volume-3-issues/may15-volume-3-issue-5/39
http://www.ijritcc.org/download/1432347150.pdf
MR.AMOL BOROLE
www.ijritcc.org
MR. RAJESH SOLA
http://www.ijrcct.org/index.php/ojs/article/view/105
1/pdf
MRS. MOUSAMI
TURUK
http://www.ijritcc.org/download/1432539024.pdf
RAJESH SOLA
http://www.ijritcc.org/download/1431582443.pdf
BABU
KRISHNAMURTHY
http://www.ijritcc.org/browse/volume-3-issues/may15-volume-3-issue-5/39
MR. SANTOSH
JAGTAP
http://www.ijritcc.org/download/1432009688.pdf
MR.AMOL BOROLE
http://ijrcct.org/index.php/ojs/article/view/1105
http://pnrsolution.org/Datacenter/Vol3/Issue3/73.pd
f
131060752034
GADHIA DEEP
HARESHKUMAR
131060752035
DABHI JAY
BHARATBHAI
131060752036
GOSWAMI DISHA
MANOJBHAI
131060752038
PATEL DHRUVILKUMAR
PANKAJBHAI
131060752039
PATEL PRERNAKUMARI
ARVINDBHAI
131060752040
PATEL RIDDHIBEN
ANILBHAI
131060752041
PATEL RUTARTH
RAJESHBHAI
131060752044
SUCHIKA LALIT
HMI FOR INTERACTIVE 3D
IMAGES WITH
INTEGRATION OF
INDUSTRIAL PROCESS
CONTROL
DESIGN A PATTERN
GENERATOR WITH LOW
SWITCHING ACTIVITY TO
TEST COMPLEX
COMBINATIONAL LOGIC
WITH HIGH TEST
COVERAGE
IMPLEMENTATION OF
SYSTEMVERILOG
ENVIRONMENT FOR
FUNCTIONAL VERIFICATION
OF AHB-DMA BRIDGE
MONITORING AND
CONTROLLING EMBEDDED
DEVICE USING ANDROID
FRAMEWORK
DESIGN A LOW POWER
BUILT IN SELF TEST (BIST)
ARCHITECTURE FOR FAST
MULTIPLIER AND OPTIMIZE
IN TERMS OF REAL TIME
FUNCTIONALITY
VLSI IMPLEMENTATION OF
REVERSIBLE
WATERMARKING USING
RCM
DESIGN OF PARALLEL
ADVANCED ENCRYPTION
STANDARD ALGORITHM
UVM BASED VERIFICATION
OF CAN PROTOCOL
CONTROLLER USING
SYSTEM VERILOG
MR. CHAITANNYA
MAHATME
http://www.ijritcc.org/browse/volume-3-issues/may15-volume-3-issue-5/39
http://www.ijrcct.org/index.php/ojs/article/view/110
6
DR. DHARMESH J.
SHAH
http://www.ijritcc.org/download/1432346252.pdf
http://www.ijritcc.org/download/1432182441.pdf
HITESH PRADHAN
http://www.ijritcc.org/browse/volume-3-issues/mar15-volume-3-issue-3/37
MOUSAMI TURUK
http://www.ijritcc.org/download/1432182614.pdf
SAHDEV KANJARIYA
http://www.ijrcct.org/index.php/ojs/article/view/107
5
http://www.ijritcc.org/download/1432539625.pdf
131060752045
SUTARIA JIMMY
NILKUMAR
131060752045
SUTARIA JIMMY
NILKUMAR
131060752046
THAKOR JAY
CHANDRASINH
131060752048
VAGHELA MEGHA
NARESHBHAI
131060752049
ATENG ERIC
131060752050
BUA BAKER
131060752051
RUTAGANGIBWA
VICENT
131060752051
RUTAGANGIBWA
VICENT
DESIGN OF TERNARY D
LATCH USING CARBON
NANOTUBE FIELD EFFECT
TRANSISTOR
DESIGN OF RING
TOPOLOGY USING SET OF
NODE
DEVELOPMENT OF
HORIZONTAL IOT
PLATFORM USING
DEVICEHIVE FRAMEWORK
GUI BASED CODE
GENERATION FOR
EMBEDDED SYSTEMS
FPGA IMPLEMENTATION OF
MEDIAN FILTER USING AN
IMPROVED ALGORITHM
FOR IMAGE PROCESSING
UVM BASED VERIFICATION
OF ETHERNET SWITCH
USING SYSTEMVERILOG
A SURVEY ON THE
IMPLEMENTATION OF REAL
TIME SYSTEMS FOR
INDUSTRIAL AUTOMATION
APPLICATIONS
IMPLEMENTATION OF REAL
TIME SYSTEMS ON
FREERTOS PLATFORM FOR
INDUSTRIAL AUTOMATION
APPLICATIONS
PROF. SATISH
NARKEDE
https://drive.google.com/file/d/0B8fHkmBWRVi2bG4
1UFdCM3BqcUk/view
RIDDHI PANOT
http://www.ijrcct.org/index.php/ojs/article/view/105
0
CHAITANNYA
MAHATME
http://www.ijritcc.org/browse/volume-3-issues/may15-volume-3-issue-5/39
GADHIA DEEP H.
http://www.ijritcc.org/browse/volume-3-issues/may15-volume-3-issue-5/39
ijirst.org/Article.php?manuscript=IJIRSTV1I12013
MR. ASHISH PRABHU GUIDE
http://ijirst.org/index.php?p=Archives&v=1&i=10&st
art=20
BABU
KRISHNAMURTHY
http://www.ijirst.org/Article.php?manuscript=IJIRSTV
1I7066
BABU
KRISHNAMURTHY
http://www.ijsrd.com/Article.php?manuscript=IJSRD
V3I30232