CMOS, 1.8 V to 5.5 V/±2.5 V, 3 Ω
Low Voltage 4-/8-Channel Multiplexers
ADG708/ADG709
FEATURES
FUNCTIONAL BLOCK DIAGRAMS
1.8 V to 5.5 V single supply
±2.5 V dual supply
3 Ω on resistance
0.75 Ω on resistance flatness
100 pA leakage currents
14 ns switching times
Single 8-to-1 multiplexer ADG708
Differential 4-to-1 multiplexer ADG709
16-lead TSSOP package
Low power consumption
TTL-/CMOS-compatible inputs
ADG708
S1
D
S8
APPLICATIONS
A0
A1
00041-001
1 OF 8
DECODER
A2 EN
Figure 1.
Data acquisition systems
Communication systems
Relay replacement
Audio and video switching
Battery-powered systems
ADG709
S1A
DA
GENERAL DESCRIPTION
S4A
The ADG708/ADG709 are low voltage, CMOS analog
multiplexers comprising eight single channels and four
differential channels, respectively. The ADG708 switches one of
eight inputs (S1 to S8) to a common output, D, as determined
by the 3-bit binary address lines A0, A1, and A2. The ADG709
switches one of four differential inputs to a common differential
output as determined by the 2-bit binary address lines A0 and
A1. An EN input on both devices is used to enable or disable
the device. When disabled, all channels are switched off.
Low power consumption and an operating supply range of
1.8 V to 5.5 V make the ADG708/ADG709 ideal for batterypowered, portable instruments. All channels exhibit breakbefore-make switching action preventing momentary shorting
when switching channels.
These switches are designed on an enhanced submicron process
that provides low power dissipation yet gives high switching
speed, very low on resistance, and leakage currents.
On resistance is in the region of a few ohms and is closely matched
between switches and very flat over the full signal range. These parts
can operate equally well as either multiplexers or demultiplexers
and have an input signal range that extends to the supplies.
S1B
DB
S4B
A0
A1
EN
00041-002
1 OF 4
DECODER
Figure 2.
PRODUCT HIGHLIGHTS
1.
2.
3.
4.
5.
Single-/dual-supply operation. The ADG708/ADG709 are
fully specified and guaranteed with 3 V and 5 V single-supply
and ±2.5 V dual-supply rails.
Low RON (3 Ω typical).
Low power consumption (<0.01 μW).
Guaranteed break-before-make switching action.
Small 16-lead TSSOP package.
The ADG708/ADG709 are available in a 16-lead TSSOP.
Rev. C
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarks and registered trademarks are the property of their respective owners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
www.analog.com
Fax: 781.461.3113 ©2000–2009 Analog Devices, Inc. All rights reserved.
ADG708/ADG709
TABLE OF CONTENTS
Features .............................................................................................. 1 Pin Configurations and Function Descriptions ......................... 10 Applications ....................................................................................... 1 Truth Tables................................................................................. 11 General Description ......................................................................... 1 Typical Performance Characteristics ........................................... 12 Functional Block Diagrams ............................................................. 1 Test Circuits ..................................................................................... 15 Product Highlights ........................................................................... 1 Terminology .................................................................................... 18 Revision History ............................................................................... 2 Applications Information .............................................................. 19 Specifications..................................................................................... 3 Power Supply Sequencing ......................................................... 19 Dual Supply ................................................................................... 7 Outline Dimensions ....................................................................... 20 Absolute Maximum Ratings............................................................ 9 Ordering Guide .......................................................................... 20 ESD Caution .................................................................................. 9 REVISION HISTORY
4/09−Rev. B to Rev. C
Changes to Table 1 ............................................................................ 3
Changes to Table 2 ............................................................................ 5
Changes to Table 3 ............................................................................ 7
Moved Truth Tables Section.......................................................... 11
Changes to Figure 7, Figure 8, and Figure 9................................ 12
Changes to Figure 13 and Figure 14 ............................................. 13
Moved Terminology Section ......................................................... 18
Changes to Ordering Guide .......................................................... 20
8/06−Rev. A to Rev. B
Updated Format .................................................................. Universal
Changes to Absolute Maximum Ratings Section ......................... 9
Added Table 7 and Table 8 ............................................................ 10
Updated Outline Dimensions ....................................................... 18
Changes to Ordering Guide .......................................................... 18
4/02—Rev. 0 to Rev. A
Edits to Features and Product Highlights ..................................... 1
Change to Specifications .............................................................. 2–4
Edits to Absolute Maximum Ratings Notes .................................. 5
Edits to TPCs 2, 5, 6–9, 11, and 15 ............................................. 7–9
Edits to Test Circuits 9 and 10 ...................................................... 11
Addition of Test Circuit 11 ............................................................ 11
10/00—Revision 0: Initial Version
Rev. C | Page 2 of 20
ADG708/ADG709
SPECIFICATIONS
VDD = 5 V ± 10%, VSS = 0 V, GND = 0 V, unless otherwise noted.
Table 1.
Parameter
ANALOG SWITCH
Analog Signal Range
On Resistance (RON)
On Resistance Match
Between Channels (ΔRON)
On Resistance Flatness
(RFLAT (ON))
+25°C
B Version
−40°C to −40°C to
+85°C
+125°C
0 V to
VDD
5
7
0.8
1.5
Drain Off Leakage, ID (Off )
±0.01
Channel On Leakage, ID, IS (On)
±0.01
4.5
0.4
1.65
±20
±20
±20
7
Ω max
Ω typ
0.8
1.5
Ω max
Ω typ
1.2
1.65
Ω max
±20
±20
nA typ
±0.1
±0.01
±0.3
±0.1
±0.01
±0.75
±0.1
±0.75
2.4
0.8
0.005
±1
±6
nA max
nA typ
nA max
nA typ
VIN = VINL or VINH
RL = 300 Ω, CL = 35 pF;
see Figure 24
VS1 = 3 V/0 V, VS8 = 0 V/3 V
RL = 300 Ω, CL = 35 pF
14
14
ns typ
Break-Before-Make Time
Delay, tOPEN
8
tON (EN)
14
tOFF (EN)
7
Charge Injection
±3
Off Isolation
−60
−80
25
25
ns max
ns typ
1
1
25
25
12
12
±3
ns min
ns typ
ns max
ns typ
ns max
pC typ
−60
−80
dB typ
dB typ
8
14
25
25
7
12
12
Rev. C | Page 3 of 20
VD = VS = 1 V or 4.5 V;
see Figure 23
±0.1
2
1
VD = 4.5 V/1 V, VS = 1 V/4.5 V;
see Figure 22
V min
V max
2
1
VDD = 5.5 V
VD = 4.5 V/1 V, VS = 1 V/4.5 V;
see Figure 21
2.4
0.8
Digital Input Capacitance,
CIN
DYNAMIC CHARACTERISTICS 1
tTRANSITION
25
VS = 0 V to VDD, IDS = 10 mA
VS = 0 V to VDD, IDS = 10 mA
nA max
μA typ
μA max
pF typ
25
VS = 0 V to VDD, IDS = 10 mA;
see Figure 20
±6
0.005
±0.1
Test Conditions/
Comments
V
5
±0.01
±20
Unit
Ω typ
0.75
1.2
±0.01
0 V to
VDD
3
0.75
LEAKAGE CURRENTS
Source Off Leakage, IS (Off)
DIGITAL INPUTS
Input High Voltage, VINH
Input Low Voltage, VINL
Input Current
IINL or IINH
0 V to
VDD
3
4.5
0.4
+25°C
C Version
−40°C to −40°C to
+85°C
+125°C
VS = 3 V; see Figure 25
RL = 300 Ω, CL = 35 pF
VS = 3 V; see Figure 26
RL = 300 Ω, CL = 35 pF
VS = 3 V; see Figure 26
VS = 2.5 V, RS = 0 Ω,
CL = 1 nF; See Figure 27
RL = 50 Ω, CL = 5 pF, f = 10 MHz
RL = 50 Ω, CL = 5 pF,
f = 1 MHz; see Figure 28
ADG708/ADG709
B Version
−40°C to −40°C to
+85°C
+125°C
C Version
−40°C to −40°C to
+85°C
+125°C
−80
−80
dB typ
−3 dB Bandwidth
55
55
MHz typ
CS (Off )
CD (Off )
ADG708
ADG709
CD, CS (On)
ADG708
ADG709
POWER REQUIREMENTS
IDD
13
13
pF typ
Test Conditions/
Comments
RL = 50 Ω, CL = 5 pF,
f = 10 MHz
RL = 50 Ω, CL = 5 pF, f = 1 MHz;
see Figure 29
RL = 50 Ω, CL = 5 pF;
see Figure 30
f = 1 MHz
85
42
85
42
pF typ
pF typ
f = 1 MHz
f = 1 MHz
96
48
96
48
pF typ
pF typ
f = 1 MHz
f = 1 MHz
VDD = 5.5 V
Digital inputs = 0 V or 5.5 V
Parameter
Channel-to-Channel
Crosstalk
+25°C
−60
0.001
0.001
1.0
1
+25°C
−60
1.0
1.0
Guaranteed by design, not subject to production test.
Rev. C | Page 4 of 20
1.0
Unit
dB typ
μA typ
μA max
ADG708/ADG709
VDD = 3 V ± 10%, VSS = 0 V, GND = 0 V, unless otherwise noted.
Table 2.
Parameter
ANALOG SWITCH
Analog Signal Range
On Resistance (RON)
On Resistance Match Between
Channels (ΔRON)
+25°C
B Version
−40°C to −40°C to
+85°C
+125°C
0 V to
VDD
0 V to
VDD
8
11
0.4
8
12
1.2
LEAKAGE CURRENTS
Source Off Leakage, IS (Off )
±0.01
Drain Off Leakage, ID (Off )
±0.01
Channel On Leakage, ID, IS (On)
±0.01
14
11
0.4
2
±20
±20
±20
±20
±20
12
1.2
±0.1
±0.01
±0.3
±0.1
±0.01
±0.75
±0.1
±0.75
2
±1
±6
Ω max
Ω typ
nA max
nA typ
nA max
nA typ
VIN = VINL or VINH
±0.1
RL = 300 Ω, CL = 35 pF;
see Figure 24
VS1 = 2 V/0 V, VS2 = 0 V/2 V
RL = 300 Ω, CL = 35 pF
18
ns typ
tON (EN)
18
tOFF (EN)
8
30
30
ns max
ns typ
1
1
30
30
15
15
8
1
Charge Injection
±3
±3
ns min
ns typ
ns max
ns typ
ns max
pC typ
Off Isolation
−60
−60
dB typ
−80
−80
dB typ
−60
−60
dB typ
−80
−80
dB typ
55
55
MHz typ
18
30
−3 dB Bandwidth
30
8
15
Channel-to-Channel Crosstalk
1
15
Rev. C | Page 5 of 20
VS = VD = 1 V or 3 V;
see Figure 23
V min
V max
18
30
VS = 3 V/1 V, VD = 1 V/3 V;
see Figure 22
2.0
0.8
2
30
VDD = 3.3 V
VS = 3 V/1 V, VD = 1 V/3 V;
see Figure 21
nA max
2
8
VS = 0 V to VDD,
IDS = 10 mA
Ω max
μA typ
μA max
pF typ
Break-Before-Make Time
Delay, tOPEN
VS = 0 V to VDD, IDS = 10 mA;
see Figure 20
±6
0.005
±0.1
Digital Input Capacitance, CIN
DYNAMIC CHARACTERISTICS 1
tTRANSITION
14
Test Conditions/
Comments
V
nA typ
2.0
0.8
0.005
Unit
Ω typ
±0.01
±20
DIGITAL INPUTS
Input High Voltage, VINH
Input Low Voltage, VINL
Input Current
IINL or IINH
+25°C
C Version
−40°C to −40°C to
+85°C
+125°C
VS = 2 V; see Figure 25
RL = 300 Ω, CL = 35 pF
VS = 2 V; see Figure 26
RL = 300 Ω, CL = 35 pF
VS = 2 V; see Figure 26
VS = 1.5 V, RS = 0 Ω,
CL = 1 nF; see Figure 27
RL = 50 Ω, CL = 5 pF,
f = 10 MHz
RL = 50 Ω, CL = 5 pF,
f = 1 MHz; see Figure 28
RL = 50 Ω, CL = 5 pF,
f = 10 MHz
RL = 50 Ω, CL = 5 pF,
f = 1 MHz; see Figure 29
RL = 50 Ω, CL = 5 pF;
see Figure 30
ADG708/ADG709
Parameter
CS (Off )
CD (Off )
ADG708
ADG709
CD, CS (On)
ADG708
ADG709
POWER REQUIREMENTS
IDD
+25°C
13
B Version
−40°C to −40°C to
+85°C
+125°C
Unit
pF typ
Test Conditions/
Comments
f = 1 MHz
85
42
85
42
pF typ
pF typ
f = 1 MHz
f = 1 MHz
96
48
96
48
pF typ
pF typ
f = 1 MHz
f = 1 MHz
VDD = 3.3 V
Digital inputs = 0 V or 3.3 V
0.001
0.001
1.0
1
+25°C
13
C Version
−40°C to −40°C to
+85°C
+125°C
1.0
1.0
Guaranteed by design, not subject to production test.
Rev. C | Page 6 of 20
1.0
μA typ
μA max
ADG708/ADG709
DUAL SUPPLY
VDD = 2.5 V ± 10%, VSS = –2.5 V ± 10%, GND = 0 V, unless otherwise noted.
Table 3.
Parameter
ANALOG SWITCH
Analog Signal Range
On Resistance (RON)
On Resistance Match Between
Channels (ΔRON)
On Resistance Flatness (RFLAT (ON))
+25°C
B Version
−40°C to −40°C to
+85°C
+125°C
VSS to VDD
2.5
4.5
0.4
5
7
0.8
1.5
Drain Off Leakage, ID (Off )
±0.01
Channel On Leakage, ID, IS (On)
±0.01
4.5
0.4
1.65
±20
±20
±20
±20
±20
Ω max
Ω typ
0.8
1.5
1.0
1.65
Ω max
Ω typ
Ω max
nA typ
±0.1
±0.01
±0.3
±0.1
±0.01
±0.75
±0.1
±0.75
1.7
0.7
0.005
V
Ω typ
7
±0.01
±20
Unit
5
0.6
1.0
±0.01
VSS to VDD
2.5
0.6
LEAKAGE CURRENTS
Source Off Leakage, IS (Off )
DIGITAL INPUTS
Input High Voltage, VINH
Input Low Voltage, VINL
Input Current
IINL or IINH
+25°C
C Version
−40°C to −40°C to
+85°C
+125°C
±1
±6
nA max
nA typ
nA max
nA typ
VIN = VINL or VINH
RL = 300 Ω, CL = 35 pF;
see Figure 24
VS = 1.5 V/0 V; see Figure 24
RL = 300 Ω, CL = 35 pF
14
14
ns typ
Break-Before-Make Time Delay,
tOPEN
8
tON (EN)
14
tOFF (EN)
8
Charge Injection
±3
Off Isolation
25
25
ns max
ns typ
1
1
25
25
15
15
±3
ns min
ns typ
ns max
ns typ
ns max
pC typ
−60
−60
dB typ
−80
−80
dB typ
8
14
25
25
8
15
15
Rev. C | Page 7 of 20
VS = VD = +2.25 V/−1.25 V;
see Figure 23
±0.1
2
1
VS = +2.25 V/−1.25 V,
VD = −1.25 V/+2.25 V;
see Figure 22
V min
V max
2
1
VDD = +2.75 V, VSS = −2.75 V
VS = +2.25 V/−1.25 V,
VD = −1.25 V/+2.25 V;
see Figure 21
1.7
0.7
Digital Input Capacitance, CIN
DYNAMIC CHARACTERISTICS 1
tTRANSITION
25
VS = VSS to VDD, IDS = 10 mA
VS = VSS to VDD, IDS = 10 mA
nA max
μA typ
μA max
pF typ
25
VS = VSS to VDD, IDS = 10 mA;
see Figure 20
±6
0.005
±0.1
Test Conditions/
Comments
VS = 1.5 V; see Figure 25
RL = 300 Ω, CL = 35 pF
VS = 1.5 V; see Figure 26
RL = 300 Ω, CL = 35 pF
VS = 1.5 V; see Figure 26
VS = 0 V, RS = 0 Ω, CL = 1 nF;
see Figure 27
RL = 50 Ω, CL = 5 pF,
f = 10 MHz
RL = 50 Ω, CL = 5 pF,
f = 1 MHz; see Figure 28
ADG708/ADG709
B Version
−40°C to −40°C to
+85°C
+125°C
C Version
−40°C to −40°C to
+85°C
+125°C
−80
−80
dB typ
−3 dB Bandwidth
55
55
MHz typ
CS (Off )
CD (Off )
ADG708
ADG709
CD, CS (On)
ADG708
ADG709
POWER REQUIREMENTS
IDD
13
13
pF typ
Test Conditions/
Comments
RL = 50 Ω, CL = 5 pF,
f = 10 MHz
RL = 50 Ω, CL = 5 pF,
f = 1 MHz; see Figure 29
RL = 50 Ω, CL = 5 pF;
see Figure 30
f = 1 MHz
85
42
85
42
pF typ
pF typ
f = 1 MHz
f = 1 MHz
96
48
96
48
pF typ
pF typ
f = 1 MHz
f = 1 MHz
VDD = 2.75 V
Digital inputs = 0 V or 2.75 V
Parameter
Channel-to-Channel Crosstalk
ISS
1
+25°C
−60
0.001
+25°C
−60
0.001
1.0
1.0
1.0
1.0
0.001
1.0
1.0
1.0
1.0
0.001
Guaranteed by design not subject to production test.
Rev. C | Page 8 of 20
Unit
dB typ
μA typ
μA max
μA typ
μA max
VSS = −2.75 V
Digital inputs = 0 V or 2.75 V
ADG708/ADG709
ABSOLUTE MAXIMUM RATINGS
TA = 25°C, unless otherwise noted.
Table 4.
Parameter
VDD to VSS
VDD to GND
VSS to GND
Analog Inputs 1
1
Digital Inputs
Peak Current, S or D (Pulsed at 1 ms,
10% Duty Cycle Maximum)
Continuous Current, S or D
Operating Temperature
Industrial Temperature Range
Storage Temperature Range
Junction Temperature
TSSOP Package, Power Dissipation
θJA Thermal Impedance
θJC Thermal Impedance
Lead Temperature, Soldering
Vapor Phase (60 sec)
Infrared (15 sec)
Rating
7V
−0.3 V to +7 V
+0.3 V to −3.5 V
VSS − 0.3 V to VDD + 0.3 V
or 30 mA, whichever
occurs first
−0.3 V to VDD + 0.3 V or
30 mA, whichever
occurs first
100 mA
Stresses above those listed under Absolute Maximum Ratings
may cause permanent damage to the device. This is a stress
rating only; functional operation of the device at these or any
other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect
device reliability.
Only one absolute maximum rating can be applied at any one time.
ESD CAUTION
30 mA
−40°C to +125°C
−65°C to +150°C
150°C
432 mW
150.4°C/W
27.6°C/W
215°C
220°C
1
Overvoltages at A, EN, S, or D are clamped by internal codes. Current should
be limited to the maximum ratings given.
Rev. C | Page 9 of 20
ADG708/ADG709
PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS
1
16
A1
A0 1
16
A1
EN 2
15
A2
EN 2
15
GND
14
GND
VSS
3
3
S1
4
ADG708
13
S1A
4
S2
5
TOP VIEW
(Not to Scale)
VDD
12
S5
S2A
5
S3
6
11
S6
S3A
6
S4
7
10
S7
S4A
7
10
D
8
9
S8
DA
8
9
00041-003
VSS
Figure 3. ADG708 Pin Configuration
14
VDD
ADG709
13
TOP VIEW
(Not to Scale)
S1B
12
S2B
11
S3B
S4B
DB
00041-004
A0
Figure 4. ADG709 Pin Configuration
Table 5. ADG708 Pin Function Descriptions
Pin No.
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
Mnemonic
A0
EN
VSS
S1
S2
S3
S4
D
S8
S7
S6
S5
VDD
GND
A2
A1
Description
Digital Input. Controls the configuration of the switch, as shown in the truth table (see Table 7).
Digital Input. Controls the configuration of the switch, as shown in the truth table (see Table 7).
Most Negative Power Supply Pin in Dual-Supply Applications. For single-supply applications, it should be tied to GND.
Source Terminal. Can be an input or output.
Source Terminal. Can be an input or output.
Source Terminal. Can be an input or output.
Source Terminal. Can be an input or output.
Drain Terminal. Can be an input or output.
Source Terminal. Can be an input or output.
Source Terminal. Can be an input or output.
Source Terminal. Can be an input or output.
Source Terminal. Can be an input or output.
Most Positive Power Supply Pin.
Ground (0 V) Reference.
Digital Input. Controls the configuration of the switch, as shown in the truth table (see Table 7).
Digital Input. Controls the configuration of the switch, as shown in the truth table (see Table 7).
Table 6. ADG709 Pin Function Descriptions
Pin No.
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
Mnemonic
A0
EN
VSS
S1A
S2A
S3A
S4A
DA
DB
S4B
S3B
S2B
S1B
VDD
GND
A1
Description
Digital Input. Controls the configuration of the switch, as shown in the truth table (see Table 8).
Digital Input. Controls the configuration of the switch, as shown in the truth table (see Table 8).
Most Negative Power Supply Pin in Dual-Supply Applications. For single-supply applications, it should be tied to GND.
Source Terminal. Can be an input or output.
Source Terminal. Can be an input or output.
Source Terminal. Can be an input or output.
Source Terminal. Can be an input or output.
Drain Terminal. Can be an input or output.
Drain Terminal. Can be an input or output.
Source Terminal. Can be an input or output.
Source Terminal. Can be an input or output.
Source Terminal. Can be an input or output.
Source Terminal. Can be an input or output.
Most Positive Power Supply Pin.
Ground (0 V) Reference.
Digital Input. Controls the configuration of the switch, as shown in the truth table (see Table 8).
Rev. C | Page 10 of 20
ADG708/ADG709
TRUTH TABLES
Table 7. ADG708 Truth Table
A2
X1
0
0
0
0
1
1
1
1
1
A1
X1
0
0
1
1
0
0
1
1
A0
X1
0
1
0
1
0
1
0
1
EN
0
1
1
1
1
1
1
1
1
X
Switch Condition
None
1
2
3
4
5
6
7
8
X = Don’t care.
Table 8. ADG709 Truth Table
A1
X1
0
0
1
1
1
A0
X1
0
1
0
1
EN
0
1
1
1
1
On Switch Pair
None
1
2
3
4
X = Don’t care.
Rev. C | Page 11 of 20
ADG708/ADG709
TYPICAL PERFORMANCE CHARACTERISTICS
8
8
TA = 25°C
VSS = 0V
7
VDD = 3V
VSS = 0V
7
+125°C
6
5
VDD = 3.3V
4
VDD = 4.5V
VDD = 5.5V
3
4
–40°C
3
2
2
1
1
0
1
2
3
4
VD OR VS – DRAIN OR SOURCE VOLTAGE (V)
5
+25°C
0
00041-005
0
+85°C
5
0
Figure 5. On Resistance as a Function of VD (VS) for Single Supply
0.5
1.0
1.5
2.0
2.5
VD OR VS – DRAIN OR SOURCE VOLTAGE (V)
3.0
00041-008
VDD = 2.7V
ON RESISTANCE (Ω)
ON RESISTANCE (Ω)
6
Figure 8. On Resistance as a Function of VD (VS) for Different Temperatures,
Single Supply
6
8
VDD = +2.5V
VSS = –2.5V
TA = 25°C
7
5
ON RESISTANCE (Ω)
5
4
VDD = +2.25V
VSS = –2.25V
3
+125°C
4
2
2
–40°C
1
VDD = +2.75V
VSS = –2.75V
0
–3.0 –2.5 –2.0 –1.5 –1.0 –0.5
0
0.5
1.0
1.5
2.0
2.5
3.0
VD OR VS – DRAIN OR SOURCE VOLTAGE (V)
0
–2.5
00041-006
1
–2.0
–1.5
–1.0
–0.5
0
0.5
1.0
1.5
2.0
Figure 9. On Resistance as a Function of VD (VS) for Different Temperatures,
Dual Supply
0.12
8
VDD = 5V
VSS = 0V
TA = 25°C
VDD = 5V
VSS = 0V
7
0.08
CURRENT (nA)
6
5
+125°C
4
+25°C
–2.5
VD OR VS – DRAIN OR SOURCE VOLTAGE (V)
Figure 6. On Resistance as a Function of VD (VS) for Dual Supply
ON RESISTANCE (Ω)
+25°C
+85°C
3
00041-009
ON RESISTANCE (Ω)
6
+85°C
3
ID (ON)
0.04
0
IS (OFF)
–0.04
2
ID (OFF)
–0.08
–40°C
–0.12
0
1
2
3
4
VD OR VS – DRAIN OR SOURCE VOLTAGE (V)
5
0
00041-007
0
Figure 7. On Resistance as a Function of VD (VS) for Different Temperatures,
Single Supply
Rev. C | Page 12 of 20
1
2
3
VS, (VD = VDD – VS) (V)
4
Figure 10. Leakage Currents as a Function of VD (VS)
5
00041-010
1
ADG708/ADG709
0.08
VDD = 3V
VSS = 0V
TA = 25°C
0.04
ID (ON)
0.35
0.25
IS (OFF)
ID (OFF)
0.15
0.5
1.0
1.5
2.0
VD, (VS = VDD – VD) (V)
3.0
2.5
0
00041-011
0
0
20
40
60
80
100
120
TEMPERATURE (°C)
Figure 14. Leakage Currents as a Function of Temperature
Figure 11. Leakage Currents as a Function of VD (VS)
10m
0.12
VDD = +2.5V
VSS = –2.5V
TA = 25°C
0.08
TA = 25°C
1m
CURRENT (A)
0
IS (OFF)
–0.04
VDD = +2.5V
VSS = –2.5V
100µ
ID (ON), VS = VD
0.04
ID (OFF)
10µ
VDD = +5V
1µ
VDD = +3V
100n
–0.08
2.0
2.5
3.0
1n
10
00041-012
1.5
100
1k
10k
100k
FREQUENCY (Hz)
0
VDD = +5V
VSS = 0V
AND
VDD = +2.5V
VSS = –2.5V
0.20
0.15
ID (OFF)
0.10
IS (OFF)
ID (ON)
0
20
40
60
80
100
–60
–80
–100
120
TEMPERATURE (°C)
–120
30k
00041-013
0.05
–40
100k
1M
FREQUENCY (Hz)
10M
Figure 16. Off Isolation vs. Frequency
Figure 13. Leakage Currents as a Function of Temperature
Rev. C | Page 13 of 20
100M
00041-016
0.25
VDD = 5V
TA = 25°C
–20
ATTENUATION (dB)
0.30
10M
Figure 15. Supply Current vs. Input Switching Frequency
Figure 12. Leakage Currents as a Function of VD (VS)
0.35
1M
00041-015
10n
–0.12
–3.0 –2.5 –2.0 –1.5 –1.0 –0.5 0
0.5 1.0
VS, (VD = VDD – VS) (V)
CURRENT (nA)
ID (OFF)
IS (OFF)
0.05
–0.12
0
ID (ON)
0.10
–0.08
CURRENT (nA)
0.20
00041-014
0
–0.04
VDD = +3V
0.30
CURRENT (nA)
CURRENT (nA)
0.12
ADG708/ADG709
20
VDD = 5V
TA = 25°C
TA = 25°C
–40
0
–60
–20
–100
–30
100k
1M
FREQUENCY (Hz)
10M
100M
Figure 17. Crosstalk vs. Frequency
VDD = 5V
TA = 25°C
–10
–15
1M
FREQUENCY (Hz)
10M
100M
00041-018
ATTENUATION (dB)
–5
100k
–40
–3
VDD = +2.5V
VSS = –2.5V
–2
–1
0
1
2
VOLTAGE (V)
3
4
Figure 19. Charge Injection vs. Source Voltage
0
–20
30k
VDD = +3V
VSS = 0V
–10
–80
–120
30k
VDD = +5V
VSS = 0V
Figure 18. On Response vs. Frequency
Rev. C | Page 14 of 20
5
00041-019
10
QINJ (pC)
–20
00041-017
ATTENUATION (dB)
0
ADG708/ADG709
TEST CIRCUITS
IDS
VDD
VSS
VDD
VSS
V1
S1
D
ID (OFF)
S2
D
GND
Figure 22. ID (OFF)
A
VDD
VSS
VDD
VSS
VDD
VSS
VDD
VSS
S1
GND
0.8V
GND
Figure 21. IS (OFF)
VSS
VDD
VSS
ADDRESS
DRIVE (VIN)
VS1
ADG708*
VS8
S8
VS1
90%
VOUT
CL
35pF
RL
300Ω
GND
50%
VOUT
D
EN
50%
0V
S2 TO S7
A0
2.4V
3V
S1
A1
50Ω
2.4V
EN
Figure 23. ID (ON)
VDD
A2
A
VD
VS
00041-021
VD
D
S8
S8
EN
ID (ON)
S1
D
S2
VS
00041-023
IS(OFF)
0.8V
EN
00041-022
00041-020
RON = V1/IDS
VD
VS
Figure 20. On Resistance
VIN
A
S8
VS
90%
VS8
tTRANSITION
*SIMILAR CONNECTION FOR ADG709.
tTRANSITION
00041-024
S
Figure 24. Switching Time of Multiplexer, tTRANSITION
VDD
VSS
VDD
VIN
50Ω
3V
A2
VSS
S1
A1
S2 TO S7
ADDRESS
DRIVE (VIN)
VS
0V
A0
2.4V
S8
VOUT
D
EN
GND
RL
300Ω
CL
35pF
VOUT
80%
80%
tOPEN
*SIMILAR CONNECTION FOR ADG709.
Figure 25. Break-Before-Make Delay, tOPEN
Rev. C | Page 15 of 20
00041-025
ADG708*
ADG708/ADG709
VDD
VDD
VSS
3V
VSS
ENABLE
DRIVE (VIN)
A2
VS
S1
A1
0V
tOFF (EN)
S2 TO S8
A0
VO
ADG708*
EN
VIN
50%
50%
VOUT
D
CL
35pF
RL
300Ω
GND
50Ω
0.9VO
0.9VO
OUTPUT
0V
00041-026
tON (EN)
*SIMILAR CONNECTION FOR ADG709.
Figure 26. Enable Delay, tON (EN), tOFF (EN)
VDD
A2 VDD
A0
RS
VS
3V
VSS
LOGIC INPUT
(VIN)
D
S
CL VOUT
1nF
EN
VIN
0V
ADG708*
VOUT
ΔVOUT
QINJ = CL × ΔVOUT
GND
00041-027
A1
VSS
*SIMILAR CONNECTION FOR ADG709.
Figure 27. Charge Injection
VDD
VSS
0.1µF
A2
A1
A0
0.1µF
VDD
NETWORK
ANALYZER
VSS
S
50Ω
50Ω
VS
D
2.4V
EN
RL
50Ω
OFF ISOLATION = 20 log
00041-028
GND
VOUT
VOUT
VS
Figure 28. Off Isolation
VDD
VSS
0.1µF
0.1µF
V
A2 DD
A0
NETWORK
ANALYZER
50Ω
VS
50Ω
EN
2.4V
ADG708*
D
S1
RL
50Ω
S2
S8
NETWORK
ANALYZER
VOUT
GND
*SIMILAR CONNECTION FOR ADG709.
CHANNEL-TO-CHANNEL CROSSTALK = 20 log
VOUT
VS
Figure 29. Channel-to-Channel Crosstalk
Rev. C | Page 16 of 20
00041-029
A1
VSS
ADG708/ADG709
VDD
VSS
0.1µF
A2
A1
A0
0.1µF
VDD
NETWORK
ANALYZER
VSS
S
50Ω
VS
D
EN
RL
50Ω
GND
INSERTION LOSS = 20 log
VOUT WITH SWITCH
VOUT WITHOUT SWITCH
Figure 30. Bandwidth
Rev. C | Page 17 of 20
VOUT
00041-030
2.4V
ADG708/ADG709
TERMINOLOGY
tTRANSITION
Delay time measured between the 50% and 90% points of the
digital inputs and the switch on condition when switching from
one address state to another.
VDD
Most positive power supply potential.
VSS
Most negative power supply in a dual-supply application. In
single-supply applications, tie VSS to ground at the device.
tON (EN)
Delay time between the 50% and 90% points of the EN digital
input and the switch on condition.
GND
Ground (0 V) reference.
tOFF (EN)
Delay time between the 50% and 90% points of the EN digital
input and the switch off condition.
S
Source terminal. Can be an input or output.
D
Drain terminal. Can be an input or output.
tOPEN
Off time measured between the 80% points of both switches
when switching from one address state to another.
Ax
Logic control input.
Off Isolation
A measure of unwanted signal coupling through an off switch.
EN
Active high enable.
Crosstalk
A measure of unwanted signal that is coupled through from one
channel to another as a result of parasitic capacitance.
RON
Ohmic resistance between D and S.
RFLAT (ON)
Flatness is defined as the difference between the maximum and
minimum value of on resistance as measured over the specified
analog signal range.
IS (Off)
Source leakage current with the switch off.
On Loss
The loss due to the on resistance of the switch.
ID, IS (On)
Channel leakage current with the switch on.
VINL
Maximum input voltage for Logic 0.
VD (VS)
Analog voltage on Terminal D and Terminal S.
CS (Off)
Off switch source capacitance. Measured with reference to ground.
CD (Off)
Off switch drain capacitance. Measured with reference to ground.
CIN
Digital input capacitance.
Bandwidth
The frequency at which the output is attenuated by 3 dB.
On Response
The frequency response of the on switch.
ID (Off)
Drain leakage current with the switch off.
CD, CS (On)
On switch capacitance. Measured with reference to ground.
Charge
A measure of the glitch impulse transferred from injection of
the digital input to the analog output during switching.
VINH
Minimum input voltage for Logic 1.
IINL (IINH)
Input current of the digital input.
IDD
Positive supply current.
ISS
Negative supply current.
Rev. C | Page 18 of 20
ADG708/ADG709
APPLICATIONS INFORMATION
POWER SUPPLY SEQUENCING
When using CMOS devices, take care to ensure correct power
supply sequencing. Incorrect power supply sequencing can
result in the device being subjected to stresses beyond the
maximum ratings listed in Figure 4.
Always apply digital and analog inputs after power supplies and
ground. For single-supply operation, tie VSS to GND as close to
the device as possible.
Rev. C | Page 19 of 20
ADG708/ADG709
OUTLINE DIMENSIONS
5.10
5.00
4.90
16
9
4.50
4.40
4.30
6.40
BSC
1
8
PIN 1
1.20
MAX
0.15
0.05
0.30
0.19
0.65
BSC
COPLANARITY
0.10
0.20
0.09
SEATING
PLANE
8°
0°
0.75
0.60
0.45
COMPLIANT TO JEDEC STANDARDS MO-153-AB
Figure 31. 16-Lead Thin Shrink Small Outline Package [TSSOP]
(RU-16)
Dimensions shown in millimeters
ORDERING GUIDE
Model
ADG708BRU
ADG708BRU-REEL
ADG708BRU-REEL7
Temperature Range
−40°C to +125°C
−40°C to +125°C
−40°C to +125°C
Package Description
16-Lead Thin Shrink Small Outline Package [TSSOP]
16-Lead Thin Shrink Small Outline Package [TSSOP]
16-Lead Thin Shrink Small Outline Package [TSSOP]
Package Option
RU-16
RU-16
RU-16
ADG708BRUZ 1
ADG708BRUZ-REEL1
ADG708BRUZ-REEL71
ADG708CRU
ADG708CRU-REEL
−40°C to +125°C
−40°C to +125°C
−40°C to +125°C
−40°C to +125°C
−40°C to +125°C
16-Lead Thin Shrink Small Outline Package [TSSOP]
16-Lead Thin Shrink Small Outline Package [TSSOP]
16-Lead Thin Shrink Small Outline Package [TSSOP]
16-Lead Thin Shrink Small Outline Package [TSSOP]
16-Lead Thin Shrink Small Outline Package [TSSOP]
RU-16
RU-16
RU-16
RU-16
RU-16
ADG708CRU-REEL7
ADG708CRUZ1
ADG708CRUZ-REEL1
ADG708CRUZ-REEL71
−40°C to +125°C
−40°C to +125°C
−40°C to +125°C
−40°C to +125°C
16-Lead Thin Shrink Small Outline Package [TSSOP]
16-Lead Thin Shrink Small Outline Package [TSSOP]
16-Lead Thin Shrink Small Outline Package [TSSOP]
16-Lead Thin Shrink Small Outline Package [TSSOP]
RU-16
RU-16
RU-16
RU-16
ADG709BRU
ADG709BRU-REEL
ADG709BRU-REEL7
ADG709BRUZ1
ADG709BRUZ-REEL1
−40°C to +125°C
−40°C to +125°C
−40°C to +125°C
−40°C to +125°C
−40°C to +125°C
16-Lead Thin Shrink Small Outline Package [TSSOP]
16-Lead Thin Shrink Small Outline Package [TSSOP]
16-Lead Thin Shrink Small Outline Package [TSSOP]
16-Lead Thin Shrink Small Outline Package [TSSOP]
16-Lead Thin Shrink Small Outline Package [TSSOP]
RU-16
RU-16
RU-16
RU-16
RU-16
ADG709BRUZ-REEL71
ADG709CRU
ADG709CRU-REEL
ADG709CRU-REEL7
−40°C to +125°C
−40°C to +125°C
−40°C to +125°C
−40°C to +125°C
16-Lead Thin Shrink Small Outline Package [TSSOP]
16-Lead Thin Shrink Small Outline Package [TSSOP]
16-Lead Thin Shrink Small Outline Package [TSSOP]
16-Lead Thin Shrink Small Outline Package [TSSOP]
RU-16
RU-16
RU-16
RU-16
ADG709CRUZ1
ADG709CRUZ-REEL1
ADG709CRUZ-REEL71
−40°C to +125°C
−40°C to +125°C
−40°C to +125°C
16-Lead Thin Shrink Small Outline Package [TSSOP]
16-Lead Thin Shrink Small Outline Package [TSSOP]
16-Lead Thin Shrink Small Outline Package [TSSOP]
RU-16
RU-16
RU-16
1
Z = RoHS Compliant Part.
©2000–2009 Analog Devices, Inc. All rights reserved. Trademarks and
registered trademarks are the property of their respective owners.
D00041-0-4/09(C)
Rev. C | Page 20 of 20