REAL-TIME IMPLEMENTATION OF TWELVE-LEAD AUTOMATED
ELECTROCARDIOGRAM SYSTEM MEASUREMENT FOR QT DISPERSION
ANALYSIS
MOHD NAJEB BIN JAMALUDIN
UNIVERSITI TEKNOLOGI MALAYSIA
iii
To my beloved mother, father, wife and son for their great patience
iv
ACKNOWLEDGEMENT
First and foremost, an extreme gratitude to Almighty Allah for blessing me
with health, patience, guide wisdom and the kind people around me in carrying out
my duty as His servant amongst which is the Masters research that I have just
completed.
I would like to express an appreciation to my supervisor Prof. Ir. Dr. Sheikh
Hussain Shaikh Salleh for being a great advisor, supporter and also for trusting me in
handling a significant responsibility in this research in the field of Biomedical
Engineering. A thousand thanks to my co-supervisor Prof. Dato’ Dr Khalid Yusoff, a
dean of Faculty of Medical, Universiti Teknologi MARA (UiTM) for exposing the
real scenario of the medical industries and for giving immense continuous support in
this and the coming research.
I am also very thankful to my colleagues Arief, Ronisham, Rushaidin, Ting
Chee Ming, Tan Tian Swee, Amar, Kamarul, Asif and Haiza for their endless support
in the daily activities of the Centre for Biomedical Engineering. The same goes to En
Azman of Healtronics and En Rashid of Ocean Triangle for providing the research
with significant equipments along with the technical support. I am indebted to
Universiti Teknologi Malaysia for funding my Masters study, the staffs at the Faculty
Electrical Engineering for their assistance in providing the relevant views and
support.
Last but not least, I am grateful to my family for being patient and supportive.
May you be amongst the pious in the view of the Most Merciful Allah, the one and
only God.
v
ABSTRACT
Research and study of the electrocardiogram evolves with the advancement of
digital signal processing and artificial intelligence. Unfortunately, readily available
electrocardiogram machines in the market do not provide automated measurement of
the QT dispersion. Therefore, a twelve-lead electrocardiogram system is developed
in order to assist the cardiologists in carrying out their research on the cardiac
diseases. The development of the system consists of several phases. The first phase
includes the construction of a real-time twelve channels data acquisition unit with the
universal serial bus (USB) interface. The following phase includes the study and
development of the electrocardiogram signal conditioning circuits. The third phase is
the study of the designed anti-aliasing filters and its effect to the electrocardiogram
distortion. The Butterworth and the Bessel filters, each with orders of two four and
eight are compared and the 8th order Bessel low pass filter appears to be the best
candidate. The subsequent phase is the implementation of the time-domain
subtraction technique to remove the power line noise in the electrocardiogram signal
with minimal distortion. The filter is compared to a notch Twin-T filter, and results
showed that not only the time-domain subtraction technique suppresses noise, it also
preserves the original signal with minimal distortion. The automated QT interval
measurement algorithm is validated upon an annotated standard database, the
Physikalisch-Technische
Bundesanstalt
(PTB)
Diagnostic
Electrocardiogram
database which is being the focused for the International QT Interval Challenge
2006. Result shows that 28.53% of the database is correctly identified for the QRS
onset and T offset locations due to the dissimilar morphologies of the
electrocardiogram signal.
vi
ABSTRAK
Penyelidikan dalam bidang elektrokardiogram berubah dengan perkembangan
teknologi pemprosesan isyarat digital dan kepintaran buatan. Malangnya, mesin
elektrokardiogram yang berada di pasaran tidak menyediakan pengukuran nilai
percambahan QT secara automatik. Oleh itu, sebuah system elektrokardiogram dua
belas elektrod dibangunkan bagi memudahkan tugas-tugas pakar-pakar jantung
dalam melaksanakan penyelidikan mereka berkenaan penyakit-penyakit jantung.
Pembangunan sistem ini terdiri daripada beberapa fasa. Fasa pertama melibatkan
pembangunan unit perolehan isyarat dua belas elektrod melalui pengantaramukaan
bas sesiri sejagat (USB). Fasa seterusnya terdiri daripada kerja-kerja pembangunan
sistem pengkondisi isyarat analog bagi elektrokardiogram. Fasa ketiga adalah
pengkajian dalam menentukan penapis jalur tinggi dan kesannya terhadap isyarat
elektrokardiogram. Penapis Butterworth dan Bessel dua, empat dan lapan tingkat
dibandingkan dan didapati penapis Bessel tingkat lapan merupakan penapis yang
terbaik. Fasa seterusnya adalah implementasi teknik time-domain subtraction dalam
menyahkan hingar talian kuasa dengan kadar herotan yang minima. Teknik ini
dibandingkan dengan penapis takuk Twin-T dan keputusan menunjukkan teknik timedomain subtraction berjaya menapis hingar dengan keadaan yang hampir tiada
herotan. Algoritma pengukuran sela QT diuji akan keberkesanannya dengan
menggunakan
pangkalan
data
elektrokardiogram
Physikalisch-Technische
Bundesanstalt (PTB) Diagnostic yang mana menjadi tumpuan dalam pertandingan
International QT Interval Challenge 2006. Keputusan menunjukkan 28.53%
daripada isyarat elektrokardiogram tersebut berjaya ditentukan kedudukan Q dan T
dengan tepat. Ini adalah disebabkan morphologi isyarat elektrokardiogram yang
berlainan.
vii
TABLE OF CONTENTS
CHAPTER
TITLE
DECLARATION
ii
DEDICATION
iii
ACKNOWLEDGEMENTS
iv
ABSTRACT
v
ABSTRAK
vi
TABLE OF CONTENTS
vii
LIST OF TABLES
x
LIST OF FIGURES
xi
LIST OF SYMBOLS
xv
LIST OF ABBREVIATIONS
xvi
LIST OF APPENDICES
1
2
PAGE
xviii
INTRODUCTION
1
1.0
Introduction
1
1.1
Background of Research Problem
2
1.2
Objectives
3
1.3
Scopes
4
1.4
Thesis Organization
5
ELECTROCARDIOGRAM SIGNAL
7
CONDITIONING
2.0
Introduction
7
viii
2.1
The Sources and Representations of the ECG
2.2
Obtaining and Deriving the Standard Twelve ECG
8
10
Leads
3
2.3
ECG Circuits Review
15
2.4
ECG Systems
20
2.5
Performance Standards and Measures
24
POWER-LINE NOISE REMOVAL, AND QRS
27
ONSET AND T OFFSET POINTS DETECTION
3.0
Introduction
27
3.1
Power-Line Noise Removal in ECG
28
3.1.1
33
3.2
4
Power Line Noise Removal Summary
QRS Onset and T Offset Points Detection
34
TWELVE-LEAD ECG SYSTEM DESIGN
39
4.0
Introduction
39
4.1
The Twelve Channels Data Acquisition Unit
41
4.1.1
42
Analogue Multiplexer and Analogue-toDigital Converter
4.2
4.1.2 Universal Serial Bus PC Interface
45
4.1.3 The Data Acquisition Unit System Design
47
4.1.4 Firmware Programming and Data Formats
48
4.1.5 Acquiring USB Data in PC Software
51
Twelve-lead Analogue Electrocardiogram Signal
54
Conditioning System
4.2.1 Instrumentation Amplifier
54
4.2.2 DC Restore Circuit
56
4.2.3 Isolation Amplifier
57
4.2.4 Anti-aliasing Filter
58
ix
4.3
5
6
4.2.5 Wilson and Goldberger Resistor Network
62
4.2.6 Driven Right Leg Circuit
63
4.2.7 The Integration
64
4.2.8 Power-Line Noise Removal
67
4.2.8.1 Twin-T Analogue Notch Filter
67
4.2.8.2 Time Domain Subtraction
69
Validation of the QT Interval Algorithm
71
RESULTS, ANALYSIS AND DISCUSSIONS
73
5.0
Introduction
73
5.1
Mean Absolute Error and Mean Square Error
73
5.2
The Anti-aliasing Filter
74
5.3
The Power-line Noise Removal
76
5.4
Validation of the QT Points Detection
78
CONCLUSIONS
88
6.0
Introduction
88
6.1
Conclusions
89
6.2
Future Works
90
6.2.1
Low Power Analogue Front End (AFE)
91
6.2.2
ECG Morphology Detection Algorithm
91
6.2.3
QT Measurement Algorithm for Non-
92
Typical ECG
6.2.4
REFERENCES
Appendices A – D
Malaysian ECG Database
92
93
97–126
x
LIST OF TABLES
TABLE NO.
TITLE
PAGE
2.1
Technical Specifications of the PC-ECG Card, Hovenga
et. al. (1996)
20
2.2
ANSI-AAMI EC11-1991 Performance Requirements for
ECG
25
2.3
IEC Safety Standards for ECG Equipment IEC601-2-25
26
3.1
The PTB ECG Database Subjects According to the
Diagnostic Class
37
4.1
Different Low Pass Filter Configuration for the
Experiment
61
4.2
Various Clean Simulated Signals from 217A Patient
Simulator
62
4.3
List of R3 and R4 values for Varying Depth of Twin-T
Notch Filter
68
5.1
Averaged Mean Absolute Error for Anti-Aliasing Filter
Design
75
5.2
Averaged Mean Square Error for Anti-Aliasing Filter
Design
75
5.3
High Cut-Off Frequency Rejection in dB
75
5.4
MAE, MSE and Rejection (dB) of Notch Filter and TDS
77
5.5
Errors from the Q and T Detection Algorithm
79
5.6
Accuracy of Q and T Detection Algorithm
80
xi
LIST OF FIGURES
FIGURE NO.
TITLE
PAGE
2.1
Typical Electrocardiogram on a Strip Paper
8
2.2
Atrial Flutter
9
2.3
Atrial Fibrillation
9
2.4
Premature Ventricular Contraction
10
2.5
Right Bundle-Branch Block
10
2.6
Einthoven Limb Leads and Einthoven’s Triangle,
Malmivuo and Plonsey (1995)
11
2.7
The Electrocardiogram and Vectorcardiogram in the
Einthoven Limb Leads, Malmivuo and Plonsey (1995)
12
2.8
Wilson Central Terminal Representing Average of the
Limb potentials, Malmivuo and Plonsey (1995)
13
2.9
Circuit of the Goldberger Augmented Limb Leads,
Malmivuo and Plonsey (1995)
13
2.10
Precordial Chest Leads Electrodes Locations, Malmivuo
and Plonsey (1995)
14
2.11
Schematic of Single Supply Biopotential Amplifier,
Spinelli et. al. (2001)
17
2.12
AC-Coupled Front End for a Single Supply ECG
Amplifier, Spinelli et. al. (2003)
18
2.13
Automated Gain Adaption for Enhancing Interference
Rejection, Degen and Jackel (2004)
19
xii
2.14
Schematic Block Diagram of the PC-ECG Card, Hovenga
et. al. (1996)
21
2.15
Portable PC-based System with USB Interface, Zoric and
Ilic (2005)
22
2.16
Block Diagram of Analogue Front-End System for Neural
Signal, Obeid et. al. (2003)
23
2.17
Schematic of Analogue Signal Conditioning Circuit, Obeid
et. al. (2003)
23
2.18
IEC Symbols for Patient Safety. a) Body protected. Class
BF. b) Cardiac Protected. Class CF. Ability to withstand
defibrillation without damage
26
3.1
Capacitance Developed Allows Induction of Power Line
Frequency
28
3.2
Twin-T Notch Filter and its Frequency Response, Bai et.
al. (2003)
29
3.3
Average Error Rate versus R/2 Resistor Plot, Bai et. al.
(2003)
29
3.4
Magnitude response of a) FIR Notch Filter, b) FIR Comb
Filter and c) FIR Equiripple Filter, Bai et al (2004)
30
3.5
Distortion Caused by Notch Filter with filtered signal
shifted up for better separation, Hejjel (2003)
32
3.6
Power Line Filter Proposed by Ziarani et al (2002)
33
3.7
QRS onset and T Offset Detection. a) Zero Crossing
Between AR and BR Determine the R Peak Location. b)
The T Offset Threshold and the Search Window Base on
the Concurrent Average Heart Rate, Malarvili (2004)
36
4.1
Flowchart of Research Methodology
41
4.2
MPC506 Multiplexer Functional Block Diagram
43
4.3
ADS7806 Interface Diagram
44
4.4
ADS7806 Timing Diagram
45
xiii
4.5
DLP-USB245M Functional Block Diagram
47
4.6
Block Diagram of Developed Data Acquisition Unit
48
4.7
Flowchart for Programming of PIC16F84A-20/P
Microcontroller
49
4.8
Data Packet of 24 Bytes for Transfer to PC via USB
interface
49
4.9
Timing Distribution of Firmware Program
50
4.10
Time Setting to Achieve Equal Sampling Rate of 500
Samples per Second for each channel
51
4.11
Flowchart for Receiving Data Packet at the PC USB
Buffer
53
4.12
Internal Structure of Instrumentation Amplifier INA118
55
4.13
The Instrumentation Amplifier and the DC-Restore Circuit
57
4.14
Isolation Amplifier Block Diagram
58
4.15
FilterPro By Texas Instrument. (a) Butterworth Filter
Implementation (b) Bessel Filter with Flat Group Delay in
the Pass Band
60
4.16
Experiment Setup for Selection of Optimal Anti-Aliasing
Filter
61
4.17
Front-end Circuit Prior to the Signal Conditioning. a)
Buffer Amplifiers with Current Limiting Resistors. b)
Wilson and Goldberger Resistor Network
63
4.18
Driven Right Leg and Cable Shielding
64
4.19
Twelve-lead Electrocardiogram Front-end
65
4.20
The Electrocardiogram Signal Conditioning Core. (a) the
limb and augmented limb leads derived from the
Goldberger resistors network. (b) the pre-cordial leads
derived from the Wilson Central Terminal and the chest
electrodes
66
4.21
Twin-T Notch Filter Circuit
68
xiv
4.22
Experiment Setup for Study of the Effect of the Twin-T
Notch Filter
69
4.23
Experiment Setup for Time-Domain Subtraction Power
Line Removal Analysis
71
5.1
Typical ECG for Normal Subject from file 497
81
5.2
ECG for Normal Subject with Another form of Q wave.
File 337 with Q Error of 16ms
81
5.3
Accurate Detection of T Offset on file 491
82
5.4
83
5.5
Misdetection of T Offset on file 478 due to Threshold
Setting
ECG File 337 with Motion Artifact
84
5.6
ECG File 48 with MI with noise and different morphology
85
5.7
ECG File 1 with another different morphology
85
5.8
ECG File 86 of MI Patient with ‘Bad’ QRS Complex
86
xv
LIST OF SYMBOLS
V
-
Volt
A
-
Ampere
Hz
-
Hertz
dB
-
Decibel
V/V
-
Volt/Volt
s
-
second
τ
-
Time Constant
π
-
Pi
Ω
-
Ohm
ΦL
-
Left Arm Potential
ΦR
-
Right Arm Potential
ΦF
-
Left Foot Potential
F
-
Farad
xvi
LIST OF ABBREVIATIONS
AAMI
-
Association for the Advancement of Medical Instrumentation
AC
-
Alternating Current
ADC
-
Analogue to Digital Converter
AFE
-
Analog Front-End
AHA
-
American Heart Association
ANSI
-
American National Standards Institute
bps
-
Bit per second
CinC
-
Computers In Cardiology
CMRR
-
Common Mode Rejection Ratio
DC
-
Direct Current
DLL
-
Dynamic Link Library
DRL
-
Driven Right Leg
ECG
-
Electrocardiogram
EEG
-
Electroencephalogram
EMG
-
Electromyogram
EMI
-
Electromagnetic Interference
EOG
-
Electrooculogram
FIR
-
Finite Impulse Response
GUI
-
Graphical User Interface
xvii
HRV
-
Heart Rate Variability
HUKM
-
Hospital Kebangsaan Malaysia
IC
-
Integrated Chip
IEC
-
International Electrotechnical Commission
LSB
-
Least Significant Bit
MAE
-
Mean Absolute Error
MI
-
Myocardium Infarction
MIT-BIH
-
Massachusetts Institute of Technology and Beth Israel Hospital
MSE
-
Mean Square Error
PC
-
Personal Computer
PCB
-
Printed Circuit Board
QTc
-
QT Corrected
QTd
-
QT Dispersion
TDS
-
Time Domain Subtraction
USB
-
Universal Serial Bus
WCT
-
Wilson Central Terminal
xviii
LIST OF APPENDICES
APPENDIX
TITLE
PAGE
A
Schematic/Pin Assignments Of USB Data Acquisition
Unit And Source Code
97
B
ADS7806 and DLP-USB245M Timing Diagram
102
C
Complete Listing of Q and T Points Detection Errors
111
D
Conference Paper
119
CHAPTER 1
INTRODUCTION
1.0
Introduction
Electrocardiogram (ECG) is a popular non-invasive method of accessing the
electrical activity of the heart. It is recorded from body surfaces particularly at the
limbs and chest of a subject. Numerous arrhythmias can be studied and identified by
means of interpreting the ECG. By interpreting the ECG, cardiologists are able to
examine the electrical cycle of the heart and therefore they are able to understand the
condition of the heart. The Myocardium Infarction (MI) or commonly known as the
“heart attack” is one of the fatal cardiac arrhythmias at which the cardiologists are
putting their attention to.
Recently, research has shown that MI has close relations with the QT
dispersion index. Even though the QT dispersion has been identified as not being
able to relate to the MI a few years ago due to unreliable and imprecise manual T
offset detection, the measurement has been brought back with a new breathe using
the digital computer system which measurements are repetitive and reliable.
Therefore, an algorithm needs to be develop where it detects the Q onset and T offset
2
with validation from the cardiologists and in which the deviation between automated
and manual measurement is minimized.
1.1
Background of Research Problem
Currently, cardiologists particularly in Hospital Universiti Kebangsaan
Malaysia (HUKM) are manually measuring the QT intervals of patients from strip
paper recorded by ECG machines. It is from the twelve QT intervals from twelve
ECG leads that the cardiologists derived the QT dispersion index. Since QT has the
potential to indicate or predict upcoming MI event in a patient, it is almost
impractical for the cardiologists to do manual measurement of the QT intervals of a
large number of patients repetitively from time to time.
Therefore, there is a need for a device that monitors continuously the QT
dispersion reliably in order to look out for the Myocardial Infarction. Various
algorithms can be implemented ranging from simple R peak detection to complex
artificial intelligence in diagnosing cardiac disorders from the ECG. In order to
develop a system, an annotated database is crucial as a reference for the algorithm in
development which will later serve to automatically detect the P, Q, R, S, T points
and other important parameters as well as aiding the cardiologists in determining the
cardiac disorders within a short period as compared with doing it manually.
ECG databases can be obtained free from online sources such as Physionet or
can be bought at an extremely high cost. However, the databases are collected from
and represent the cardiac disorders of patients from the sourcing country. Therefore
this does not fit well in systems where they will be implemented locally. A
Malaysian annotated ECG database shared amongst local biomedical system
3
developers will be of great assistance in gearing Malaysia towards achieving a status
of becoming a competitive nation in the field of biomedical engineering.
A challenge that must be confronted in developing an ECG database is that
the data collected must be reliable. The data collected must represent the actual
electrical activity in the heart with minimal noise and distortion from the data
collecting device. Factors introducing noise are the surrounding power line noise,
electro magnetic interference from nearby devices, and also from the patients such as
the baseline wander and the motion artifacts. Noises from the patients can be
overcome by educating the patient and by clinically preparing the skin and electrodes
prior to recording. Noises, especially the power line noise, need to be removed
electronically using analogue filters and amplifiers. The filters and amplifiers have to
be carefully designed and selected as they could introduce distortions to the signal of
interest.
A data acquisition unit is essential when an effort to develop a database is
taken into commitment. It is necessary to design a data acquisition unit is so as to
achieve a low cost data collection system that can be distributed to all the local
hospitals and clinics. The developed data acquisition unit will allow unlimited access
in terms of customizations, modifications, and applications. The developed data
acquisition PC software which usually pairs up with the data acquisition device will
also allow unlimited integration of ECG parameters detection and diagnose
algorithms into the system.
1.2
Objectives
In order to solve the research problems, the following objectives are
identified as follows:-
4
1. To develop a PC-based data acquisition unit to be used as a platform to
develop the ECG database.
2. To design and develop an analogue signal conditioning circuit. This is the
interface between the patient and the data acquisition unit.
3. To compare the level of signal distortion in ECG signals when applying
low pass filters designed using the Filter Pro software (Texas
Instruments)
4. To compare the performance of the analogue notch filter and the digital
power line noise removal filter.
5. To integrate the QT dispersion indexing software (Malarvili, 2004) into
the developed data acquisition software.
6. To evaluate the QRS onset and T offset detection algorithm using the
annotated PTB Diagnostic ECG database
At the end of this research, a platform for the development of ECG system
with regard to designing portable ECG devices and algorithms for automatic cardiac
diagnosis is made available for future research works. This will also make ready a
system for developing a local ECG database.
1.3
Scopes
In order to achieve the above outlines, this research is carried out as follows
1. The data acquisition device is developed using the PIC16F84A assembly
language and the sampling is time division multiplexed.
2. The PC software for the data acquisition device is developed using
Microsoft Visual C++ 6.0 platform and function to preview, record and
playback. Display of the signal during preview and record is shown in
real-time scrolling state.
5
3. The developed signal conditioning circuit for interfacing to the patients is
limited to allow only recording of the diagnostic ECG and consist of
twelve ECG leads.
4. The low-pass filter for anti-aliasing purposes is designed using the
FilterPro software made available by Texas Instrument Inc. The filter
characteristics are designed around the Sallen-Key configuration.
5. The comparison of the performance of low-pass filters utilizes simulated
ECG signals for persistency.
6. The QRS onset and T offset detection technique implemented in the data
acquisition software and evaluated using the PTB Diagnostic ECG
database applies the algorithm developed previously (Malarvili, 2004).
1.4
Thesis Organization
This thesis is organized into six chapters. The current chapter describes the
introduction of this research, the overview of the research background and problems
as well as the objectives and scopes of this research.
The second chapter brings the reader into the literature review in the field of
ECG and the research works done regarding the data acquisition system, and the
signal conditioning circuits design for acquiring a reliable ECG signals.
Chapter 3 highlights the research works on the ECG focusing on digital
signal processing in removing power-line noise and algorithms in detecting the P, Q,
R, S and T waves and peaks in the signal.
In chapter 4, the methodology of the research is discussed in detail. This
includes the design of the data acquisition unit, the ECG signal conditioning system,
6
the experiments carried out in order to determine an optimal ECG system, and the
validation of the QRS onset and T offset detection algorithm on the annotated PTB
Diagnostic ECG database.
The fifth chapter presents the results of the experiments carried out in chapter
four and the analyses are brought into discussion. Base on these results, an optimal
twelve-lead ECG system is designed.
Chapter 6, the conclusion, summarizes the research works done for this thesis
and put forward suggestions for future works in the development of the automated
ECG diagnosis system.
CHAPTER 2
ELECTROCARDIOGRAM SIGNAL CONDITIONING
2.0
Introduction
The beating heart generates electrical signals and these signals can be used as
diagnostic tool for examining conductivity functions and abnormalities of the heart.
The electric potentials generated by the heart appear throughout the body and on its
surface. The electrocardiogram (ECG) is a method of recording the electrical signals
of the heart graphically by means of an electrocardiograph. The ECG has been a
common method of accessing the electrical conductions of the heart for decades.
Various cardiac disorders can be determined from the ECG with relations to its
conductivity problems.
This chapter introduces the source and mechanics of the ECG signals from
the heart and the various cardiac disorders related. Common method of deriving the
standard ECG leads, the challenges in obtaining these signals and the solutions are
also described. This chapter focuses on the review of the analogue circuits and
systems in obtaining a reliable and undistorted ECG signals.
8
2.1
The Sources and the Representations of the ECG
The waveform of the electrocardiogram is the result of depolarization and
repolarization signals of the heart. The deflections of this signal are denoted as P, Q,
R, S, T and U as depicted in figure 2.1. The P wave represents atrial depolarization,
the QRS complex is caused by the ventricular depolarization, and the T wave
corresponds to the repolarization. Atrial repolarization takes place during the QRS
complex but it cannot be seen as the amplitude is too small (Malmivuo and Plonsey,
1995).
Figure 2.1: Typical Electrocardiogram on a Strip Paper
The main applications of the ECG in heart disease diagnosis consist of
identifying arrhythmias, disorders in activation sequence, increased wall thickness or
size of atria and ventricles, drug effects and others related. Different conditions yield
different ECG morphologies. Figure 2.1 shows a typical ECG signal for a normal and
healthy subject. However, other conditions project different signals as shown in the
figure 2.2 to 2.5. Figure 2.2 shows a condition of atrial flutter. This happens when
the heart rate is sufficiently elevated so that the isoelectric interval between the end
of T and beginning of P disappears. Figure 2.3 shows atrial fibrillation which can be
9
caused by rheumatic disease, atherosclerotic disease, hyperthyroidism, and
pericarditis. It may also occur in healthy subjects as a result of a strong sympathetic
activation (Malmivuo and Plonsey, 1995).
Figure 2.2: Atrial Flutter
Figure 2.3: Atrial Fibrillation
A premature ventricular contraction is one that occurs abnormally early. Such
signal for premature ventricular contraction is illustrated in figure 2.4. In another
case, the right bundle-branch block is when the electrical impulse cannot travel
through the right bundle-branch to the right ventricle. Among the signal properties of
the right bundle-branch block is a broad S wave in lead I and the double R-wave,
known as RSR’ complex as in figure 2.5 (Malmivuo and Plonsey, 1995).
10
Figure 2.4: Premature Ventricular Contraction
Figure 2.5: Right Bundle-Branch Block
2.2
Obtaining and Deriving the Standard Twelve ECG Leads
In biopotential recordings for the ECG, the currents carried by ions in the
tissue are transformed into electrical currents by electrochemical reactions taking
place in surface electrodes (Hovenga et. al., 1996). The potential differences can be
determined by placing electrodes on the surface of the body and measuring voltage
between them, being careful to draw very little current or ideally no current at all
(Webster, 1998).
The Einthoven’s lead system has been the standard electrocardiogram
measuring system since it was introduced back in the 1908 by Willem Einthoven
(Malmivuo and Plonsey, 1995). The Einthoven lead system is illustrated in figure
2.6.
11
The Einthoven limb leads, which are the standard leads till today, are
characterized as follows:Lead I:
V1 = ΦL – ΦR,
Lead II:
V2 = ΦF – ΦR,
Lead III:
V3 = ΦF – ΦL,
where,
VI = the voltage of Lead I,
VII = the voltage of Lead II,
VIII = the voltage of Lead III,
ΦL = potential of the left arm (L),
ΦR = potential of the right arm (R),
ΦF = potential of the left leg (F).
Figure 2.6: Einthoven Limb Leads and Einthoven’s Triangle, Malmivuo and Plonsey
(1995)
Figure 2.7 illustrates the electrocardiogram signal waveform generated in the
Einthoven limb leads. These three limb leads altogether are consisted in the frontal
plane if the twelve-lead electrocardiogram system is projected in three orthogonal
planes.
12
Figure 2.7: The Electrocardiogram and Vectorcardiogram in the Einthoven Limb
Leads, Malmivuo and Plonsey (1995)
Three additional limb leads known as the Goldberger augmented limb leads
are obtained by measuring potential between each limb electrode and the Wilson
Central Terminal. The Wilson Central Terminal is a reference or average of the limb
potentials. As shown in figure 2.8 the Wilson Central Terminal is formed by
connecting a 5 kΩ resistor from each terminal of the limb leads to a common point.
The augmented limb leads are then obtained as depicted in figure 2.9. The
augmented limb leads aVR, aVL and aVF can also be represented as follows.
aVR = ΦR - (ΦL + ΦF)/2
aVL = ΦL - (ΦR + ΦF)/2
aVF = ΦF - (ΦL + ΦR)/2
13
Figure 2.8: Wilson Central Terminal Representing Average of the Limb Potentials,
Malmivuo and Plonsey (1995)
Figure 2.9: Circuit of the Goldberger Augmented Limb Leads, Malmivuo and
Plonsey (1995) (Malmivuo and Plonsey, 1995)
Apart from the six limb leads which have been described, the precordial chest
leads are introduced to measure the potentials close to the heart. Leads V1 through to
14
V6 are located mainly in the left chest. Leads V1 and V2 are located at the fourth
intercostals space on the right and the left side or the sternum. V4 is located in the
fifth intercostals space at the midclavicular line whereas V3 is located between V2
and V4. On the other hand, V5 is located as the same horizontal level as V4 but on
the anterior axillary line. Finally V6 is at the same horizontal level as V4 but at the
midline. The precordial chest leads are obtained with the Wilson Central Terminal as
a reference. Figure 2.10 illustrates a better view of the precordial leads.
Figure 2.10: Precordial Chest Leads Electrodes Locations, Malmivuo and Plonsey
(1995)
15
2.3
ECG Circuits Review
Noises are always present in almost every analog system as well as digital
systems. These noises if not eliminated, can distort the shape of the signal of interest
in terms of its amplitude and frequency. Noises that are common in
electrocardiogram system include 50 Hz power-line noise, electromyography
interference, and baseline drifts. Being minute in amplitude, the electrocardiogram
signal cannot be distinguished along with these noises and therefore careful design
needs to be implemented in the twelve lead electrocardiogram designs. The
characteristics of the noises also need to be understood well so that they can be
eliminated without distorting the electrocardiogram signal itself while removing
them. The conditioning required for recorded ECG with surface electrodes, would
require amplification of approximately 1000 folds, elimination of unwanted noise
frequencies produced by respiration, or other skeletal muscle activity, and
cancellation of power line frequency noise (Hovenga et. al., 1996).
Daskalov et. al. (1997) examined the distortions of the low frequency of the
ECG as a result of high-pass filters. The origin source of the problem is to eliminate
baseline wander that is caused by the dc offset potential sourcing from the electrodes
due to motion and respiration of the patient which resides in the low frequency of the
ECG. Initial design of the ECG consists of an a.c. amplifier. A simple a.c. amplifier
can be constructed using a first-order RC circuit with time constants of 1.6 s, then 2.2
s and later 2.7s. The resolving time constant for the RC circuit is stated to be 3.2 s
and the cut-off frequency would be 0.05 Hz. The reason for increasing the time
constant is to reduce the signal shape distortions to an acceptable minimum
(Daskalov et. al., 1997). However, baseline fluctuations increase with the RC time
constant.
High-pass filters affect the ST segments of the ECG signal due to its low
frequency characteristic. Distorted ST segments may be diagnosed as ischemia and it
can be a false diagnosis. Therefore, Daskalov et. al. (1997) implemented a method of
16
backward filtering for correction of the low frequency distortion. This is done after
the ECG signal have been digitized. A triangular test waveform was applied to an
a.c. amplifier and restored using the backward filtering. The difference between both
signal does not exceed 5 µV. Daskalov et. al. (1996) concluded that backward
filtering restores the true signal waveform with a negligible error. The filter
implemented is as follows. τ is taken as 3.2 s.
Yn = A ( Xn – Xn-1) + B Yn-1
(2.1)
where,
A = (1 + tan (π FcT))-1,
B = (1 - tan (π FcT)) (1 + tan (π FcT))-1,
Fc = (2 π τ)-1 = cut-off frequency (Hz),
T = sampling period (s),
τ = time constant (s)
Spinelli et. al (2001) proposed a single supply biopotential amplifier. It is
dedicated for battery powered applications which require a single battery and instead
of using switched voltage inverters for dual-supply system. The proposed system
consists of two full differential stages and a difference amplifier. The system has a
total gain of 1000, a DC differential input range of ±200 mV, and a low cut-off
frequency of 0.05 Hz. Figure 2.11 illustrates the stages of the single supply
biopotential amplifier. The first stage is the DC full differential amplifier with a
limited gain of 10 due to the electrode offset voltages which can saturate the
amplifier. Common mode input voltage from the averaging resistors is compared to
Vref and fed back to the patient body (E3) on the right leg. Ro functions to limit the
right-leg drive to an output current of 10 µA for patient safety.
The second and third stage is the AC full differential amplifier with a gain of
100 and RC time constant of 3.2 s. Included in the third stage is a DC restoring
circuit which rejects offset voltages from the previous stages (Spinelli et. al., 2001).
17
Figure 2.11: Schematic of Single Supply Biopotential Amplifier, Spinelli et. al.
(2001)
Spinelli et. al. (2003) further proposed an ac-coupled front-end for
biopotential measurements. The proposed circuit eliminates the front end DC
differential amplifier which gain is limited in order to prevent amplifier saturation.
The purpose of the design is to provide high front-end gain and therefore requires a.c.
input coupling. However, simple grounded RC circuit degrades the common mode
rejection ratio (CMRR) of the biopotential amplifier. Therefore the authors proposed
a novel balanced input ac-coupling network that provides a bias path without any
connection to ground resulting in a high CMRR of 123 dB. This enables high frontend gain biopotential amplifier with reduced number of parts and results in low
power consumption. The proposed front-end ac-coupling forming an ECG amplifier
is shown in figure 2.12. A Sallen key configuration low pass filter with cut-off of 160
Hz is implemented at the output of the differential amplifier. This circuit best suites a
battery-operated ECG system with minimal component requirements.
18
Figure 2.12: AC-Coupled Front-End for a Single Supply ECG Amplifier, Spinelli et.
al. (2003)
Degen and Jackel (2004) solves power-line noise induction and interference
via the use of amplified electrodes. Optimal common-mode rejection (CMR) is
achieved through adjusting the matching resistors in the differential amplifier. In an
instrumentation amplifier such as the INA118, the built-in resistors are laser-trimmed
in order to achieve high CMR. However, the common mode signal, that is the powerline noise, remains in the ECG signal due to the effects of the resistor tolerances.
Figure 2.13 depicts the proposed ECG system. Through this system, the variable
resistor R8 is adjusted automatically via the digital-to analog converter in
conjunction with the common mode signal that lies within the patient. The value of
the variable resistor, R8, is determined by measuring the phase shift of the common
mode signal fed in at one point and measured at another point in the system. The
variable resistor is regulated automatically until the CMR is maximized. The
achieved 50 Hz power-line noise reduction is claimed to be -23 dB and most
importantly, the ECG signal is not altered using this technique.
19
Figure 2.13: Automated Gain Adaption for Enhancing Interference Rejection, Degen
and Jackel (2004)
Hejjel and Kellenyi (2005) presents a study of the effect of different
characteristics analogue filters on the ECG signal. The study was focused on the
effect of the analogue filter to heart rate variability or in other words, the QRS
complex. Different high-pass and low-pass cut-off frequencies are implemented to an
ECG simulator. The R-R intervals were measured at seven reference points in the
QRS complex before and after filtering. Results shows that Bessel filters are superior
as compared to the Butterworth filter but a higher order Bessel filter is essential to
compensate for its low roll-off characteristics.
20
2.4
ECG Systems
A PC-based clinical instrumentation named PC-ECG is presented by
Hovenga et. al. (1996). The PC-ECG single card which fits into the ISA slot of the
PC claims that it satisfies all the international standards for performance and safety
and integrates Graphical User Interface GUI) and database for data collection. Table
2.1 and figure 2.14 show the specifications and the schematic block diagram of the
PC-ECG card respectively.
Table 2.1: Technical Specifications of the PC-ECG Card, Hovenga et. al. (1996)
21
Figure 2.14: Schematic Block Diagram of the PC-ECG Card, Hovenga et. al. (1996)
From figure 2.14, the total gain of the PC-ECG card ranges from 500 to 2500
V/V. The digital data and control line of this system is optically isolated while
transformer or galvanic isolation is used for its power. Analogue high pass filter with
selectable cut-off at 0.05 and 0.5 Hz is controlled via PC. The applied analogue
Bessel low pass filter for anti-aliasing is also software controlled for 40, 100 and 300
Hz. The 12-bit analogue to digital conversion has a resolution of 2.44 mV. (Hovenga
et. al., 1996)
Zoric and Ilic (2005) brought forward a modern PC-based system for ECG
where instead of using the internal card slots of the PC for data transfers, the authors
utilize the Universal Serial Bus (USB) for communication interface. The block
diagram of the developed system is illustrated in figure 2.15. The software of the
system provides sequential recording of twelve channels with a recording period of
six seconds per channel. It is powered by the USB with galvanic isolation and the
data lines are isolated using fast opto-couplers. The data communication interface is
a USB to serial RS232 converter in which its data transfer rate is much higher that
conventional serial RS232 communication port. This system however does not allow
simultaneous recording of all the twelve ECG leads thereby not enabling ECG
diagnosis where concurrent recording of the signals are required.
22
Figure 2.15: Portable PC-based System with USB Interface, Zoric and Ilic (2005)
Obeid et. al. (2003) developed multi-channel analogue front-end biopotential
system for portable neural signal recording. The system block diagram is as shown in
figure 2.16. The system mainly consists of analogue conditioning circuits, analogue
multiplexers and an analogue-to-digital converter (ADC). Each repeated analogue
conditioning circuit consists of a pre-amplifier, differential amplifier, high-pass and
low-pass Sallen-Key filter and a variable gain. 4th order low-pass Bessel filters are
implemented to avoid signal distortion. This is depicted in figure 2.17. Even though
the design is for neural signals, its concept for analogue signal condition is the same
for other bio-potential amplifiers such the ECG, EMG, EOG and others. The
differences between the various applications are the frequency bandwidth and signal
gain. The developed system can be interface to any digital system such as
microprocessor, digital signal processor and PC systems through USB interface.
23
Figure 2.16: Block Diagram of Analogue Front-end System for Neural Signal, Obeid
et. al. (2003)
Figure 2.17: Schematic of Analogue Signal Conditioning Circuit, Obeid et. al. (2003)
Segura
et.
al
(2004)
designed
a
microcontroller-based
portable
electrocardiogram recorder. The recorder being able to capture 24 hours data is
sampled at 250 Hz and 12-bit resolution. It is able to record three lead ECG and
utilizes ac coupling technique as proposed by Spinelli et. al. (2003). The
instrumentation amplifier is the low power INA118 manufactured by Texas
Instruments. The anti-aliasing filter is a second order Bessel low-pass filter with cutoff of 160 Hz for pediatric purposes.
24
Desel et. al. (1996) introduced a CMOS nine channel ECG measurement IC
which reduces the standard ECG analogue conditioning circuits into a single chip to
enable portability. The anti-aliasing filter implemented is an 8th order Bessel lowpass switch capacitor ladder filter. A 13-bit ADC is included to ease interface to
digital systems consisting of microprocessors.
Ng and Chan (2005) following the work of Desel et. al. (1996), developed an
improved version whereby the single chip can also be used for EEG. This is achieved
by providing digital configuration interface in the system. However, the output of the
system is 8-channel multiplexed analogue enabling the end user to select the ADC of
their choice. The anti-aliasing filter used is a 2nd order low-pass filter with multiplefeedback configuration.
2.5
Performance Standards and Measures
In order to standardize the empirical interpretation of ECG or the comparison
of a result with statistically normal values, biomedical equipments from various
manufacturers are required to adhere to minimum performance specifications. Such
standards for biomedical equipments are set by the American Heart Association
(AHA), the Association for the Advancement of Medical Instrumentation (AAMI),
the American National Standards Institute (ANSI), and the International
Electrotechnical Commission (IEC) (Hovenga et. al., 1996). Table 2.2 summarizes
the performance standards of the AAMI/ANSI for ECG.
25
Table 2.2: ANSI-AAMI EC11-1991 Performance Requirements for ECG
Standards for patient safety are also essential so as to avoid fatal accidents
when they are connected to biomedical devices. Common safety measures for ECG
are patient and earth leakage currents, enclosure leakage current and patient isolation.
The main components of the standard defined by IEC601-2-25 (1993) are listed in
table 2.3. Figure 2.18 shows the two examples of classification of biomedical
equipment with regard to patient safety.
26
Table 2.3: IEC Safety Standards for ECG Equipment IEC601-2-25
Figure 2.18: IEC Symbols for Patient Safety. a) Body protected. Class BF. b) Cardiac
Protected. Class CF. Ability to withstand defibrillation without damage
CHAPTER 3
POWERLINE NOISE REMOVAL, AND QRS ONSET AND T OFFSET
POINTS DETECTION
3.0
Introduction
PC-based systems for virtual instrumentation are becoming more and more
popular in the field of engineering including the application of biomedical
instrumentation. With this, the central role in the virtual instrument is mostly played
by the software. Therefore the costs of development, maintenance and
reconfiguration of these PC-based systems are reduced significantly (Ferrero, 1990).
Techniques, algorithms, mathematical manipulation of data, digital signal processing
and artificial intelligence for the purpose of feature extraction, classification and
much more can be developed, modified and improved from time to time.
This chapter reviews the common power-line notch filter and the algorithms
for digital power line noise removal. Moreover, the algorithms for detections of the
QRS onset and T offset points, and the ECG database are also included in this
chapter.
28
3.1
Power Line Noise Removal in ECG
Among the main contributors of noise in ECG systems is the power line
interference. Surprisingly, the power line noise does not mainly come from the power
supply of the ECG system but instead comes from the power cables surrounding the
patient (Carr and Brown, 2001). The surrounding air and the patient act as a capacitor
between the 240 volts power line cables and the earth. The AC characteristic of the
power line cables causes the power line frequency, 50 Hz for our local power system,
to be induced into the patient. Figure 3.1 illustrates this phenomenon better.
Figure 3.1: Capacitance Developed Allows Induction of Power Line Frequency
The power line frequency noise adds a 50 Hz frequency component into the
ECG signal thereby corrupting the signal making it impossible for diagnosis. In
addition to that the power line noise resides in the pass band of the ECG signal,
making it much more complicated for removal.
The twin-T notch analogue filter has been implemented by Bai et. al. (2003)
for a remote ECG system. It is addressed that they need a very sharp band-rejection
or notch filter to suppress the power line noise. This indicates clearly that the
29
intention is to filter no other than the parasitic power line frequency. Figure 3.2
depicts the twin-T notch filter along with the frequency response.
Figure 3.2: Twin-T Notch Filter and its Frequency Response, Bai et. al. (2003)
Considering avoiding drift of the notch frequency, the authors use resistors
and capacitors of high accuracy along with variable resistors to fine tune the
suppression frequency in order to reduce the error rate of the filter. Figure 3.3 plots
the average error rate of the power line noise filter against the adjustable R/2 resistor.
Figure 3.3: Average Error Rate versus R/2 Resistor Plot, Bai et. al. (2003)
Bai et. al. (2004) compared three digital power line filters which are the notch
filter with a pole/zero canceling method, the comb filter with a pole/zero canceling
method, and the equiripple notch filter implementing Parks-McClellan algorithm.
30
These are finite impulse response digital filter with a linear phase so as to achieve
power line noise filtering without introducing phase distortion. The authors compare
these filters using the mean square error (MSE) and use the same measure to
compare various filter orders within each filter type to obtain the one with the best
performance. Figure 3.4 shows the implemented filters frequency response. The
performance of the filters is evaluated using a simulated ECG signal and the same
signal with 60 Hz frequency component added. At the end of the study, Bai et al
(2004) claimed that the FIR equiripple filter best eliminates the power line noise with
minimal ECG signal distortion. However it is highlighted that the computation
requirement is high as the filter order is 52.
(a)
(b)
Figure 3.4: Magnitude response of a) FIR Notch Filter, b) FIR Comb Filter and c)
FIR Equiripple Filter, Bai et al (2004)
31
(c)
Figure 3.4: Magnitude response of a) FIR Notch Filter, b) FIR Comb Filter and c)
FIR Equiripple Filter, Bai et al (2004) (continued)
Hejjel (2003) investigates the effects of analogue notch filtering on the RR
interval of the ECG for heart rate variability (HRV) analysis. The notch filter applied
was built using the UAF42 universal active filter configured for 50 Hz band
rejection. The notch filter was tested on artificial ECG records with specifications
recommended by the Association for the Advancement of Medical Instrumentation
(AAMI). The means, the standard deviations and the maxima of the seven points on
the QRS complex were calculated for both the original and filtered ECG signal.
Hejjel (2003) concluded that the notch filter does not affect the RR interval of the
ECG signal by more than 1 ms. Even though, the filter has effect on the descending
slope of the QRS complex caused by the phase shift of the notch filter. Figure 3.5
shows the distortion of the ECG signal caused by the phase shift.
32
Figure 3.5: Distortion Caused by Notch Filter with Filtered Signal Shifted Up for
Better Separation, Hejjel (2003)
Ziarani et. al. (2002) proposed a different method of the elimination of the
power line noise. The author focuses in solving the varying power line frequency that
exists in the ECG signal. This is because the power line frequency can vary about
fractions of a Hertz or even to a few Hertz in some countries. A sharp notch filter
may be inoperative if variations in the frequency of the power line occur. On the
other hand, if the rejection band is widened in order to deal with the power line
frequency variation, the notch filter will distort the signal itself (Ziarani et. al., 2002).
In the nonlinear adaptive method proposed by Ziarani et. al. (2002), the
power line signal is extracted and subtracted from the ECG signal to produce a clean
ECG signal. The technique implements a notch filter which extracts one specific
sinusoidal component in the ECG signal and rejects all other frequency components
including noise. This method is adaptive in way that it accommodates variations of
the power line frequency over time. The center frequency of the notch filter for
extraction is specified by the initial condition of the frequency. The technique is
tested on a clean ECG signal from the MIT-BIH database added with a 60 Hz
frequency component. The resulting adaptive power line filter by Ziarani et. al.
(2002) is able to closely follow the frequency variations of the interference and
eliminates the superimposed EMI effectively. Figure 3.6 shows the block diagram of
the proposed power line filter.
33
Figure 3.6: Power Line Filter Proposed by Ziarani et al (2002)
Bazhyna et. al. (2003) compared four power line interference removal
techniques for high resolution ECG. These techniques were compared using mean
squared error and the mean absolute error. The four techniques put into comparison
by the authors are notch filters, spectral interpolation, modified time-domain
subtraction and regression subtraction. According to the authors, these four power
line technique are among the most well-known methods for this purpose. These
methods were compared using the mean square error (MSE) and the mean absolute
error (MAE) for their performance estimation. Bazhyna et. al. (2003) concluded that
the best performance filter with minimal MSE and the MAE is the regression
subtraction method followed by the time-domain subtraction. The spectral
interpolation method does introduce smaller distortions than that of notch filters but
the distortions are still obviously high. Even though the regression subtraction shows
the best result, however, the time domain subtraction method provides low
computational complexity.
3.1.1
Power Line Noise Removal Summary
The application of notch filters whether analogue or digital has been shown to
introduce ECG signal distortion. The cause could be that of the non-linear phase of
34
the filter or the removal of part of the ECG signal which resides in the power line
frequency itself. The notch filters are, however, suitable for non-diagnostic ECG
purposes such as the heart rate variability (HRV) analysis.
Even though power line subtraction has been introduced about two decades
ago, new techniques have been introduced without the need for hardware power line
frequency extraction. Various software power line frequency extraction techniques
from the ECG signal have been introduced. Among others, the time-domain
subtraction technique consumes low computational costs. Therefore, the time-domain
subtraction technique is adapted and studied in this thesis for real-time
implementation for removal of power line noise for the twelve-lead ECG system
which is also developed in this work. Further description of the time-domain
subtraction technique can be found in the following chapter.
3.2
QRS Onset and T Offset Points Detection
An important parameter measurement of the ECG for the prediction of the
Myocardial Infarction (MI) of the sudden cardiac death is the QT dispersion. QT
dispersion is the difference between the maximum QT interval in any of the leads
and the minimum QT interval in any of the other ECG leads. The QT dispersion
represents the repolarization activity of the heart (Alberti et. al., 1991) which may be
one of symptoms of the sudden cardiac death. Therefore, the measurement of the QT
interval is the basis for the measurement of the QT dispersion parameter.
Laguna et al, 1990, proposed a method using only the first derivative and low
pass filtering of the ECG signal. The zero crossing point between two neighboring
peaks greater than a predefined threshold determines the R peak of the ECG signal.
From the detected R point, the Q peak is then searched starting from the preceding
zero-crossing point. From the Q peak, the QRS onset point is determined by
35
searching back again until a threshold derived from the Q peak amplitude is reached.
The search for the QRS onset is done on the first derivative signal since the QRS
onset consists of high frequencies components truncated from the low pass filter.
The search for the T offset point starts by defining a search window which
depends on the current average heart rate of the ECG. The T peak is searched within
the window by means of the zero crossing points of the first derivative and low pass
signal. Four criteria of T waves are applied in search of the T offset point. These
criteria are the upward only, downward only, upward-downward and downwardupward. Based on these four criteria, the T offset point is searched forward from the
T peak and delimited by a threshold value derived from the T peak amplitude. Figure
3.7 illustrates the processed signal, the threshold and the windows for QRS onset and
T offset point detection.
Among others, this technique by Laguna et al (1990) has been quoted as the
method closest to the results obtained visually by cardiologists (Moraes and Viana,
1997). Therefore this has become the reason as to why Malarvili (2004), adapted this
technique in developing the QT dispersion indexing software. A software for
measuring the QT intervals of all twelve ECG leads, automatically, which then
calculates the QT dispersion (QTd) of a subject, has been built. With a collected
ECG database of 53 normal subjects and patients, only 36 normal subjects and
patients have computable QT intervals. For these computable data, the software
yields QTd value of 37.28±11.13ms for normal subjects and 66.17ms±13.95ms for
patients with MI. The sensitivity of discriminating the QTd between normal subjects
and MI patients is reported to be 88.89%.
However, in the work carried out, Malarvili (2004) did not validate the
algorithm on any annotated database or compare the automatic measurement, done
by the software developed, with manual measurements of the database acquired from
Hospital Kebangsaan Universiti Malaysia (HUKM) and therefore suggests, towards
the end of the report, for further work to be carried out to validate the software on
36
standard database such as the MIT-BIH and CSE ECG database. Even though
Laguna et al (1990) validated the proposed algorithm and claim 10 ~ 15 ms of
standard deviation between manual and the automatic measurement proposed, the
validation is done on their own sets of database which were annotated by two
specialists. It was concluded that the proposed technique is comparable to that of
manual measurement.
( )
200
100
Amplitude
-100
T
T
S
0
Q
Q
S
Q
-200
-300
-400
-500
R
1300
R
1400
1500
1600
1700
1800
sample
1900
2000
2100
2200
f(k)
150
AR
AR
Amplitude
100
TRi (Li) = 0.6 PKi
50
0
-50
TRi (Li) = - 0.6 PKi
-100
BR
-150
1300
BR
1400
1500
1600
1700
sample
BR
1800
1900
2000
2100
2200
(a)
ECG(k)
Amplitude
400
200
T offset
0
-200
1500
1600
1700
1800
1900
2000
2100
sample
2200
2300
2400
2500
f(k)
ewind
Amplitude
0.5
bwind
0
Ti min
-0.5
threshold=0.1f(Ti) to 0.3f(Ti)
R-R
-1
1600
1700
1800
1900
2000
2100
2200
2300
2400
2500
(b)
Figure 3.7: QRS onset and T Offset Detection. a) Zero Crossing Between AR and
BR Determine the R Peak Location. b) The T Offset Threshold and the Search
Window Base on the Concurrent Average Heart Rate, Malarvili (2004)
37
Recently, PhysioNet along with the Computers in Cardiology (CinC) has
come up with a yearly challenge for the annual Computers in Cardiology Conference
in 2006. The new challenge is brought up due to the endorsement of a set of
guidelines for clinical evaluation of the QT/QTc interval prolongation and
proarrhythmic potential for non-antiarrhythmic drugs in May 2005. In the guidelines,
it reflects that the regulatory agencies worldwide are moving towards thorough
QT/QTc studies as part of clinical trials for all newly developed drugs. In addition to
that, the guidelines endorse manual QT interval measurement for these studies and at
the same time cite the need for further research before the use of fully automated
methods can be accepted in this studies. Thus the challenge for the year 2006 is
addressed as “Can the QT interval be measured by fully automated methods with
accuracy acceptable for clinical evaluations?” (Christov et al, 2006).
The QT interval challenges its participant to measure the QT intervals of the
PTB Diagnostic ECG Database manually, automatically, or semi-automatically. This
database, which can be obtained from PhysioNet’s website, consists of 549 ECG
recordings of fifteen-lead signals. The recordings were from 249 subjects categorized
according to their diagnostic class as shown in table 3.1.
Table 3.1: The PTB ECG Database Subjects According to the Diagnostic Class
Diagnostic Class
Number of Subjects
Myocardial Infarction
148
Cardiomyopathy /Heart Failure
18
Bundle Branch Block
15
Dysrhythmia
14
Myocardial Hypertrophy
7
Valvular Heart Disease
6
Myocarditis
4
Miscellaneous
5
Healthy Control
54
38
As a sequel to the QT Interval Challenge, Christov et al (2006) have prepared
a set of manually measured QT intervals for the PTB Diagnostic ECG Database. The
database was given to four cardiologists and a biomedical engineer for manual
marking or the QRS onsets and T wave ends. For each recording, only a beat in lead
II is selected, following the Challenge 2006 recommendations, for manual annotation
and the selection is done on beats with minimum baseline shift, noise and artifact.
The manual measurements were made in three rounds so as to obtain results closer to
the median. The mean and standard deviation of the difference between the values of
the referees and the median after the final round were 2.43 ± 0.96 ms for the QRS
onset and 7.43 ± 3.44 ms for the T offset.
Therefore, this research validates the QT interval measuring system
developed by Malarvili (2004) on the PTB Diagnostic ECG Database along with the
datasets of manual annotations of the QRS onsets and T offsets as provided by
Christov et al (2006).
CHAPTER 4
12-LEAD ECG SYSTEM DESIGN
4.0
Introduction
The main objective of this research project is to develop an automated
electrocardiogram system for parameters measurement and cardiac disorder
interpretation. Towards this aim, Malarvili (2004) has developed a software which
enables cardiologists to measure QT dispersion in twelve leads electrocardiogram
which was done manually previously due to the limitations of the current ECG
machines in the market as mentioned in chapter 1. However, the development of the
software itself is still dependant, for data acquisition, on the PC-ECG ISA card
manufactured by Medcare Systems Inc., Australia. Nevertheless, the output data file
from the PC-ECG recording software has to be opened as a Microsoft Excel file
(*.XLS), where samples for each lead are arranged in columns accordingly, and these
data have to be transferred to a new *.TXT file readable by the software developed
by Malarvili (2004). Moreover, the PC-ECG actually samples only eight leads (I, III,
V1 through to V6). The other four leads (II, aVR, aVL, aVF) are derived
mathematically in the PC-ECG software. These derived leads, visually, have flat T
waves with low resolution resulting in noisy signals due to quantization errors. This
conducts to inaccurate detection of Q onset and T offset (Malarvili, 2004).
40
The design and development of the twelve-lead electrocardiogram system
consists of four phases. The first phase, which is carried out at the beginning of this
research, is the design and development of a twelve channels data acquisition unit for
electrocardiogram signals recording. Preliminary the requirements and the
components of the system are described, followed by the design of the system itself.
This design includes the data acquisition system design, firmware programming for
the embedded microcontroller, and software programming using the Microsoft
Visual C++ 6.0 for USB device interfacing.
The following phase is the design and development of a complete twelve lead
electrocardiogram signal conditioning circuits, which is the basic requirement in
acquiring the electrocardiogram signals. The stages included in this phase are the
Wilson and Goldberger resistor networks, Driven-Right-Leg (DRL), followed by the
instrumentation amplifier, ac coupling circuit, isolation amplifier, the anti-aliasing
filter and the integrations to obtain a complete twelve lead electrocardiogram system.
Subsequently, the third phase describes the experiments carried out to
determine the optimal design of the anti-aliasing filter in order to find the best
minimized signal distortion of the ECG signal in the pass band frequency of the
filter. This phase also experiments on two power line noise removal filters for realtime implementation.
Finally, the QT dispersion software developed by Malarvili, 2004, is
integrated into the developed data acquisition software. In addition, the algorithm
implemented by Malarvili (2004) is validated with the PTB Diagnostic Database.
The details of the validation are described. Figure 4.1 illustrates the methodology as
outlined.
41
Start
Development
12-Channel USB
Data Acquisition
System
Development
12-lead
Electrocardiogram
Data Collection
(for filter analysis)
Anti-aliasing Filter
Evaluation &
Implementation
Power Line Noise
Filter Evaluation &
Implementation
QT Dispersion
Software
Integration
Validation of QT
Interval Algorithm
on PTB ECG
Database
Figure 4.1: Flowchart of Research Methodology for 12-Lead ECG System
4.1
The Twelve Channels Data Acquisition Unit
In the design of a twelve channel data acquisition unit, it is essential to meet
the specifications determined by the Association of Advanced Medical
Instrumentation (AAMI) organization. In relation to the data acquisition unit, the
minimum sampling rate for a single electrocardiogram signal, as defined by the
AAMI, must be 500 Hz or greater and the resolution of the digitized signals must be
12 bits or greater with a maximum LSB of 5 µV (Carr and Brown, 2000). Twelve
42
analogue channels are to be digitized and therefore the sampling ability and the
throughput of the analogue-to-digital converter (ADC) selected for this purpose must
be at least 6 kHz, and the data transfer rate to the PC must be at least 24000 byte per
second or 192000 bps.
In addition, the data acquisition must also meet the characteristic of the
conditioned electrocardiogram signals. Typical surface electrocardiogram signal
amplitude ranges from 0.5 mV to 5 mV peak to peak. With overall gain of 1000 for
most standard electrocardiogram devices, the visible electrocardiogram voltage
amplitude would be a maximum of 5 V. On the other hand, the electrodes dc offset
that is part of the electrocardiogram signal may range up to ±300 mV. With a low
front-end gain of 26, the baseline drift yielding from dc offset may gain up to ±7.8 V.
The voltage of the amplified electrocardiogram signal along with the baseline drift
may end up with amplitude of ±12.8 V.
The characteristics of the signals have been identified and the specifications
for the system have been outlined. The details of the system developed, in which
they are briefly explained in the recent paragraphs, are described in detail in the sub
sections that follow.
4.1.1
Analogue Multiplexer and Analogue-to-Digital Converter
The front-end of the data acquisition unit is the analogue multiplexer
MPC506 manufactured by Burr Brown. This analogue multiplexer has sixteen
analogue single-ended inputs, each with voltage swing of ±Vsupply that is ±12V in this
case. The multiplexer has a 4-bit address line for channels selection. The important
parameters that must be observed when selecting analogue multiplexer is that its
switching between the channels must not allow crosstalk. The MPC506 features
43
break-before-make switching technique and its break-before-make delay is 80 ns
(MPC506, 1998). This is significant especially when programming the channels
selection so as to avoid a situation where a signal in either channels flowing in the
neighboring channels. Out of sixteen, only twelve of the channels are utilized for the
twelve-lead electrocardiogram whereas the remaining free channels are tied to
ground. The block diagram of the architecture of the analogue multiplexer is
illustrated in figure 4.2.
Figure 4.2: MPC506 Multiplexer Functional Block Diagram
Following the MPC506 in this design is the ADS7806 12-bit analog-to-digital
converter. The ADS7806, which is also manufactured by Burr Brown, functions to
convert the multiplexed signals from the MPC506. Powered by 5 V, the ADS7806 is
capable of sampling up to 40 kHz. The ADC can be configured, hardwired, for both
bipolar and uni-polar signal range, ranging ±10 V, 0 to +5 V and 0 to +4 V. The
digitized output can be transferred to microprocessors and microcontrollers serially
or via its 8-bit parallel interface. Its sampling rate is suitable for this application as
the total bandwidth of all the twelve channels required is only 6 kHz, with the
requirement of 500 samples per second per channel. Considering the AC coupling
circuit solving the baseline drift continuously as mentioned previously, an input
voltage range of ±10 V for the analogue-to-digital converter would be appropriate
44
enough for this application. Figure 4.3 below shows the block diagram of the
ADS7806.
Figure 4.3: ADS7806 Interface Diagram
Figure 4.4 show the timing diagram for the ADS7806. Typically the
maximum conversion time consumes 20µs whereas the acquisition time spends 5µs.
the ADS7806 will start its analogue to digital conversion process when the readconvert (R/C) pin, which is high by default, is being pulled low for a period between
40ns to 12µs, t1. The busy (BUSY) pin will be low for 85ns after the start of
conversion and stays low for a maximum of 20µs, t4. This is also the conversion time
of the ADC. When conversion is complete, the BUSY pin goes high, and its high
byte data will be valid at this instance. The byte (BYTE) pin needs to be pulled low
so that the 8-bit data output pins will hold the value of the high byte resulting from
the conversion. Subsequently, the BYTE pin needs to be pulled high, to enable the
low byte data to be latched and read by microprocessors. The acquisition time for
reading the high and low byte consumes a total of 5 µs. An added feature of this
ADC is that the data from previous conversion can be retrieved during the
conversion of the current sample. This enables the microprocessor to acquire data
while waiting for the conversion, and during the acquire time slot, other functions
can be done such as transferring the data to the PC, or saving them in buffers.
45
Figure 4.4: ADS7806 Timing Diagram
4.1.2
Universal Serial Bus PC Interface
The parallel port and serial communication interface is no longer popular as a
mean of interfacing between an external device and a PC. Parallel port was once well
known for its high speed data communication as compared to RS232-based serial
communication. On the other hand, the serial communication is available as a low
cost interface for long distance communication. However, recently a new interface
for PC communication has been introduced, the universal serial bus (USB). Its
capability of high speed serial interface overcoming the parallel and serial port has
lure portable device designers to adopt it in various devices inclusive of memory
cards, cameras, scanners, printers, keyboard and mouse and many more.
Furthermore, parallel port is seldom found in desktop PC and especially notebooks
for portable applications. Serial communication ports are also rarely found in
notebooks nowadays. The most available external communication interface is the
USB. Even though serial-to-USB converters are available, they do not always work
with all serial interfaced devices. Moreover, the USB interface for data transfers has
much higher speed than the RS232-based serial communication and this advantage
46
offers room for the design of high bandwidth data acquisition systems. Therefore, the
design for the data acquisition is geared towards the USB interface.
There are plenty of choices of IC chips to select from in integrating the USB
interface. Among them are PDIUSBD11 from Philips Semiconductor, USBN9603
from National Semiconductor, and FT232M from FTDICHIP. These are integrated
chips that can be interfaced to any microcontrollers. There are also USB
microcontrollers that have built in USB interface. These include PIC18F4550 from
Microchip, 68HC08 from Motorola and CY7C63001 from Cypress.
The data acquisition unit design utilizes the FT245BM USB to parallel
interface from FTDI Chip. As shown in figure 4.5, the USB module which contains
the FT245BM IC converts the USB serial lines to 8-bit parallel data lines. Supporting
the 8-bit data lines are the WR and RD pins which function to write and read the 64
byte buffers in the FT245 and the TXE and RXF pins that indicate whether the buffer
is empty so that it can be written to and whether the buffer is full so that read process
can be executed. Another pin not shown in figure 4.5 is the SI (send immediate) pin.
This pin will send the contents of the buffer to the PC even though the 64-bytes
buffer is not full. The speed of the FT245BM is 1 M byte per second and data
transfer is utilized using the bulk mode. The data bytes are transferred in bulks of 64
bytes of which two bytes are FTDI status byte whereas the rests are data byte. This
means that if 64 K bytes are sent to the PC, only 63488 bytes are the actual data
bytes.
The FT245BM USB-to-parallel interface is opted for this design as it can be
interfaced directly to the ADS7806 without any data protocol. If USB-to-serial
FT232 interface were to be implemented, the serial data transfer of the ADS7806
does not meet the format of the USB interface chip. In this situation, a
microcontroller has to be the intermediate device to interface between the two
formats. By means of the FT245BM, it can be interfaced directly to the ADS7806,
allowing faster data transfer rates and therefore the sampling rate capability of this
47
design increases. In addition, the royalty-free driver provided by FTDI Chip enables
fast integration of USB into any devices.
Figure 4.5: DLP-FT245M Functional Block Diagram
4.1.3
The Data Acquisition Unit System Design
Figure 4.6 shows the block diagram of the data acquisition system designed
for the twelve-lead electrocardiogram system. With this configuration as shown, the
system developed is able to acquire twelve channels via time domain multiplexing
and the sampling rate designed for this study is 500 Hz per channel. Observing the
data path, the signal in both analogue and digital form, does not go through the
microcontroller. This save the clock cycles in programming the firmware in the
microcontroller and thus allow higher sampling rate to be programmed. The analogue
multiplexer MPC506, the analogue-to-digital converter ADS7806 and the USB
module DLP-USB245M are all controlled by the PIC16F84A-20 microcontroller
from Microchip. The microcontroller is an 18-pin 8-bit microcontroller which
operates at a maximum of 20 MHz. The microcontroller is also available at 4 MHz
but the tasks to multiplex and convert the multiple analogue signals and transfer high
resolution data calls for a higher processing speed.
48
12 Channels
Input
ANALOGUE
MULTIPLEXER
Multiplexed
Signal
MUX
Select
12-BIT
ADC
Covert
& Read
MICRO
CONTROLLER
Digital
Data
PC
INTERFACE
Buffered
Data
Data
Latch
Figure 4.6: Block Diagram of Developed Data Acquisition Unit
4.1.4
Firmware Programming and Data Formats
The flowchart in figure 4.7 conveys the firmware programming of the
PIC16F84A-20 microcontroller. The firmware starts off with the initialization of
input and output ports of the microcontroller. The pin assignments of the
microcontroller for this design can be found in Appendix A. Upon initialization, the
analogue multiplexer is put to select at the second channel. During the conversion of
the second channel, the value of the previous channel, which is the first channel in
this case, is stored in the buffer of the USB module. This is so to fulfill the
arrangement of data bytes as shown in figure 4.8. The reason behind this is explained
previously in the paragraph describing the timing diagram of the ADS7806 analogto-digital converter.
49
Start
Initialize
- Input/Output
Port
- Variables
- Select 2nd
Channel
B
A
Select Next
Channel
Start ADC
Conversion
Read Previous
High Byte From
ADC
13th Channel
?
Store High Byte
Into USB Module’s
Buffer as Previous
Channel’s data
No
Yes
Send All Data in
USB Module
Buffer to PC
Read Previous
Low Byte From
ADC
Re-Select 1st
Channel
Store Low Byte
Into USB Module’s
Buffer as Previous
Channel’s Data
Sampling Delay
B
A
Figure 4.7: Flowchart for Programming of PIC16F84A-20/P Microcontroller
Channel 1
High
Byte
Low
Byte
Channel 2
High
Byte
Low
Byte
Channel 3
High
Byte
Low
Byte
Channel . . .
...
Channel 12
High
Byte
Low
Byte
Figure 4.8: Data Packet of 24 Bytes for Transfer to PC via USB interface
The firmware loops and converts all the signals from the twelve channels and
writes the resulting conversion to the USB module’s buffer one after another with
each loop consuming 25 µs which totals up to 300 µs for all twelve channels. As
mentioned earlier, the data throughput of the USB module is 1 M bytes per second
and it transmits in bulks of 64 bytes. Therefore the time allocated for data transfers
from the device to the PC is 64 µs. The details of the timing distribution are
illustrated in figure 4.9. After transferring data to the PC, a delay needs to be
50
included so as to achieve a sampling rate of 500 Hz per channel. In order to
accomplish this, the whole process of multiplexing, analog to digital conversion, and
data transfer must use up a time frame of 2 ms. However, this process only takes up
364 µs. Thus, a delay of 1636 µs is added to achieve the desired sampling rate of 500
Hz.
300µs
1
2
3
4
5
6
7
8
9
10
11
12
64 µs
1636 µs
DAQ to PC USB Transfer
Sampling Delay
2 ms
Figure 4.9: Timing Distribution of Firmware Program
Figure 4.10 shows how every channel can achieve an equal sampling rate of
500 Hz. The time frame inclusive of the sampling delay is 2 ms. Observe the time
distance of the first channel data conversion of the first frame and the first channel
conversion of the subsequent frame. With the implemented delay, the time interval is
2 ms. Since for every time frame, the time interval between every conversion of each
channels in a frame is equally programmed to be 25 µs, the time interval of nth
channel from frame to frame are also in the range of 2 ms. After the sampling delay,
the analogue multiplexer is set to re-select the first channel and the loop continues.
Referring back to the flow chart of the firmware, the assembly language
program does not poll any status pins from the ADS7806 analogue-to-digital
converter and the DLP-USB245M USB module. A status pin from the ADS7806 is
the BUSY pin which indicates the start and end of analogue to digital conversion.
The DLP-USB245M also has a status pin that is the TXF pin which indicates the
status of the buffer of the FT245BM IC. No signal polling is done so as to ensure
equal time distribution of analogue-to-digital conversion and data transfer from the
ADS7806 to the DLP-USB245M and from the USB module to the PC. Referring to
the datasheets of the ADS7806 and that of the USB module in Appendix B, stated in
the timing characteristics of their respective functions are the minimum, typical and
maximum time intervals. The time intervals may vary in different conditions in the
51
range of the minimum and maximum time interval stated in the respective datasheets.
Therefore, delays, which represent the specific maximum time interval of a function,
are fully utilized in the firmware programming instead of reading, the may-vary time
interval, status pins of the ICs.
2 ms
1
2
3
4
5
6
7
8
9
.
.
.
Transfer & Delay
1
2
9
.
.
.
Transfer & Delay
2 ms
Figure 4.10: Time Setting to Achieve Equal Sampling Rate of 500 Samples per
Second for each channel
4.1.5
Acquiring USB Data in PC Software
On the other end is the PC software programming. The PC software
programming is done using the Microsoft Visual C++ 6 platform. The programming
of the software is divided into two main parts that is the data acquiring and the
graphical user interface. In this chapter, only the data acquiring part is described
while the graphical user interface will be described in the following chapter.
The significant part in the data acquiring programming is the communication
of the software with the DLP-USB245M USB module. An advantage of
implementing USB interface using ICs from FTDI Chip is that the drivers provided
are royalty free. There are two drivers provided by FTDI Chip, the VCP driver and
the D2XX driver. The VCP (Virtual COMM Port) driver causes the USB device to
appear as an additional COM port available to the PC. Using this driver,
programmers can access the USB device in the same way as it would access a
standard COM port. However, this driver only supports a transfer speed up to 300 K
52
bytes per second. The D2XX (Direct Driver) on the other hand, allows direct access
to the USB device through a DLL. Using this, application programmers can access
the USB device via a series of DLL function calls. The design of the software of the
data acquisition unit utilizes the latter one as this driver allows a maximum transfers
speed of 1 M bytes per second.
The flow chart in figure 4.11 depicts the program flow of a function acquiring
the data bytes from the PC USB buffers. This function resides in a background thread
that loops continuously monitoring available data in the buffer, in which this function
will only loop when the PREVIEW or RECORD button is clicked. When executing
the thread, the appropriate variables are initiated, memories are allocated and the
buffer of the PC USB is purged. The buffers are purged in order to empty the
receiving buffers that might be filled with data bytes from the device that sends data
continuously upon powering up. The function will then look for new available data in
the buffers and get the bytes count if there are bytes in them. The bytes count will
then be calculated for its modulo by 24. If the remainder is null, then the bytes in the
buffer will be considered valid. Referring to the data format in figure 4.8, the data
bytes are sent in packets of 24 with the prearranged high, low and channel bytes.
Therefore, it is considered that data arriving at the PC USB buffers are in multiples
of 24, otherwise the data in the buffer would be taken to be invalid and the buffers
are flushed out before receiving the incoming bytes of 24 if there is any.
Knowing the arrangement of the data bytes, appropriate bytes are extracted
from the packets, combined to form a 12-bit integer and reassigned in data arrays
accordingly based on their respective channels. The processed data are then plotted
in respective areas of the drawing space of the graphical user interface. In order to
ensure no data bytes are missed, the results of modulo of the bytes count with 24 are
traced. No data lost is being traced during the repeated continuous reception of the
data bytes.
Upon completion of the development of the twelve channels USB data
acquisition unit, the following step is to develop the analogue twelve lead
53
electrocardiogram signal conditioning system. The developed data acquisition unit
and its PC software are used to acquire the analogue signals in aiding the process of
developing the analogue part of the electrocardiogram system.
Start USB Rcv
Thread
Initialize
- Variable
- Empty PC
USB Buffer
- Allocate
Memory
A
B
For Next n,
1 to Quotient
Data in PC
USB Buffer
?
No
Read Nth Array of
24 bytes
Yes
Combine High &
Low Bytes of
Channels c
Read PC
USB Buffer
Assign in Data
Array of 12
Channels
Get Number
of Bytes in
USB Buffer
Number of Bytes
Mod by 24
Remainder
=0?
Yes
Plot Data in
Appropriate Area
No
Purge PC USB
Buffer
Purge PC USB
Buffer
B
A
Figure 4.11: Flowchart for Receiving Data Packet at the PC USB Buffer
54
4.2
Twelve-lead Analogue Electrocardiogram Signal Conditioning System
The beating heart generates an electrical signal that can be used as diagnostic
tool for examining some of the functions of the heart. The electric potentials
generated by the heart appear throughout the body and on its surface. The potential
differences can be determined by placing electrodes on the surface of the body and
measuring voltage between them, being careful to draw very little current or no
current at all, ideally (Webster, 1998). The peak to peak voltage of the
electrocardiogram signal is typically 1mV. Its frequency range has been defined by
the Association of Advanced Medical Instrumentation (AAMI) to be 0.05 to 100 Hz
for diagnostic purposes.
Noises are always present in almost every analog system as well as digital
systems. These noises if not eliminated, can distort the shape of the signal of interest
in terms of its amplitude and frequency. Noises that are common in
electrocardiogram system include 50 Hz power-line noise, motion artifact, and
baseline drifts. Being minute in amplitude, the electrocardiogram signal cannot be
distinguished from with these noises and therefore careful design needs to be
implemented in the twelve lead electrocardiogram designs. The characteristics of the
noises also need to be understood well so that they can be eliminated without
distorting the electrocardiogram signal itself while removing them. The following
describes details of every stages involved in electrocardiogram signal conditioning.
4.2.1
Instrumentation Amplifier
The first amplification stage of the electrocardiogram is handled by the
instrumentation amplifier. The instrumentation amplifier is internally constructed by
three operational amplifiers. The two front end input amplifiers are configured as a
55
non-inverting follower. The third operational amplifier on the other hand is
connected in a simple dc differential amplifier circuit. The differential amplifier
produces an output voltage that is proportional to the difference between the voltages
applied to the two input terminals. The differential amplifier is useful because it
rejects common mode voltages while amplifying the differential signal of interest.
Instead of using three operational amplifiers with self tuned resistors for impedance
matching on both the inputs of the differential amplifier, the INA118 precision and
low power instrumentation amplifier is used. The INA118 has a high common-mode
rejection ratio (CMRR) of 110 db offers excellent accuracy with laser trimmed
internal resistors so as to provide a very low offset voltage of 50µV. Figure 4.12
shows the built-in circuit inside the IC. Moreover, the INA118 presents over-voltage
protection of up to ±40 V protecting the IC and the subsequent ECG circuit from
high voltages sourcing from devices such as the defibrillator (INA118, 1998).
Figure 4.12: Internal Structure of Instrumentation Amplifier INA118
The gain of the INA118 can be set with a resistor RG using the equation as
follows:-
56
The INA118 can be set to have a direct gain of 1000 V/V but this can cause
saturation due to the electrode offset potential that exists in the electrodes. Tenedero
(2002) has suggested a gain of less than 33 V/V at the instrumentation amplifier to
avoid saturation. A gain of 26 V/V is determined by available standard resistors and
to ensure the gain is as high as possible for better CMRR but less than 30 V/V to
avoid amplifier saturation.
4.2.2
DC Restore Circuit
In order to overcome the interference caused by the motion artifact, the
electrocardiogram preamplifiers must be ac-coupled so the electrode offset potential
are eliminated (Carr and Brown, 2000). It is observed that major components of the
motion artifacts accumulate within low frequencies (Webster, 1998). Therefore in
designing the electrocardiogram amplifier, its frequency response is required to be as
low as possible, which is almost dc. The AAMI has defined that the low frequency
response of the electrocardiogram preamplifier is to be at 0.05 Hz (Webster, 1998).
The ac-coupling circuit proposed by Spinelli et. al. (2003) does eliminates the
electrode potential well and enables a gain of 1000 V/V at the instrumentation
amplifier stage. However the proposed technique is only suitable for single lead ECG
especially for portable systems where component count is critical. Even though, the
DC-restore circuit implemented by Spinelli et. al. (2003) is applied in this design.
The purpose of the DC-restore circuit, which acts as an ac-coupling circuit, is to put
the ECG baseline at zero volts. In the dc-restore circuit, the signal does not actually
go through the capacitor. The only advantage is that the feedback approach uses an
active integrator, which is linear and more easily controlled than a passive RCcoupling circuit. The time constants of the feedback dc restorer is a multiple of R and
C (Carr and Brown, 2000). Since the lower frequency of the ECG is 0.05 Hz, the
57
selected R2 and C9 values are 3.3 MΩ and 1µF respectively. Figure 4.13 shows the
circuit for both the INA118 and the DC-restore circuit.
R1
2K
U1
1
8
JP3
1
2
Header 2
2
3
4
RG
RG
+V
ININ+
OUT
-V
REF
+12Vb
7
6
C9
5
R2
3.3M
1uF
+12Vb
8
-12Vb INA118P
6
7
5
4
B
U2B
LF412ACN8
-12Vb
Figure 4.13: The Instrumentation Amplifier and the DC-Restore Circuit
4.2.3
Isolation Amplifier
In designing this system, it is assumed that this system will be practiced on
the most vulnerable hospital patients. Even small currents are taken as lethal to
patients under certain conditions. In order to prevent unintended cardiac shock,
isolation amplifier implementation is critical. The IC implemented for patient
isolation is the ISO122 galvanic precision isolation amplifier. For the isolation to
function as it should be, an isolated power supply must be provided for the isolated
part of the circuit. The isolation power supply is achieved by means of the
NMH1212S which input is 12 VDC and outputs dual isolated +12 VDC and -12
VDC power supply. Figure 4.14 shows the block diagram of the ISO122 isolation
amplifier.
58
Figure 4.14 ISO122 Isolation Amplifier Block Diagram.
4.2.4
Anti-aliasing Filter
Prior to electrocardiogram signal sampling by the analog to digital converter,
the anti-aliasing filter is the most crucial design of all the other stages. This is
because, incorrect design can cause the electrocardiogram to be distorted from the
actual signal required. The anti-aliasing filter or low pass filter determines the high
cutoff frequency for the signal and amplifies the signal in accordance to the
requirements of the analog to digital converter. The filter implemented in this design
is focused around Sallen Key configuration.
Common low pass filters are Butterworth, Bessel and Chebychev. The
designed sampling rate of the analog to digital converter is 500 samples per second.
The high cutoff frequency must be set to 100 Hz stated by the AAMI and it is
obvious that the Nyquist sampling theorem is more than being fulfilled. However,
the -30dB attenuation of the designed filter must be 250 Hz or lower. Butterworth
filter has excellent steep roll-off. However, its phase response is not linear. Even
59
though Bessel filter has a slow roll-off, its phase response is almost close to linear.
Linear phase response brings a perception that the filter has constant group delay. It
is commonly known that any signal passing a filter will be delayed. A related study
done by Hejjel and Kellenyi (2005) investigates the effects of corner frequencies of
electrocardiogram filters for the precision of R-R interval. The authors concluded
that Bessel filters shows better properties so as to avoid signal distortion and in turn
provide more accurate electrocardiogram markings, such as the R-R interval for their
study. Therefore, this design utilizes the Bessel low pass filter so as to retain the
electrocardiogram signal and thus preserve the actual parameters of the signal.
The anti-aliasing filter is designed using the FilterPro software provided by
Texas Instrument. A gain of 38.5 is set to complement the gain of 26 at the
instrumentation amplifier in order to achieve total gain of 1001. Figure 4.15 shows
the software used for the design of the anti-aliasing filter. Since the design of the
filter uses the freely available software there is no guarantee that the performance of
the actual implementation is as expected. Therefore, a study is carried out so as to
validate the design of the anti-aliasing filters.
60
(a)
Figure 4.15: FilterPro By Texas Instrument. (a) Butterworth Filter Implementation
(b) Bessel Filter with Flat Group Delay in the Pass Band
61
Differently from the study made by Hejjel and Kellenyi (2005), this study
looks upon the comparison of the Butterworth and Bessel filter not only on the QRS
complex, instead this study includes the whole morphology of the electrocardiogram
signal in one cycle. Moreover, the aim of this study is to determine the lowest order
of the low pass filter that fulfills the standard high cut-off frequency for diagnostic
electrocardiogram, which is 100 Hz. Figure 4.16 and table 4.1 demonstrates the
experimentation of this study. The resistors and capacitors parameters settings are
determined from the FilterPro software provided by Texas Instrument Inc.
The experiment setup is shown on Figure 4.16. For this study, a patient
simulator is utilized. The patient simulator 217A outputs both the 1 mV
electrocardiogram signal with noises and a clean 1 V electrocardiogram signal.
However, only the clean 1 V electrocardiogram signal with various arrhythmias is
utilized in study. Therefore the output signal from the anti-aliasing filter circuits is
compared with the 1 V ECG signal by means of the MAE and MSE. Six filters, as
shown in table 4.1, will be compared and the input signals to the filters are the
various simulated signals from the patient simulator as listed in table 4.2. The results
and analysis are presented in chapter 6.
Figure 4.16: Experiment Setup for Selection of Optimal Anti-Aliasing Filter
Table 4.1: Different Low Pass Filter Configuration for the Experiment
Filter Type
Filter Order
1. Butterworth
2nd (bu2)
4th (bu4)
8th (bu8)
2. Bessel
2nd (be2)
4th (be4)
8th (be8)
62
Table 4.2: Various Clean Simulated Signals from 217A Patient Simulator
Simulated ECG Signals
Normal (60 bpm)
Nodal
SVT
PEDS 1mV
PEDS 2mV
Ventricular
V Tachy
RBBB
LBBB
Square Wave 2 Hz 1 mV
4.2.5
Wilson and Goldberger Resistors Network
In order to obtain a twelve lead diagnostic electrocardiogram, the output of
the electrode is fed to a resistor network. These averaging resistors form the
indifferent points of the Wilson central terminal (Webster, 1977).
Webster (1977) referred that if the averaging networks of unipolar limb leads
have averaging resistors of too low value compared to that of the skin resistance, the
voltage of the indifferent point is erroneous. The solution to this problem would be to
add a buffer amplifier before the averaging network or by increasing the value of the
resistors in the network (Webster, 1977). Therefore the circuit in figure 4.17 is
implemented before the instrumentation amplifier to prepare the required signals to
obtain the twelve lead ECG.
63
8
+12Vb
U32A
LF412ACN8
1 RA
C3_C
RA_C
R157
3
A
+12Vb
8
2
390K
4
2
-12Vb
LL_C
R159
3
A
U37A
LF412ACN8
1 LL
C5_C
390K
8
R158
5
-12Vb
U32B
LF412ACN8
7 LA
C4_C
6
LA_C
4
+12Vb
B
4
390K
-12Vb
(a)
(RA+LA)/2
R148
RA
20K
R147
20K
R151
20K
R154
30K
LA R153
30K
R149
20K
WCT R155
30K
(RA+LL)/2
R152
20K
LL
R150
20K
(LA+LL)/2
(b)
Figure 4.17: Front-end Circuit Prior to the Signal Conditioning. a) Buffer Amplifiers
with Current Limiting Resistors. b) Wilson and Goldberger Resistor Network
4.2.6
Driven Right Leg Circuit
Figure 4.18 shows a driven-right-leg amplifier which is used to further
increase the common mode rejection ratio (INA118, 1998). This circuit, which
output is connected to the patient, acts as in a feedback loop to drive the common
mode noise on the patient to a low level. Referring to the circuit, the output of the
amplifier is an inversion of the common mode voltage from the Wilson Central
Terminal. This inversion will cancel out the common mode that is induced to the
patient by the power line and at the same time provide a return path between the
patient and the electrocardiogram system. The advantage of this circuit is that
64
because the patient is not directly grounded, electric shock hazard is greatly reduced
(Carr and Brown, 2000).
C217
47pF
R146
SHLD
+12Vb
8
8
390K
RL
R145
6
7
B
5
2
1
A
U57A
LF412ACN8
3 WCT
4
4
390K
U57B
LF412ACN8 R156
10K
-12Vb
Figure 4.18: Driven Right Leg and Cable Shielding
4.2.7
The Integration
The circuits described in the previous sub-sections are combined altogether to
form the twelve-lead electrocardiogram analogue signal conditioning system. The
front-end of this system consists of the buffer amplifiers, followed by the WilsonGoldberger resistors network, the driven-right-leg and the cable shielding, the power
supply and the isolation power supply. The outputs from the front-end are the key
inputs to the core signal conditioning circuits in this system. These are clearly
depicted in figure 4.19 and 4.20
Buffers
Current Limiting Resistors
10 Electrode Shielded Patient Cable
65
Figure 4.19: Twelve-lead Electrocardiogram Front-end
From figure 4.20 below, it is clearly seen that the signal conditioning circuit
blocks are repetitive. They begin with the instrumentation amplifier, INA118,
followed by the DC restorer circuit, the isolation amplifier and lastly the 8th order
anti-aliasing filter. The difference between the sequential functioning circuits blocks
are the inputs to the instrumentation amplifier. For example, to obtain lead II, the
positive input is from the left leg and the negative input is from the right arm. It is
from these differential inputs that one can get the standard electrocardiogram signals.
These circuits are assembled together on a printed circuit board to develop an
electrocardiogram signal conditioning system. The outputs of this system are then fed
to the USB data acquisition developed earlier and described in the beginning of this
chapter. This integrated system enables real-time twelve-lead electrocardiogram data
collection for cardiac arrhythmias analysis.
66
LA (+)
RA (-)
LL (+)
RA (-)
LL (+)
LA (-)
RA (+)
(LA+LL)/2 (-)
LA (+)
(RA+LL)/2 (-)
LL (+)
(RA+LA)/2 (-)
Instrumentation
Amplifier, INA118
DC
Restore
Isolation
Amplifier
8th Order
LPF
LI
Instrumentation
Amplifier, INA118
DC
Restore
Isolation
Amplifier
8th Order
LPF
L II
Instrumentation
Amplifier, INA118
DC
Restore
Isolation
Amplifier
8th Order
LPF
L III
Instrumentation
Amplifier, INA118
DC
Restore
Isolation
Amplifier
8th Order
LPF
aVR
Instrumentation
Amplifier, INA118
DC
Restore
Isolation
Amplifier
8th Order
LPF
aVL
Instrumentation
Amplifier, INA118
DC
Restore
Isolation
Amplifier
8th Order
LPF
aVF
(a)
C1 (+)
Instrumentation
Amplifier, INA118
DC
Restore
Isolation
Amplifier
8th Order
LPF
V1
C2 (+)
Instrumentation
Amplifier, INA118
DC
Restore
Isolation
Amplifier
8th Order
LPF
V2
C3 (+)
Instrumentation
Amplifier, INA118
DC
Restore
Isolation
Amplifier
8th Order
LPF
V3
C4 (+)
Instrumentation
Amplifier, INA118
DC
Restore
Isolation
Amplifier
8th Order
LPF
V4
C5 (+)
Instrumentation
Amplifier, INA118
DC
Restore
Isolation
Amplifier
8th Order
LPF
V5
C6 (+)
Instrumentation
Amplifier, INA118
DC
Restore
Isolation
Amplifier
8th Order
LPF
V6
WCT (-)
(b)
Figure 4.20: The Electrocardiogram Signal Conditioning Core. (a) the limb and
augmented limb leads derived from the Goldberger resistors network. (b) the precordial leads derived from the Wilson Central Terminal and the chest electrodes
67
4.2.8
Power Line Noise Removal
Power line noise is common in electrocardiogram systems. There are various
ways in which the power line is induced into the electrocardiogram signals. The first
is through a bad design of the printed circuit board where the signal conditioning
circuit lays. Improper grounding, ground loop and poor ground plane design exposes
the printed circuit board to the power line noise sourcing especially from the system
power supply. This can be solved by practicing proper printed circuit board design
and therefore it can be avoided. Secondly, the power line noise is induced into the
electrocardiogram signal through the patient themselves. Since power line cables are
all around us providing power for the electrical appliances that we used, therefore
power line noise is the common problem one has to solve in designing a reliable
electrocardiogram system.
Solving the latter power line noise source is a challenging task. One could
easily say that removing power line noise is as easy as removing the frequency
component of the noise by using a notch filter. A fact that is important to highlight is
that the power line 50 Hz noise is consisted within the bandwidth of the
electrocardiogram signal. It is also significant to indicate that the frequency range of
the QRS complex is inclusive of the power line frequency component. Therefore this
study is aimed to compare two power line filtering approaches as described in the
following paragraphs.
4.2.8.1 Twin-T Analog Notch Filter
The Twin-T notch filter is a common power line filter implemented in the
electrocardiogram circuit design. Figure 4.21 shows the schematic of a Twin-T notch
filter. The Q or depth of the twin-T notch filter can be determined by the ratio of the
68
values of the resistors R3 and R4. In executing the experiment for the study of the
twin-T notch filter, the value of the resistors R3 and R4, which source from a
potentiometer, are paired as tabulated in table 4.3. These values will give different Q,
and the distortion and frequency rejection of the filter is observed. Figure 4.22 shows
the setup of the study. The error between the notch filtered clean signal and the
unfiltered clean signal is calculated for the signal distortion resulting from the twin-T
notch filter. On the other hand, the filtered 50 Hz noised ECG signal is compared to
the clean ECG signal for determining the rejection level of the simulated power line
noise. Performance of the notch filter is presented using the MAE and MSE in
chapter 5.
8
+12Vs
U5A
2
R20
R21
32k
32k
1
A
3
R22
32k
C11
C9
100nF
-12Vs
R23
32k
8
C10
100nF
C12
7
100nF
U5B
6
B
4
100nF
OUT
LM833D
4
IN
5
LM833D
R3
POT
R4
Figure 4.21: Twin-T Notch Filter Circuit
Table 4.3: List of R3 and R4 values for Varying Depth of Twin-T Notch Filter
R3
R4
90 kΩ
10 kΩ
80 kΩ
20 kΩ
70 kΩ
30 kΩ
60 kΩ
40 kΩ
50 kΩ
50 kΩ
40 kΩ
60 kΩ
30 kΩ
70 kΩ
69
Table 4.3: List of R3 and R4 values for Varying Depth of Twin-T Notch Filter
(continued)
20 kΩ
80 kΩ
10 kΩ
90 kΩ
7.5 kΩ
92.5 kΩ
5.0 kΩ
95.0 kΩ
2.5 kΩ
97.5 kΩ
Figure 4.22: Experiment Setup for Study of the Effect of the Twin-T Notch Filter
4.2.8.2 Time Domain Subtraction
Bazhyna et al (2003) compared four different techniques for power line noise
removal. In the publication, the authors highlight the time domain subtraction and
regression subtraction as the best of all four techniques implemented. Even though
regression subtraction gives the lowest mean absolute and mean square error, the
implementation is demanding in terms of processing speed. Therefore, it is less
suitable for real-time implementation for power line noise removal as compared to
the time domain subtraction technique.
The time-domain subtraction technique is described as follows. A criterion is
used to separate linear and non-linear segments of the ECG signals. Equation 4.1
determines whether the particular location of the signal is linear or otherwise.
Bazhyna et. al (2003) define M, the threshold value to be 100 µV which is also
70
adapted in this implementation. D1 and D2 are two consecutive partial differences of
the signal at the same phase of the power-line interference as in equation 4.2 and 4.3
where n is the number of samples of a period of the power-line noise.
abs ( D1 − D 2 ) ≤ M ……………………................(4.1)
D1 = X i + n − X i …………………………...........(4.2)
D2 = X i +1+ n − X i +1 ………………………….........(4.3)
If the specific point is calculated as a linear segment, the filtered signal is
obtained by equation 4.4 or 4.5 for odd and even number of samples per 2Π interval
of the power-line noise respectively. These are moving-comb average filter where the
filtered signal is utilized to subtract it from the original signal. Therefore, the
resulting subtraction is a sample of the power-line noise at the particular phase.
These noise samples are continuously updated for each sample point in the linear
segment of ECG signal. This compensates for the varying power-line noise
amplitude. In the non-linear segments, the filtered signal is obtained by subtracting
the previously calculated noise from the original signal, thereby resulting in a powerline noise-free ECG.
n
Yi = ∑
i =1
Xi
…………………………................(4.4)
n
n
Yi =
∑X
i =1
n
i
−
X i + n +1 − X i +1
……….…………................(4.5)
2n
Figure 4.23 shows the experiment setup for the analysis of the time-domain
subtraction technique. Similar to that of the analysis done for the twin-T notch filter,
the MAE and MSE between the filtered and unfiltered using the time-domain
subtraction technique for the clean ECG signal is calculated. The power line noise
71
rejection is obtained by subtracting the clean ECG signal from the 50 Hz noised
ECG. The results and analysis for both the notch filter and the time-domain
subtraction filter are discussed further in the following chapter.
Figure 4.23: Experiment Setup for Time-Domain Subtraction Power Line Removal
Analysis
4.3
Validation of the QT Interval Algorithm
Recently, a competition has been held by PhysioNet and the Computers in
Cardiology (CinC) Conference 2006 entitled the “QT Interval Challenge 2006” with
the last submission date on 31st of April 2006. The challenge is focused on the PTB
Diagnostic ECG Database provided by PhysioNet. The database consists of 549 data
files from 219 normal and those with cardiac disorders. The competition is
subdivided into three classes. The first class is meant for manual measurement of the
QRS onset and T offset points. The second class is for mix manual and automatic
measurement while the third class is for the fully automatic detection of the points
For this reason, Christov et al (2006) presented a dataset of manually
annotated QT intervals from the same PTB Diagnostic ECG Database. The ECG
database was given to four cardiologists and a biomedical engineer for manual
annotations of the QRS onset and the T offset for which the QRS onset and T offset
are manually marked by these referees for three rounds in order to reduce the errors
between their annotation and the averaged ones. For every recording, an ECG beat in
72
lead II with minimal baseline shift, noise and artifact is selected for manual marking
of these points.
Hence, the QT Interval algorithm developed by Malarvili (2004) is validated
on the PTB Diagnostic ECG Database made available by PhysioNet along with the
dataset of manually annotated QT intervals prepared by Christov et al (2006).
The 549 recordings from the database are downloaded from the PhysioNet
website. These files can only be read using the WFDB Software Package which is
also downloadable at PhysioNet. Each file is opened and saved with a new name,
where this new file only consists of the digital samples of the selected beat in lead II
as indicated in the annotation dataset. The QT interval measurement algorithm by
Malarvili (2004) is then executed on these files in MATLAB 6.5 environment. The
measurement errors with reference to the mean value in the dataset are calculated.
The signal along with the reference and measured points are plotted. The analysis
and discussions are brought forward in the following chapter.
CHAPTER 5
RESULTS, ANALYSIS AND DISCUSSION
5.0
Introduction
The experiments in determining the best anti-aliasing filter, power-line noise
removal filter and the validation of the QRS onset and T offset points detection
algorithm have been presented in chapter 4. The results, analyses and discussions
will be presented the next section. In both the analyses of the anti-aliasing filter and
the power line removal, the mean absolute error (MAE) and mean square error
(MSE) are exclusively utilized.
5.1
Mean Absolute Error and Mean Square Error
Throughout the analysis on the anti-aliasing filters and the power-line filter,
the mean absolute error (MAE) and mean square error (MSE) are utilized to measure
the errors between the original signal and the filtered one. These errors show the
level of distortion introduced by the filters themselves. This measure of distortion has
74
been implemented by most of the referring authors including Bazhyna et. al. (2003),
Bai et. al. (2003), Bai et. al. (2004), Hejjel (2004) and, Hejjel and Kellenyi (2005).
Equations 5.1 and 5.2 express the MAE and MSE respectively, where yi and
xi denote the filtered sample and the original sample respectively. n is the total
number of digitized samples in the recorded signal.
5.2
MAE =
1 n
∑ yi − xi
n i =1
(5.1)
MSE =
1 n
( yi − xi )2
∑
n i =1
(5.2)
The Anti-Aliasing Filter
The
schematic
integrated
design
of
the
twelve-lead
analogue
electrocardiogram signal conditioning system has been drawn and the design has
been implemented in a printed circuit board (PCB). The anti-aliasing filter schematic
has been drawn for an 8th order low pass filter with Sallen Key configuration. The
fabrication of the PCB has been done and all the components including the IC, the
resistors and capacitors have been assembled except for the components belonging to
that of the anti-aliasing filters. The result and analysis for the anti-aliasing filter
experiment determines the best filter for implementation on the ECG signal
conditioning board.
Table 5.1 and table 5.2 respectively list the mean absolute error and mean
square error of the filtered simulated ECG from the unfiltered simulated ECG. From
the tables, it can be seen that the errors are calculated for different simulated signals
with the six different filters as described in chapter four. For all the filters, the
75
average MAE and MSE are obtained. The high cut-off frequency rejection of the
filters, which is 100 Hz, is laid out in table 5.3.
Table 5.1: Averaged Mean Absolute Error for Anti-Aliasing Filter Design
1
2
3
4
5
6
7
8
9
10
File Extensions
Desription
Normal
_
Nodal
_nodal_
SVT
_svt_
Peds 1mV
_peds_1mV_
Peds 2mV
_peds_2mV_
Sq 2Hz 1mV
_sq2hz1mv_
Ventricular
_ventricular_
V. Tachy
_vtach_
RBBB
_rbbb_
LBBB
_lbbb_
TOTAL
AVERAGED MAE
bu2
4.55
4.30
4.60
2.98
4.81
6.09
4.16
5.45
2.82
4.57
44.33
4.43
be2
4.60
4.14
4.50
3.40
4.85
6.29
3.97
5.22
2.78
4.56
44.31
4.43
bu4
3.83
3.31
3.32
2.73
3.96
5.94
3.17
4.17
2.29
3.65
36.37
3.64
be4
2.36
3.75
5.28
2.63
4.08
8.10
3.25
4.18
2.59
4.36
40.57
4.06
bu8
3.84
3.39
3.12
2.77
3.91
6.44
3.09
3.70
2.41
3.37
36.04
3.60
be8
2.63
2.18
2.94
2.18
2.54
5.01
1.75
1.94
1.81
1.96
24.94
2.49
Table 5.2: Averaged Mean Square Error for Anti-Aliasing Filter Design
1
2
3
4
5
6
7
8
9
10
File Extensions
Desription
Normal
_
Nodal
_nodal_
SVT
_svt_
Peds 1mV
_peds_1mV_
Peds 2mV
_peds_2mV_
Sq 2Hz 1mV
_sq2hz1mv_
Ventricular
_ventricular_
V. Tachy
_vtach_
RBBB
_rbbb_
LBBB
_lbbb_
TOTAL
AVERAGED MSE
bu2
115.29
79.14
67.44
82.91
283.16
558.59
36.00
50.92
18.70
71.79
1363.93
136.39
be2
104.19
75.45
65.35
101.44
272.28
899.30
34.54
48.49
17.99
68.26
1687.29
168.73
bu4
75.81
46.59
32.73
44.59
155.23
452.64
22.24
31.25
12.80
43.95
917.83
91.78
be4
21.69
64.04
95.46
44.55
185.12
1632.90
22.57
31.79
15.53
64.07
2177.72
217.77
bu8
61.28
36.05
25.78
42.01
132.09
472.92
19.01
24.42
12.33
31.56
857.44
85.74
be8
17.77
11.55
21.58
13.32
31.08
298.96
7.65
8.74
7.84
9.20
427.69
42.77
Table 5.3: High Cut-Off Frequency Rejection in dB
Filters
Rejection, dB
bu2
-4.4
be2
-4.7
bu4
-5.6
be4
-5.8
bu8
-5.5
be8
-4.5
From tables 5.1 to 5.3, it is observed that the 8th order Bessel low pass filter
possesses the lowest averaged MAE and MSE of 2.49 and 42.77 quantization levels
respectively. This means that out of the six filters designed using the FilterPro
76
software, the 8th order Bessel low pass filter presents the least distorted ECG signal.
The cut-off frequency rejection for the filter which is 4.5 dB indicates that it
effectively rejects the stop band frequency as designed. The standard filter rejection
is expected to be 3 dB. Therefore the obtained rejection frequency is better than
expected.
Analog filters are known to introduce distortions in the pass band frequency
of signals besides truncating unwanted frequency components. The distortion is
caused by the non-linear phase response of the filter or known as the group delay.
Between the Butterworth and the Bessel low pass filter, the Bessel filter introduces
the most linear phase or flat group delay. Since the roll-off of the filter is not sharp, it
has to be implemented in higher order. For this reason, the 8th order Bessel filter is
implemented in the ECG analogue signal conditioning board and it has been proven
that the filter design for this filter attributes the least signal distortion for further
diagnosis on the ECG signals acquired.
5.3
The Power-Line Noise Removal
The PC software have been successfully programmed to retrieve data from
the USB data acquisition unit and the plotting of all the twelve ECG signals has been
effectively implemented in real-time without data lost between the receiving bulk
bytes from the data acquisition unit. The power line noise removal algorithm based
on the time-domain subtraction technique has also been programmed for every lead
in the software which enables real-time removal of the power line noise prior to the
plotting of the signals. This algorithm has been successfully implemented without
any data lost. The results for the comparison between the notch filter and the
implemented filter are analyzed and discussed in the paragraphs to follow.
77
Table 5.4 lists the MAE, MSE and the power line frequency rejection of both
the Twin-T notch filter and the filter using the time-domain subtraction technique.
The experiment has been carried out as described in chapter 4. The requirement for a
power line noise removal filter is that it has a high power line frequency rejection
and the output from the filter yields the least signal distortion. From the lists in table
5.4 it is obvious that the filter using the time-domain subtraction technique gives the
best power line frequency rejection along with the least MAE of 3.24 quantization
levels.
Power line noise is among the main problem in obtaining a noise free ECG
signal. Making it harder, the power line noise resides in the pass band frequency of
the ECG signal. Removing the power line frequency component from the signal is
similar to removing the frequency component of the actual signal itself which in turn
distorts the actual signal and therefore falsifying the detection of the ECG
parameters. Twin-T notch filter removes the power line frequency component along
with the frequency component of the ECG signal. Moreover, the Twin-T notch filter
also introduces abrupt phase shift around notch frequency of the filter adding more
distortions to the original ECG signal.
Table 5.4: MAE, MSE and Rejection (dB) of Notch Filter and TDS
R3
R4
90 kΩ
10 kΩ
80 kΩ
20 kΩ
70 kΩ
30 kΩ
60 kΩ
40 kΩ
50 kΩ
50 kΩ
40 kΩ
60 kΩ
30 kΩ
70 kΩ
20 kΩ
80 kΩ
10 kΩ
90 kΩ
7.5 kΩ 2.5 kΩ
5.0 kΩ 5.0 kΩ
2.5 kΩ 7.5 kΩ
Time Dom. Sub
MSE
868.52
723.27
551.17
432.69
418.37
213.63
124.28
117.01
69.67
103.65
54.30
35.28
71.70
MAE
10.76
10.03
8.50
7.59
7.90
5.85
4.46
4.85
4.28
4.78
3.83
4.09
3.24
Rejection (dB)
-22.9
-22.6
-24.4
-21.2
-21.3
-20.1
-19.5
-17.5
-13.4
-12.3
-10.3
-6.8
-57.3
78
On the other hand, the time-domain subtraction technique removes the power
line noise by subtracting the power line signal itself from the ECG signal. Initially,
the power line signal is extracted from the ECG signal before hand. Therefore, the
power line noise is removed or subtracted from the ECG signal similar to adding a
power line noise to a clean ECG signal. Therefore this does not remove the
frequency component of the ECG which also happens to be the frequency of the
power line noise. Therefore the time-domain subtraction technique with low
computational load, compared to other subtraction techniques, is adapted in the
development of the twelve-lead ECG system.
5.4
Validation of the QT points Detection
The final objective of the system developed is to produce a real-time QT
dispersion indexing software with the ability to monitor and record the QT dispersion
of a patient continuously. In order to achieve this, a reliable QT interval measuring
technique is essential prior to the derivation of the QT dispersion index. Malarvili
(2004) has developed a software which is able to automatically measure the QT
interval of all twelve ECG leads and calculate the QT dispersion of the signals.
Towards the end of her thesis, Malarvili (2004) suggested that the algorithm that she
adapted and modified must be validated on various standard international ECG
database. In conjunction with the QT Interval Challenge, part of the program in the
Computers in Cardiology Conference 2006, this thesis takes part indirectly so as to
validate the reliability of the automatic QT interval software which is to be merged
with the ECG system developed. The validation of the QT interval measurement is
carried out on the PTB Diagnostic ECG Database as described in the preceding
chapter utilizing the annotations prepared by Christov et al (2006).
Out of 549 ECG recordings, 300 recordings from patients with Myocardial
Infarction (MI) and 80 recordings of healthy controls are screened though the QT
79
interval detection algorithm. The rest of the recordings are not included as they are
from other categories of cardiac diseases that do not relate to the QT dispersion
analysis. The absolute error of the automatically measured points from the referred
points of the QRS onset and the T offset are calculated. For the QRS onset detection,
an error of more than 3 ms is considered to be a condition of false detection whereas
for T offset detection, error within a range up to 8 ms is considered to be true
detection. These limits are adapted from the differences between the values of the
referees and the median from the dataset of the manually measured QT intervals
(Christov et al, 2006). Table 5.5 shows part of the measured, referred and the
absolute errors of the detection of these two points. The complete listings can be
found in Appendix C. For the recordings from patients with MI, only 282 recordings
are presented as the omitted ones are not able to implement on the detection
algorithm due to processing error. This is due to the extreme noise presence in these
files. As for the healthy control only one file is omitted from analysis for the same
reason.
Table 5.5: Errors from the Q and T Detection Algorithm
No
1
2
3
4
5
6
7
8
9
11
12
13
14
15
16
17
18
19
20
Qmea
84
83
92
82
80
86
87
83
82
85
81
78
81
81
90
93
89
88
81
Tmea
196
190
196
168
171
169
172
152
177
184
196
169
152
170
172
173
173
184
181
Qref
81
81
81
81
81
81
81
81
81
81
81
81
81
81
81
81
81
81
81
Tref
185
187
191
170
173
166
172
150
158
161
178
165
173
170
172
173
174
187
185
ABS Q er
3
2
11
1
1
5
6
2
1
4
0
3
0
0
9
12
8
7
0
ABS T er
11
3
5
2
2
4
0
2
20
24
18
4
21
1
0
0
1
3
4
80
The summarized result of true detections is presented in table 5.6. The
performance analysis is done for the accuracy of the detection that is how accurate
the automated measurement is with respect to the manually annotated points.
Accuracy of detection is presented for individual Q point, T point and for both Q and
T points. From table 5.6, it can be observed that the QT interval measurement
algorithm works best for normal subjects as compared to patients with MI. Even
though, the accuracy is considered to be low. For the normal subjects, the accuracy
of the detection of QRS onset, T offset and both together is 55.7%, 78.48% and
46.84% respectively. The T offset detection is examined to be much higher than the
QRS onset detection for both MI and normal subjects.
Table 5.6: Accuracy of Q and T Detection Algorithm
Myocardial Infarction
Healthy Control
Combined
Q onset
37.94%
55.7%
41.83%
T offset
59.22%
78.48%
63.43%
Q and T
23.4%
46.84%
28.53%
The automated measurement method for QT interval is better for the group of
normal subject due to the typical morphology of these ECG signal. The same reason
applies to low detection accuracy within the normal group itself. Figure 5.1 shows a
typical ECG of a normal subject whereas figure 5.2 shows another ECG of a
different normal subject with a different Q wave. In the QT interval measurement
algorithm, the only two criteria of Q wave are defined, a typical Q wave as in figure
5.1 and a flat Q wave with no ‘valley’. However though, figure 5.2 shows a different
Q wave whose criteria are not defined in the algorithm. This explains the low
performance of the algorithm implemented on the PTB database for QRS onset
detection.
81
R
1200
1000
800
600
400
200
Qref
0
-200
-400
-600
40
50
60
70
80
Qmea
90
100
Figure 5.1: Typical ECG for Normal Subject from file 497
1200
R
1000
800
600
400
200
Qref
0
-200
-400
-600
Qmea
40
50
60
70
80
90
100
Figure 5.2 ECG for Normal Subject with Another form of Q wave. File 337 with
Q Error of 16ms
82
Figure 5.3 shows a recording from a healthy control with an accurate T offset
detection. An inaccurate T offset detection of a different normal subject is shown in
figure 5.4. As seen from this figure, the T wave is obvious but however the detection
of the T offset is inaccurate. The most appropriate reason for this is the threshold
setting for the algorithm is fine-tuned for the limited number of ECG data which is
acquired from Hospital Universiti Kebangsaan Malaysia (Malarvili, 2004). The
number of recordings under utilized is 22 patients with MI and 20 healthy controls
total up an ECG database of 42 recordings. If new ECG recordings were to be
introduced, the threshold setting for the T offset detection needs to be refine to
achieve the best detection performance.
R
-4500
-5000
-5500
Tref
-6000
Qref
-6500
Tmea
Qmea
90
100
110
120
130
140
150
160
170
Figure 5.3: Accurate Detection of T Offset on file 491
180
83
R
0
-500
-1000
Tref
Qref
-1500
Tmea
ea
-2000
90
100
110
120
130
140
150
160
170
180
Figure 5.4: Misdetection of T Offset on file 478 due to Threshold Setting
Other misdetection could be caused by low quality ECG signal caused by bad
preparation of the skin prior to recording. Signals which have the similar properties
as the one shown in figure 5.5 should be identified as disrupted and eliminated from
automatic measurement of the QT interval.
84
Tref
300
200
Qref
100
0
R
-100
-200
-300
-400
Tmea
-500
-600
0
50
Qmea
100
150
200
250
300
Figure 5.5: ECG File 337 with Motion Artifact.
If an analysis of a typical ECG from healthy control is found to be
disappointing, then it is expected that the analysis for patients with cardiac disorders
to be worst as shown in figure 5.6. Both QRS onset and T offset detection are not
accurately detected due to the bad ECG morphology of an ailing heart. Non-typical R
wave is also observed in this recording. Figure 5.7 shows another ECG recording
from a patient with MI. The morphology of the ECG wave is totally different from
the previous ones. If one were to examine carefully, the algorithm is able to detect
close to the reference Q and T locations except that it is not accurate enough.
85
1000
Tref
800
R
600
Qref
400
200
Tmea
0
-200
0
50
Qmea
100
150
200
250
300
Figure 5.6: ECG File 48 with MI with noise and different morphology
200
Qref
0
Tref
-200
-400
R
-600
Tmea
-800
Qmea
-1000
-1200
-1400
0
50
100
150
200
250
Figure 5.7: ECG File 1 with another different morphology
300
86
Figure 5.8 shows an ECG signal with a split R wave. The algorithm falsely
detects the R wave as a Q wave. In this case, the R peak detection fails to
differentiate a normal R wave and a split R wave.
4800
Tref
R
4600
Qref
4400
Qmea
4200
4000
Tmea
3800
3600
3400
3200
0
50
100
150
200
250
300
Figure 5.8: ECG File 86 of MI Patient with ‘Bad’ QRS Complex
Laguna et al (1990) have validated the algorithm, which they had proposed,
on 18 ECG recordings. The ECG recordings were manually measured by two
experts. It is reported that the error from the proposed technique were within 14.4 ms
after rejecting the maximum and minimum QT interval in 5 beats. The error is
considered to be acceptable and comparable to manual measurement. Malarvili
(2004) adapted the technique, along with modifications to ensure reliable QRS
complex detection, and sets the threshold to suit the database collected from Hospital
Kebangsaan Univerisiti Malaysia (HUKM). However Malarvili (2004) only focuses
on the final QT dispersion of the patients indexing in relating it with the MI.
Therefore towards the end, Malarvili (2004) suggested that further work has to be
done so as to validate the detection of the QRS onset and T offset points on standard
ECG database such as the MIT/BIH, CSE and AHA. With this motivation along with
87
the QT interval challenge carried out by Computers in Cardiology Conference
(2006), this works validates the algorithm adapted and modified by Malarvili (2004)
on the PTB Diagnostic ECG Database.
Low performance of the QT interval measurement algorithm is reported in
the previous paragraphs. Two criteria of Q wave have been considered in the
algorithm whereas four criteria are defined for the T wave. This explains why the T
offset detection is better off than the QRS onset detection. More Q wave criteria need
to be listed in the algorithm for better QRS onset detection. In addition, the threshold
setting for the QRS onset and T offset defined in the algorithm have been set for the
42 patients from HUKM. Therefore, new universal threshold values need to be
updated for a growing ECG database. Various QRS morphology also contributes to
inaccurate detection of these points. Therefore, a better detection algorithm of R
wave for a variety of QRS morphology needs to be put at the front end prior to the
QT interval measurement algorithm for better detection of these significant points.
CHAPTER 6
CONCLUSION AND FUTURE WORKS
6.0
Introduction
The main objective of the research work is to develop a twelve-lead
electrocardiogram system to complement the QTd measurement software developed
by Malarvili (2004). This integration is useful in assisting the cardiologists to
perform the QTd measurement automatically in the effort to discriminate normal
subjects from patients with MI. The challenge of this research is to achieve an
electrocardiogram system which best represents the actual signal that is with minimal
distortion. Moreover, it is also crucial for validation of an automatic system with
manual conventional systems so as to avoid wrong diagnosis which would lead to
erroneous prescriptions of medicine. Experiments have been carried out and the
results have been discussed in previous chapters. The following sections will
conclude the whole work being carried out followed by suggestions for future works
in the same field.
89
6.1
Conclusions
A complete twelve-lead electrocardiogram recording system has been
successfully built. The construction of the system starts off by building a data
acquisition system of twelve channels with sampling frequency of 500 Hz per
channel. The main components of the designed data acquisition system consist of the
analogue multiplexer, 12-bit analogue-to-digital (ADC) converter, the USB interface
and the microcontroller. The timing control of the ADC and USB interface chip is
important in ensuring equally distributed sampling intervals to achieve the desired
sampling rate accurately. Plotting of the signals in the software and power-line noise
removal is executed in real-time. This data acquisition is then used as a tool to
develop
and
experiment
with
the
signal
conditioning
circuits
for
the
electrocardiogram.
A study on the effect of anti-aliasing filter is carried out. The types of filter
tested are the Butterworth and Bessel filter. From the analysis, it is found that an 8th
order Bessel low pass filter performs best with minimal distortion and at the same
time removes the frequencies above the cut-off. The following study is carried out to
determine the performance of the power-line noise filter using the time-domain
subtraction technique as compared to the common notch filter. The challenge in
filtering the power-line noise is to remove the noise itself without removing the
frequency component of the ECG signal in which both are of similar frequencies.
Result shows that the time-domain subtraction technique is not only an excellent
power-line noise rejection, it also introduces the least distortion as compared to the
notch filters of different bandwidth. Following this result, the time-domain technique
is programmed into the data acquisition software and real-time power-line removal
of the noise has been achieved.
As suggested by Malarvili (2004) together with organizing of the QT Interval
Challenge 2006 by Physionet and CinC, validation of the algorithm for automatic
90
measurement of QT interval is carried out on the PTB Diagnostic ECG Database.
The annotations of the QRS onset and T offset points have been prepared by four
cardiologists and one biomedical engineer and in order to narrow the deviations
between the expertises, the annotation were made in three consecutive rounds.
(Christov et. al., 2006). 283 recordings of patients with MI and 79 recordings of
normal subjects are selected for the validation of the algorithm. Even though the
results show poor detection of the QRS onsets and the T offsets in terms of detection
accuracy that is 28.3%, the located points are within the area of the reference points.
The inaccuracy might be caused by the threshold setting of the algorithm where it has
been set based on a small number of patients. Other cause is the lack of criteria of the
electrocardiogram waves and morphology that is considered in the algorithm.
Typical electrocardiogram signals pass the validation test but it is not only the typical
signals that are looked at, patients with various cardiac diseases produce various
defects of the typical signal. However, this thesis does not deny the effectiveness of
the algorithm for typical ECG signal. It is emphasized that there is no single
algorithm that can solve all problems but there is a necessity to combine the
algorithm with other algorithms which works well for non-typical ECG signals in
order to produce an all-rounder solution system.
6.2
Future Works
There are always rooms for improvement and therefore suggestions are
essential in order to achieve a better performance. The suggestions for future works
are described in the following paragraphs.
91
6.2.1
Low Power Analog Front End (AFE)
This work has successfully integrated appropriate circuits to form a twelvelead ECG signal conditioning system. However, the resistors and capacitors count
reaches hundreds and the same goes for the integrated chips utilized. This has
resulted in a big-sized PCB which is bulky and it is also power consuming.
Therefore it is appropriate to suggest that these repeating circuits are
fabricated in a one chip design. This is known as the analogue front-end (AFE) chip.
This AFE can reduce the total power consumption of the system and would allow the
system to be powered only from the USB port of the PC. In order to achieve this,
careful steps need to be taken in the design so as not to reduce the CMRR of the AFE
which degrades the quality of the ECG signal.
6.2.2
ECG Morphology Detection Algorithm
It has been shown that the QT interval measuring algorithm does not perform
well for all ECG morphology. Different cardiac conditions produce different ECG
morphology. Therefore, for the algorithm to work at high performance, it is required
to eliminate signals and cardiac cycles that differ from the typical morphology. As a
result, the system will not give wrong measurement of the QT interval and the QT
dispersion but instead gives error messages from the system.
92
6.2.3
QT Measurement Algorithm for Non-Typical ECG
QT dispersion measurement has been related to patients with MI (Malarvili,
2004). However patient’s ECG morphology varies from one patient to another. A
non-typical ECG signal of an MI patient is significant in the effort to save life and its
QT dispersion measurement is as important. Therefore, an algorithm for the
measurement of the QT interval of a subject with non-typical ECG signal is essential.
It is suggested that this algorithm to be executed after the detection of the
morphologies of the ECG signals. In addition, more criteria of various ECG signal
needs to be considered in the algorithm in order to widen the range of computable
signals.
6.2.4
Malaysian ECG Database
Standard ECG databases such as the AHA, CSE, MIT-BIH and PTB are
commonly used by those who do signal processing and pattern in order to assist
cardiologists in a way providing automatic and repetitive measurements ECG
parameters and classification of cardiac diseases. These database however, are a few
years old and are static and stay as it is and therefore, no new ECG recordings are
added to them. Thus, it is important for Malaysia to have its own ECG database
which is dynamic and grows from time to time. An advantage is that parameters such
as threshold and weight values can be updated from time to time making the
automated system robust to a wide of ECG signals and morphologies. Moreover, a
Malaysian ECG database can be an asset for researchers to go deeper into developing
its own ECG system.
93
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Burr Brown
Alberti, M., Merri, M., Benhorin, J., Locati, E. and Moss, A. J. (1991).
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patients with long QT syndrome. Computers in Cardiology. 475 – 478
Bai, Y. W., Cheng, C. Y., Lu, C. K., Huang, C. H., Chen, Y. T. and Lin Y. N. (2003).
Adjustable 60 Hz Noise Reduction and ECG Signal Amplification of a Remote
Electrocardiogram System. IEEE Instrumentation and Measurement Technology
Conference. 1: 197 – 202
Bai, Y. W., Chu, W. Y., Chen, C. Y., Lee, Y. T., Tsai, Y. C. and Tsai, C. H. (2004).
Adjustable 60Hz Noise Reduction by a Notch Filter for ECG Signals. IEEE
Instrumentation and Measurement Technology Conference. 3: 1706 – 1711
Bazhyna, A., Christov, I. I., Gotchev, A., Daskalov, I. K. and Egiazarian, K. (2003).
Powerline Interference Suppression in High Resolution ECG. Computers in
Cardiology Conference. September 21 – 24. 30: 561 – 564
Carr, J. J. and Brown, J. M. (2000). Introduction to Biomedical Equipment and
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Christov, I., Dotsinsky, I., Simova, I., Prokopova, R., Trendafilova, E. and
Naydenov, S. (2006). Dataset of Manually Measured QT Intervals in the
Electrocardiogram. Biomedical Engineering Online. 5(31): 1 – 8
Daskalov, I., Christov, I. and Dotsinsky, I. (1997). Low Frequency Distortions of the
Electrocardiogram. Medical and Engineering. Physics. 19 (44): 387 – 393
Degen, T. and Jackel, H. (2004). Enhancing Interference Rejection of Preamplified
Electrodes by Automated Gain Adaption, IEEE Trans. On Biomedical
Engineering. November. 51(11): 2031 – 2039
Desel, T., Reichel, T., Rudischhauser, S. and Hauer, H. (1996). A CMOS Nine
Channel ECG Measurement IC. 2nd International Conference on ASIC, IEEE.
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DLP-USB245M (2002). USB to FIFO Parallel Interface Module User Manual. DLP
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Ferrero, A. (1990). Software for Personal Instrumentations. IEEE Transaction on
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FTD2XX (2002). Programmers Guide v2.01. Future Technology Devices
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Hejjel, L. (2004). Suppression of Powerline Interference by Analog Notch Filtering
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Hejjel, L. and Kellenyi, L. (2005). The Corner Frequencies of the ECG Amplifier for
Heart Rate Variability Analysis. Physiological Measurement Conference.
26(1): 39 – 47
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Hovenga, E. J. S., Kidd, M. R. and Cesnik, B. (1996). Health Informatics: An
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Malarvili Bala Krishnan (2004). Development of QT Dispersion Algorithm as an
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Webster, J. G. (1998). Medical Instrumentation: Application and Design. 3rd Edition.
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Ziarani, A. K. and Konrad, A. (2002). A Nonlinear Adaptive Method of Elimination
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97
APPENDIX A
SCHEMATIC/PIN ASSIGNMENTS OF USB DATA ACQUISITION UNIT
AND SOURCE CODE
1
2
3
4
A
A
J17
IN01
IN02
1
2
IN0102
J19
1
2
IN0304
J21
1
2
IN0506
J22
B
1
2
IN0708
J23
1
2
IN0910
J24
1
2
IN1112
J25
1
2
IN1314
J26
C
1
2
IN03
IN04
IN05
IN06
IN07
IN08
IN09
IN10
IN11
IN12
IN13
IN14
25
26
IN01
IN02
IN03
IN04
IN05
IN06
IN07
IN08
IN09
IN10
IN11
IN12
IN13
IN14
IN15
IN16
M_A0
M_A1
M_A2
M_A3
19
20
21
22
23
24
25
26
11
10
9
8
7
6
5
4
17
16
15
14
18
AD_RC
U11
IN 1
IN 2
IN 3
IN 4
IN 5
IN 6
IN 7
IN 8
IN 9
IN 10
IN 11
IN 12
IN 13
IN 14
IN 15
IN 16
A0
A1
A2
A3
EN
OUT
NC
NC
V REF
+V
-V
1
27
R2in
PDN
REFD
22
R/C
1
3
+5Vs
AGND
D0
D1
D2
D3
D4
D5
D6
D7
SB/BTC
TAG
23
8
AD_BYT 21
-12Vs
SDA
BUSY
DCLK
IN R1
IN R2
7
20
+12Vs
+V
+VD
CS
EXT/INT
BYTE
14
2
6
DGND
AGND1
AGND2
REF
CAP
ADS7806P
R12
AGND
+5Vs
27
28
+ C33
100n
19
24
18
AD_BSY
17
16
15
13
12
11
10
9
USB_D0
USB_D1
USB_D2
USB_D3
USB_D4
USB_D5
USB_D6
USB_D7
5
4
REF
CAP
GND
R2in
R10
100R
+ C34
10u
R11
33.2k
CAP
+ C35
2.2u
R14
+5Vs
50k
+5Vs
R15
50k
R13
REF
B
1M
+ C36
2.2u
GND
GND
+5Vs -12VsMPC506AP(28)
C28
100n
Vin R9
200R
28
2
3
13
U12
AGND
12
+12Vs
C29
100n
IN15
IN16
R16
10k M_A2
M_A3
IN1516
USB_D0
USB_D1
USB_D2
USB_D3
USB_D4
USB_D5
USB_D6
USB_D7
+5Vs
AD_RC
AD_BYT
USB_SND
USB_WR
1
2
3
4
5
6
7
8
9
U13
RA2
RA1
RA3
RA0
RA4/T0CKIOSC1/CLKIN
MCLR OSC2/CLKOUT
VSS
VDD
RB0/INT
RB7
RB1
RB6
RB2
RB5
RB3
RB4
+5Vs
18
17
16
15
14
13
12
11
10
M_A1
M_A0
Y2
20MHz
C37
22p
C38
22p
24
23
22
21
20
19
18
17
16
USB_WR 15
USB_TE 14
13
U14
D0
BID
D1
D2
RST
D3
RS0
D4
D5
3V3
D6
D7
SLP
RD
SND
WR
VIO
TXE EXT
RXF PVCC
1
3
4
VCC
6
8
9
10
11
12
C
USB_SND
VCC
DLP-USB245M
PIC16C84A
Title
D
D
SCHEMATIC/PIN ASSIGNMENT USB DAQ UNIT
Size
Number
Revision
A4
Date:
File:
1
2
3
12/19/2006
G:\MyDocuments\..\16 Chan DAQ.Sch
Sheet of
Drawn By: MOHD NAJEB JAMALUDIN
4
99
Title "12-Channel ADC via USB Port"
; ************************************************************************
; **
**
; ** With 20 MHz clock internally divided by 4 to give a 200ns cycle
**
; ** time
**
; **
**
; ** Hardware Notes:
**
; ** PIC16F84A Running at 20 MHz
**
; ** _MCLR is Pulled Up though 10K
**
; ** PORTA[0] is MUX_A0
; Analog MUX Digital Control
**
; ** PORTA[1] is MUX_A1
**
; ** PORTA[2] is MUX_A2
**
; ** PORTA[3] is MUX_A3
**
; ** PORTA[4] is BUF_SELECT
**
; **
**
; ** PORTB[7] is DT_BYT_SEL
**
; ** PORTB[6] is DT_INF_SEL
**
; ** PORTB[5] is USB_SND
; FT245 Send Immediate Pin
**
; ** PORTB[4] is USB_WR
; FT245 Write to Buffer
**
; ** PORTB[3] is USB_TE
; FT245 Transmit Buffer Empty
**
; ** PORTB[2] is ADC_BYTE
; ADC High\Low Byte Select
**
; ** PORTB[1] is ADC_BUSY
; ADC Conversion Busy
**
; ** PORTB[0] is ADC_RC
; ADC Read\Convert
**
; **
**
; ** Mohd Najeb 10-20-2004
**
; **
**
; **
**
; ************************************************************************
LIST R=DEC
#ifdef __16F84A
#include "p16f84A.inc"
__CONFIG _CP_OFF & _XT_OSC & _PWRTE_ON
#define REG_START
0x0c
#endif
#define ADC_RC
#define ADC_BYTE
PORTB,0
PORTB,1
& _WDT_OFF
; o
; o
#define USB_SND
#define USB_WR
PORTB,2
PORTB,3
; o
; o
#define
#define
#define
#define
PORTA,0
PORTA,1
PORTA,2
PORTA,3
; o
MUX_A0
MUX_A1
MUX_A2
MUX_A3
#define SELECT_ADC_DATA
#define SELECT_DATA_INFO
0x10
0x00
#define
#define
0x00
0x04
ADC_MSB
ADC_LSB
; Variables
CBLOCK REG_START
; start Variables
_w, _status
; Interrupt context save/restore
ByteData, BitCount
; Variables for RS-232
Buffer:20
; 20 byte buffer
Delay, Delay2,Delay3,Delay4 ; Delay Count
Temp
; Current Command
Scratch
; only accessed by RS-232 port
Count
; Number of bytes to transfer
MuxTemp
; High level counter
MuxCount
; Inc Count Mux Selection
DataTemp
; Temporary Mux Manipulation
ENDC
SND_Strobe MACRO
bsf
USB_SND
bcf
USB_SND
ENDM
DataByte_H_Strobe MACRO
bcf
ADC_BYTE
bcf
USB_WR
bsf
USB_WR
ENDM
;
Strobe the Data Bit
; Send All That is in the USB FIFO
; Positive Edge Trigger
;
Strobe the Data Bit
; Send MUX and High Byte Info to USB FIFO
100
DataByte_L_Strobe MACRO
bsf
ADC_BYTE
bcf
USB_WR
bsf
USB_WR
ENDM
;
;
;
;
;
;
Strobe the Data Bit
; Send MUX and High Byte Info to USB FIFO
************************************************************************
**
**
**
Reset Handler
**
**
**
************************************************************************
org
0
; Pic Reset
Init:
goto Start
;
;
;
;
;
************************************************************************
**
**
**
Main Program
**
**
**
************************************************************************
Start:
; Set port directions
bsf
STATUS, RP0
bcf
ADC_RC
bcf
ADC_BYTE
bcf
USB_WR
bcf
USB_SND
bcf
MUX_A0
bcf
MUX_A1
bcf
MUX_A2
bcf
MUX_A3
movf
OPTION_REG,w
iorlw 0x080
movwf OPTION_REG
bcf
STATUS, RP0
; Set port default values
bsf
ADC_RC
bcf
ADC_BYTE
bsf
USB_WR
bcf
USB_SND
bcf
MUX_A0
bcf
MUX_A1
bcf
MUX_A2
bcf
MUX_A3
;
;
;
;
;
;
;
;
Select
Enable
Enable
Enable
;
Enable
Enable
Enable
Enable
Bank 1
ADC_RC for Output
ADC_BYTE for Output
USB_WR for Output
Enable USB_SND for Output
MUX_A0 for Output
MUX_A1 for Output
MUX_A2 for Output
MUX_A3 for Output
; Select Bank 0
;
;
;
;
;
Puts R/c in READ State
Select MSB on ADC Output
Set High to Generate Negative Edge Later
Set Low to Generate Positive Edge Later
Select Channel 1 as initiation
MuxMap:
movlw 0x02
; Select channel 2 first as the previous conversion
call
Sample ; (i.e. channel 1 will be the first written in the USB
; buffer
movlw 0x03
call
Sample ; Converts analog to digital data and writes 12-bit to
; USB buffer
movlw 0x04
call
Sample
movlw 0x05
call
Sample
movlw 0x06
call
Sample
movlw 0x07
call
Sample
movlw 0x08
call
Sample
movlw 0x09
call
Sample
movlw 0x0A
call
Sample
101
movlw 0x0B
call
Sample
movlw 0x00
call
Sample
movlw 0x01
; CHANNEL 1
call
Sample ; Sample ADC and Write to USB FIFO Data Info & ADC Data
SND_Strobe
; Instruct FT245 to send 24 byte data without waiting
; the buffer to be full at 64 bytes
call
Delay500Hz
; Delay added to achieve a total of 2ms sampling
; cycle i.e 500Hz sampling rate
goto
MuxMap
; ************************************************************************
; **
**
; ** Sample
**
; **
This function start AD conversion, strobe previous high and low
**
; **
byte and call fixed ADC delay
**
; **
**
; ************************************************************************
Sample
bcf
ADC_RC
bsf
ADC_RC
; Read High Byte From ADC
nop
nop
nop
nop
nop
DataByte_H_Strobe
; Read Low Byte From ADC (15cc / 3us after High Byte)
nop
nop
nop
nop
nop
DataByte_L_Strobe
movwf PORTA
call
Delay_ADC_RC ; call fix delay instead of polling for
; BUSY pin or interrupt to ensure
; distributed timing for all channels
return
; ************************************************************************
; **
**
; ** Delay_ADC_RC
**
; **
This function returns after 25us(includes call time)
**
; **
Assumes 20MHz clock
**
; **
**
; ************************************************************************
Delay_ADC_RC:
; 2 cycles for call
movlw 31
movwf Delay
decfsz Delay,f
; 3 states per loop (2 states on exit of loop)
goto $-1
; 3*(Delay-1)+2 cycles
return
; 2 cycles for return makes 5 200ns cycles = 1us
; ************************************************************************
; **
**
; ** Delay500Hz:
**
; **
Assumes 20MHz clock
**
; **
**
; ************************************************************************
Delay500Hz
call
Delay1ms
call
Delay100us
call
Delay100us
call
Delay100us
call
Delay100us
call
Delay100us
call
Delay100us
call
Delay100us
return
end
102
APPENDIX B
ADS7806 AND DLP-USB245M TIMING DIAGRAM
ADS7806
®
Low-Power 12-Bit Sampling CMOS
ANALOG-to-DIGITAL CONVERTER
FEATURES
DESCRIPTION
l 35mW max POWER DISSIPATION
l 50µW POWER DOWN MODE
l 25µs max ACQUISITION AND
CONVERSION
l ±1/2LSB max INL AND DNL
l 72dB min SINAD WITH 1kHz INPUT
l ±10V, 0V TO +5V, AND 0V TO +4V INPUT
RANGES
The ADS7806 is a low-power 12-bit sampling analogto-digital using state-of-the-art CMOS structures. It
contains a complete 12-bit, capacitor-based, SAR A/D
with S/H, clock, reference, and microprocessor interface with parallel and serial output drivers.
The ADS7806 can acquire and convert to full 12-bit
accuracy in 25µs max while consuming only 35mW
max. Laser-trimmed scaling resistors provide standard
industrial input ranges of ±10V and 0V to +5V. In
addition, a 0V to +4V range allows development of
complete single supply systems.
The 28-pin ADS7806 is available in a plastic 0.3" DIP
and in an SOIC, both fully specified for operation over
the industrial –40°C to +85°C temperature range.
l
l
l
l
SINGLE +5V SUPPLY OPERATION
PARALLEL AND SERIAL DATA OUTPUT
PIN-COMPATIBLE WITH 16-BIT ADS7807
USES INTERNAL OR EXTERNAL
REFERENCE
l 28-PIN 0.3" PLASTIC DIP AND SOIC
Clock
R/C
CS
BYTE
Power
Down
Successive Approximation Register and Control Logic
40kΩ
CDAC
R1IN
BUSY
Parallel
R2IN
10kΩ
20kΩ
40kΩ
Serial Data
Clock
and
Comparator
Serial
Serial Data
Data
CAP
Out
Buffer
REF
6kΩ
8
Internal
+2.5V Ref
Parallel Data
Reference
Power
Down
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©
1992 Burr-Brown Corporation
PDS-1158C
Printed in U.S.A. November, 1994
BASIC OPERATION
output valid data from the previous conversion on SDATA
(pin 19) synchronized to 12 clock pulses output on
DATACLK (pin 18). BUSY (pin 24) will go LOW and stay
LOW until the conversion is completed and the serial data
has been transmitted. Data will be output in Binary Two’s
Complement format, MSB first, and will be valid on both the
rising and falling edges of the data clock. BUSY going
HIGH can be used to latch the data. All convert commands
will be ignored while BUSY is LOW.
PARALLEL OUTPUT
Figure 1a) shows a basic circuit to operate the ADS7806
with a ±10V input range and parallel output. Taking R/C
(pin 22) LOW for 40ns (12µs max) will initiate a conversion. BUSY (pin 24) will go LOW and stay LOW until the
conversion is completed and the output register is updated.
If BYTE (pin 21) is LOW, the 8 most significant bits will be
valid when BUSY rises; if BYTE is HIGH, the 4 least
significant bits will be valid when BUSY rises. Data will be
output in Binary Two’s Complement format. BUSY going
HIGH can be used to latch the data. After the first byte has
been read, BYTE can be toggled allowing the remaining
byte to be read. All convert commands will be ignored while
BUSY is LOW.
The ADS7806 will begin tracking the input signal at the end
of the conversion. Allowing 25µs between convert commands assures accurate acquisition of a new signal.
The offset and gain are adjusted internally to allow external
trimming with a single supply. The external resistors compensate for this adjustment and can be left out if the offset
and gain will be corrected in software (refer to the Calibration section).
The ADS7806 will begin tracking the input signal at the end
of the conversion. Allowing 25µs between convert commands assures accurate acquisition of a new signal.
STARTING A CONVERSION
The offset and gain are adjusted internally to allow external
trimming with a single supply. The external resistors compensate for this adjustment and can be left out if the offset
and gain will be corrected in software (refer to the Calibration section).
The combination of CS (pin 23) and R/C (pin 22) LOW for
a minimum of 40ns immediately puts the sample/hold of the
ADS7806 in the hold state and starts conversion ‘n’. BUSY
(pin 24) will go LOW and stay LOW until conversion ‘n’ is
completed and the internal output register has been updated.
All new convert commands during BUSY LOW will be
ignored. CS and/or R/C must go HIGH before BUSY goes
HIGH or a new conversion will be initiated without sufficient time to acquire a new signal.
SERIAL OUTPUT
Figure 1b) shows a basic circuit to operate the ADS7806
with a ±10V input range and serial output. Taking R/C (pin
22) LOW for 40ns (12µs max) will initiate a conversion and
Serial Output
Parallel Output
200Ω
200Ω
±10V
1
28
2
27
3
26
4
2.2µF
+ 5
25
66.5kΩ
100Ω
2.2µF
+5V
+
21
9
20
10
19
11
18
12
17
13
16
Pin 21 B11 B10
LOW (MSB)
B9
Pin 21
HIGH
B1
B3
B2
B8
B7
B0 LOW
(LSB)
100Ω
BUSY
Convert Pulse
2.2µF
R/C
22
8
14
+5V
23
ADS7806
±10V
+5V
66.5kΩ
24
6
7
0.1µF 10µF
+
+
+
2.2µF
+
BYTE
NC(1)
27
3
26
4
25
5
24
6
23
15
B4
LOW LOW LOW
ADS7806
0.1µF 10µF
+
+
21
9
20
NC(1) 10
19
NC(1) 11
18
NC(1) 12
17 NC(1)
NC(1) 13
16 NC(1)
14
15 NC(1)
+5V
BUSY
Convert Pulse
R/C
22
8
NC(1)
B5
28
2
7
40ns min
B6
1
40ns min
SDATA
DATACLK
NOTE: (1) These pins should be left
unconnected.They will be active when
R/C is HIGH.
NOTE: (1) SDATA (pin 19) is always active.
FIGURE 1b. Basic ±10V Operation with Serial Output.
FIGURE 1a. Basic ±10V Operation, both Parallel and Serial
Output.
®
7
ADS7806
The ADS7806 will begin tracking the input signal at the end
of the conversion. Allowing 25µs between convert commands assures accurate acquisition of a new signal. Refer to
Tables III and IV for a summary of CS, R/C, and BUSY
states and Figures 2 through 6 for timing diagrams.
CS
R/C
BUSY
1
X
X
None. Databus is in Hi-Z state.
↓
0
1
Initiates conversion “n”. Databus remains
in Hi-Z state.
0
↓
1
Initiates conversion “n”. Databus enters Hi-Z
state.
0
1
↑
Conversion “n” completed. Valid data from
conversion “n” on the databus.
↓
1
1
Enables databus with valid data from
conversion “n”.
↓
1
0
Enables databus with valid data from
conversion “n-1”(1). Conversion n in progress.
0
↑
0
Enables databus with valid data from
conversion “n-1”(1). Conversion “n” in progress.
0
0
↑
New conversion initiated without acquisition
of a new signal. Data will be invalid. CS and/or
R/C must be HIGH when BUSY goes HIGH.
X
X
0
New convert commands ignored. Conversion
“n” in progress.
CS and R/C are internally OR’ d and level triggered. There
is not a requirement which input goes LOW first when
initiating a conversion. If, however, it is critical that CS or
R/C initiates conversion ‘n’ , be sure the less critical input is
LOW at least 10ns prior to the initiating input. If EXT/INT
(pin 8) is LOW when initiating conversion ‘n’ , serial data
from conversion ‘n-1’ will be output on SDATA (pin 19)
following the start of conversion ‘n’ . See Internal Data
Clock in the Reading Data section.
OPERATION
To reduce the number of control pins, CS can be tied LOW
using R/C to control the read and convert modes. This will
have no effect when using the internal data clock in the serial
output mode. However, the parallel output and the serial
output (only when using an external data clock) will be
affected whenever R/C goes HIGH. Refer to the Reading
Data section.
READING DATA
The ADS7806 outputs serial or parallel data in Straight
Binary or Binary Two’ s Complement data output format. If
SB/BTC (pin 7) is HIGH, the output will be in SB format,
and if LOW, the output will be in BTC format. Refer to
Table V for ideal output codes.
NOTE: (1) See Figures 2 and 3 for constraints on data valid from
conversion “n-1”.
The parallel output can be read without affecting the internal
output registers; however, reading the data through the serial
Table III. Control Functions When Using Parallel Output
(DATACLK tied LOW, EXT/INT tied HIGH).
CS
R/C
BUSY
EXT/INT
DATACLK
↓
0
1
0
Output
0
↓
1
0
Output
↓
0
1
1
Input
OPERATION
Initiates conversion “n”. Valid data from conversion “n-1” clocked out on SDATA.
Initiates conversion “n”. Valid data from conversion “n-1” clocked out on SDATA.
Initiates conversion “n”. Internal clock still runs conversion process.
0
↓
1
1
Input
Initiates conversion “n”. Internal clock still runs conversion process.
↓
1
1
1
Input
Conversion “n” completed. Valid data from conversion “n” clocked out on SDATA synchronized
to external data clock.
↓
1
0
1
Input
Valid data from conversion “n-1” output on SDATA synchronized to external data clock.
Conversion “n” in progress.
0
↑
0
1
Input
Valid data from conversion “n-1” output on SDATA synchronized to external data clock.
Conversion “n” in progress.
0
0
↑
X
X
New conversion initiated without acquisition of a new signal. Data will be invalid. CS and/or R/C
must be HIGH when BUSY goes HIGH.
X
X
0
X
X
New convert commands ignored. Conversion “n” in progress.
NOTE: (1) See Figures 4, 5, and 6 for constraints on data valid from conversion “n-1”.
Table IV. Control Functions When Using Serial Output.
DESCRIPTION
ANALOG INPUT
±10
4.88mV
Full-Scale Range
Least Significant Bit (LSB)
0V to 5V
1.22mV
0V to 4V
976µV
DIGITAL OUTPUT
BINARY TWO’S COMPLEMENT
STRAIGHT BINARY
(SB/BTC LOW)
(SB/BTC HIGH)
HEX
+Full Scale (FS – 1LSB)
CODE
HEX
BINARY CODE
CODE
9.99512V
4.99878V
3.999024V
0111 1111 1111 1111
7FF
1111 1111 1111 1111
FFF
0V
2.5V
2V
0000 0000 0000 0000
000
1000 0000 0000 0000
800
–4.88mV
2.49878V
1.999024V
1111 1111 1111 1111
FFF
0111 1111 1111 1111
7FF
–10V
0V
0V
1000 0000 0000 0000
800
0000 0000 0000 0000
000
Midscale
One LSB Below Midscale
BINARY CODE
–Full Scale
Table V. Output Codes and Ideal Input Voltages.
®
ADS7806
8
PARALLEL OUTPUT (After a Conversion)
After conversion ‘n’ is completed and the output registers
have been updated, BUSY (pin 24) will go HIGH. Valid data
from conversion ‘n’ will be available on D7-D0 (pins 9-13
and 15-17). BUSY going high can be used to latch the data.
Refer to Table VI and Figures 2 and 3 for timing constraints.
port will shift the internal output registers one bit per data
clock pulse. As a result, data can be read on the parallel port
prior to reading the same data on the serial port, but data
cannot be read through the serial port prior to reading the
same data on the parallel port.
PARALLEL OUTPUT
PARALLEL OUTPUT (During a Conversion)
After conversion ‘n’ has been initiated, valid data from
conversion ‘n-1’ can be read and will be valid up to 12µs
after the start of conversion ‘n’ . Do not attempt to read data
beyond 12µs after the start of conversion ‘n’ until BUSY
(pin 24) goes HIGH; this may result in reading invalid data.
Refer to Table VI and Figures 2 and 3 for timing constraints.
To use the parallel output, tie EXT/INT (pin 8) HIGH and
DATACLK (pin 18) LOW. SDATA (pin 19) should be left
unconnected. The parallel output will be active when R/C
(pin 22) is HIGH and CS (pin 23) is LOW. Any other
combination of CS and R/C will tri-state the parallel output.
Valid conversion data can be read in two 8-bit bytes on D7D0 (pins 9-13 and 15-17) . When BYTE (pin 21) is LOW,
the 8 most significant bits will be valid with the MSB on D7.
When BYTE is HIGH, the 4 least significant bits will be
valid with the LSB on D4. BYTE can be toggled to read both
bytes within one conversion cycle.
Upon initial power up, the parallel output will contain
indeterminate data.
t1
t1
R/C
t3
t3
t4
BUSY
t5
t6
t6
MODE
t7
Convert
Acquire
t12
Parallel
Data Bus
Previous
High Byte Valid
t8
Acquire
t12
t11
Previous High
Byte Valid
Hi-Z
Convert
t10
Previous Low
Byte Valid
Not Valid
Low Byte
Valid
High Byte
Valid
High Byte
Valid
t9
t2
t12
t12
t9
Hi-Z
t12
t12
BYTE
FIGURE 2. Conversion Timing with Parallel Output (CS and DATACLK tied LOW, EXT/INT tied HIGH).
t21
t21
t21
t21
t21
t21
t21
t21
t21
t21
R/C
t1
CS
t3
BUSY
t4
BYTE
DATA
BUS
Hi-Z State
High Byte
t12
Hi-Z State
t9
Low Byte
t12
Hi-Z State
t9
FIGURE 3. Using CS to Control Conversion and Read Timing with Parallel Outputs.
®
9
ADS7806
SERIAL OUTPUT
Data can be clocked out with the internal data clock or an
external data clock. When using serial output, be careful
with the parallel outputs, D7-D0 (pins 9-13 and 15-17), as
these pins will come out of Hi-Z state whenever CS (pin 23)
is LOW and R/C (pin 22) is HIGH. The serial output can not
be tri-stated and is always active.
SYMBOL
DESCRIPTION
t1
Convert Pulse Width
t2
Data Valid Delay after R/C LOW
t3
BUSY Delay from
Start of Conversion
INTERNAL DATA CLOCK (During A Conversion)
To use the internal data clock, tie EXT/INT (pin 8) LOW.
The combination of R/C (pin 22) and CS (pin 23) LOW will
initiate conversion ‘n’ and activate the internal data clock
(typically 900kHz clock rate). The ADS7806 will output 12
bits of valid data, MSB first, from conversion ‘n-1’ on
SDATA (pin 19), synchronized to 12 clock pulses output on
DATACLK (pin 18). The data will be valid on both the
rising and falling edges of the internal data clock. The rising
edge of BUSY (pin 24) can be used to latch the data. After
the 12th clock pulse, DATACLK will remain LOW until the
next conversion is initiated, while SDATA will go to whatever logic level was input on TAG (pin 20) during the first
clock pulse. Refer to Table VI and Figure 4.
MIN TYP MAX UNITS
0.04
14.7
t4
BUSY LOW
14.7
t5
BUSY Delay after
End of Conversion
90
12
µs
20
µs
85
ns
20
µs
ns
t6
Aperture Delay
40
t7
Conversion Time
14.7
t8
Acquisition Time
t9
Bus Relinquish Time
10
t10
BUSY Delay after Data Valid
20
60
ns
t11
Previous Data Valid
after Start of Conversion
12
14.7
µs
t12
Bus Access Time and BYTE Delay
t13
Start of Conversion
to DATACLK Delay
1.4
µs
t14
DATACLK Period
1.1
µs
t15
Data Valid to DATACLK
HIGH Delay
20
75
ns
t16
Data Valid after DATACLK
LOW Delay
400
600
ns
t17
External DATACLK Period
100
ns
t18
External DATACLK LOW
40
ns
t19
External DATACLK HIGH
50
ns
t20
CS and R/C to External
DATACLK Setup Time
25
ns
EXTERNAL DATA CLOCK
To use an external data clock, tie EXT/INT (pin 8) HIGH. The
external data clock is not a conversion clock; it can only be
used as a data clock. To enable the output mode of the
ADS7806, CS (pin 23) must be LOW and R/C (pin 22) must
be HIGH. DATACLK must be HIGH for 20% to 70% of the
total data clock period; the clock rate can be between DC and
10MHz. Serial data from conversion ‘n’ can be output on
SDATA (pin 19) after conversion ‘n’ is completed or during
conversion ‘n + 1’ .
ns
20
µs
5
µs
83
ns
83
ns
t21
R/C to CS Setup Time
10
ns
t22
Valid Data after DATACLK HIGH
25
ns
t7 + t8
Throughput Time
25
An obvious way to simplify control of the converter is to tie
CS LOW and use R/C to initiate conversions. While this is
perfectly acceptable, there is a possible problem when using
an external data clock. At an indeterminate point from 12µs
after the start of conversion '
n'until BUSY rises, the internal
logic will shift the results of conversion '
n'into the output
register. If CS is LOW, R/C is HIGH, and the external clock
is HIGH at this point, data will be lost. So, with CS LOW,
either R/C and/or DATACLK must be LOW during this
period to avoid losing valid data.
µs
TABLE VI. Conversion and Data Timing. TA = –40°C to
+85°C.
t7 + t8
CS or R/C(1)
t14
t13
DATACLK
1
2
3
11
12
1
2
Bit 9 Valid
Bit 1 Valid
LSB Valid
MSB Valid
Bit 10 Valid
t16
t15
MSB Valid
SDATA
Bit 10 Valid
(Results from previous conversion.)
BUSY
NOTE: (1) If controlling with CS, tie R/C LOW. Data bus pins will remain Hi-Z at all times.
If controlling with R/C, tie CS LOW. Data bus pins will be active when R/C is HIGH, and should be left unconnected.
FIGURE 4. Serial Data Timing Using Internal Data Clock (TAG tied LOW).
®
ADS7806
10
11
FIGURE 5. Conversion and Read Timing with External Clock (EXT/INT Tied HIGH) Read after Conversion.
t17
t18
t19
1
0
2
3
11
12
13
14
EXTERNAL
DATACLK
t20
t20
t1
t22
CS
t21
R/C
t3
t21
BUSY
SDATA
TAG
Tag 0
Bit 11 (MSB)
Bit 10
Bit 1
Bit 0 (LSB)
Tag 0
Tag 1
Tag 1
Tag 2
Tag 11
Tag 12
Tag 13
Tag 14
ADS7806
®
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111
APPENDIX C
Complete Listing of Q and T Points Detection Errors
QRSonset and Toffset Errors for Patients with Myocardial Infarction
No
1
2
3
4
5
6
7
8
9
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
Qmea
84
83
92
82
80
86
87
83
82
85
81
78
81
81
90
93
89
88
81
81
84
83
82
82
83
83
83
84
83
85
91
Tmea
196
190
196
168
171
169
172
152
177
184
196
169
152
170
172
173
173
184
181
197
196
178
173
176
170
167
173
197
172
184
171
Qref
81
81
81
81
81
81
81
81
81
81
81
81
81
81
81
81
81
81
81
81
81
81
81
81
81
81
81
81
81
81
81
Tref
185
187
191
170
173
166
172
150
158
161
178
165
173
170
172
173
174
187
185
188
188
172
173
179
171
175
171
172
175
188
171
ABS Qer
3
2
11
1
1
5
6
2
1
4
0
3
0
0
9
12
8
7
0
0
3
2
1
1
2
2
2
3
2
4
10
ABS Ter
11
3
5
2
2
4
0
2
20
24
18
4
21
1
0
0
1
3
4
9
8
7
1
3
1
8
2
25
3
4
1
112
33
34
35
36
37
38
39
40
41
42
43
44
46
47
48
49
50
51
52
53
54
55
56
57
58
59
61
62
63
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
83
80
83
83
80
82
84
84
82
83
83
85
85
85
88
82
82
81
84
84
84
90
87
85
84
85
88
88
85
85
85
83
80
80
81
82
81
79
74
84
77
89
90
90
86
82
83
80
83
89
92
91
166
163
167
160
163
153
192
170
168
168
173
177
165
193
181
172
179
191
153
159
175
184
203
166
177
171
162
172
178
171
189
186
172
167
171
165
184
187
187
183
183
206
208
170
179
181
181
165
173
176
166
182
81
81
81
81
81
81
81
81
81
81
81
81
81
81
81
81
81
81
81
81
81
81
81
81
81
81
81
81
81
81
81
81
81
81
81
81
81
81
81
81
81
81
81
81
81
81
81
81
81
81
81
81
167
164
168
171
180
171
168
173
168
175
175
176
168
163
172
171
178
180
165
163
175
187
187
165
175
173
173
173
173
176
186
189
175
167
172
169
184
184
188
179
184
160
155
164
181
183
186
172
186
178
178
187
2
1
2
2
1
1
3
3
1
2
2
4
4
4
7
1
1
0
3
3
3
9
6
4
3
4
7
7
4
4
4
2
1
1
0
1
0
2
7
3
4
8
9
9
5
1
2
1
2
8
11
10
1
1
1
11
17
18
24
3
0
7
2
1
3
30
10
1
2
11
12
4
1
3
16
1
2
2
11
1
5
5
3
3
3
0
1
4
0
4
1
4
1
46
53
6
2
2
5
7
13
2
12
5
113
88
89
90
91
92
93
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
118
119
120
121
122
123
124
125
126
127
128
130
131
132
133
134
135
136
137
138
139
141
142
143
79
82
84
84
83
80
70
63
71
84
84
83
81
81
80
78
80
86
87
87
84
86
80
83
82
79
82
76
81
87
81
84
84
83
80
89
90
90
80
84
83
85
84
81
86
82
82
86
80
73
81
82
186
182
164
177
202
173
162
181
174
160
172
173
177
194
155
167
166
170
174
199
177
177
172
181
175
175
167
168
198
188
173
163
177
175
178
197
166
171
177
166
172
176
176
183
177
176
185
185
192
172
198
160
81
81
81
81
81
81
81
81
81
81
81
81
81
81
81
81
81
81
81
81
81
81
81
81
81
81
81
81
81
81
81
81
81
81
81
81
81
81
81
81
81
81
81
81
81
81
81
81
81
81
81
81
195
179
166
169
167
171
163
181
175
167
176
176
178
154
161
167
168
170
173
167
176
179
176
181
175
177
169
171
189
186
174
162
171
174
178
164
169
172
173
166
173
178
177
183
177
175
177
187
190
173
198
164
2
1
3
3
2
1
11
18
10
3
3
2
0
0
1
3
1
5
6
6
3
5
1
2
1
2
1
5
0
6
0
3
3
2
1
8
9
9
1
3
2
4
3
0
5
1
1
5
1
8
0
1
9
3
2
8
36
2
1
0
1
7
4
3
1
40
6
0
2
0
2
32
1
2
4
0
0
2
2
3
10
3
1
1
6
1
0
34
3
1
4
0
1
2
1
1
0
2
8
2
2
1
1
4
114
145
146
148
149
150
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
192
193
194
195
196
197
198
199
93
81
74
83
70
82
81
77
83
82
83
84
82
87
82
83
82
81
82
82
83
82
84
83
82
80
80
82
81
83
88
76
82
82
91
83
84
83
82
81
82
75
86
84
83
82
84
82
81
80
83
90
211
166
163
166
185
176
178
181
168
171
196
177
175
176
176
183
191
182
185
179
164
193
171
196
171
179
191
165
172
162
167
162
182
163
168
171
194
181
199
171
179
180
191
172
179
162
177
175
178
181
155
191
81
81
81
81
81
81
81
81
81
81
81
81
81
81
81
81
81
81
81
81
81
81
81
81
81
81
81
81
81
81
81
81
81
81
81
81
81
81
81
81
81
81
81
81
81
81
81
81
81
81
81
81
165
162
165
167
177
176
198
179
168
173
190
173
177
177
179
181
166
185
186
181
165
178
173
172
174
181
191
164
179
166
167
163
183
168
168
182
178
183
191
173
179
183
143
168
180
165
180
178
183
184
169
192
12
0
7
2
11
1
0
4
2
1
2
3
1
6
1
2
1
0
1
1
2
1
3
2
1
1
1
1
0
2
7
5
1
1
10
2
3
2
1
0
1
6
5
3
2
1
3
1
0
1
2
9
46
5
2
1
9
0
20
2
0
2
7
4
2
1
3
2
25
3
1
2
1
15
2
24
3
2
1
1
7
4
0
1
1
5
1
11
16
2
8
2
0
3
48
4
1
3
3
3
5
3
14
1
115
200
201
202
203
204
205
206
207
209
210
211
212
213
214
215
217
218
219
220
221
222
223
224
225
226
227
228
229
230
231
232
234
235
236
237
238
239
240
241
242
243
244
245
246
247
248
249
250
251
252
253
254
86
88
86
82
83
82
82
79
83
84
82
82
74
67
83
81
82
82
82
77
87
82
79
82
79
80
82
90
80
79
83
81
83
83
83
82
82
81
82
83
81
82
79
80
79
82
81
81
77
82
84
82
168
186
188
179
170
173
174
171
153
153
170
164
173
173
169
175
163
169
161
171
178
189
186
169
168
157
173
170
173
178
153
169
174
166
180
171
173
181
174
195
195
170
153
171
173
179
178
183
197
176
194
190
81
81
81
81
81
81
81
81
81
81
81
81
81
81
81
81
81
81
81
81
81
81
81
81
81
81
81
81
81
81
81
81
81
81
81
81
81
81
81
81
81
81
81
81
81
81
81
81
81
81
81
81
170
185
187
181
176
174
176
173
154
157
164
182
171
171
168
163
168
164
163
172
178
163
187
169
169
159
177
172
178
177
161
180
168
170
183
174
174
183
174
193
198
172
154
174
174
181
178
183
194
176
193
191
5
7
5
1
2
1
1
2
2
3
1
1
7
14
2
0
1
1
1
4
6
1
2
1
2
1
1
9
1
2
2
0
2
2
2
1
1
0
1
2
0
1
2
1
2
1
0
0
4
1
3
1
2
1
1
2
6
1
2
2
1
4
6
18
3
2
1
13
5
5
2
1
0
27
1
0
1
2
4
2
5
1
8
11
6
4
3
3
1
2
0
2
3
2
1
3
1
2
0
0
4
0
1
1
116
255
256
257
258
259
260
261
262
263
264
265
266
267
268
269
270
271
272
273
274
275
276
277
278
279
280
281
282
283
284
286
288
289
290
291
292
293
294
295
296
297
299
300
82
81
66
75
76
85
82
83
82
83
83
85
81
83
82
82
85
53
77
75
66
77
82
80
79
83
84
83
84
83
83
83
83
83
82
83
81
82
60
84
90
86
86
179
199
197
167
164
171
168
167
162
173
165
176
176
176
184
187
181
229
172
195
188
169
179
182
182
175
163
169
179
172
165
164
161
177
166
164
159
164
174
173
170
186
174
81
81
81
81
81
81
81
81
81
81
81
81
81
81
81
81
81
81
81
81
81
81
81
81
81
81
81
81
81
81
81
81
81
81
81
81
81
81
81
81
81
81
81
179
180
191
168
160
172
169
167
160
179
169
176
174
177
181
188
182
184
170
170
184
169
181
176
183
168
165
170
169
171
150
163
164
175
167
166
159
168
178
177
173
189
174
1
0
15
6
5
4
1
2
1
2
2
4
0
2
1
1
4
28
4
6
15
4
1
1
2
2
3
2
3
2
2
2
2
2
1
2
0
1
21
3
9
5
5
0
19
7
1
4
1
1
0
3
6
4
0
2
1
3
1
1
45
2
25
4
0
2
6
1
8
2
1
10
2
15
1
3
3
1
2
0
4
4
4
3
3
0
QRSonset and Toffset Errors for Healthy Controls
No
317
Qmea
63
Tmea
176
Qref
81
Tref
178
Abs Qer
18
ABS Ter
2
117
318
330
331
332
336
337
346
364
369
370
380
381
382
386
387
388
390
391
392
393
394
400
401
402
403
404
405
406
409
411
412
427
428
447
463
464
468
469
470
471
472
473
474
475
476
477
478
479
481
482
483
484
84
83
84
80
83
85
82
84
82
80
82
83
80
82
81
82
83
82
80
80
83
81
81
84
82
80
82
65
81
84
81
84
83
84
81
80
83
82
83
83
83
82
80
83
83
83
78
81
83
82
83
82
168
179
170
170
170
174
195
174
173
164
177
177
181
178
181
166
181
177
171
176
178
168
165
189
169
169
164
173
174
171
182
170
171
163
190
186
177
179
181
176
175
187
175
182
182
184
173
172
171
179
178
169
81
81
81
81
81
81
81
81
81
81
81
81
81
81
81
81
81
81
81
81
81
81
81
81
81
81
81
81
81
81
81
81
81
81
81
81
81
81
81
81
81
81
81
81
81
81
81
81
81
81
81
81
170
182
170
171
171
177
161
177
174
166
179
178
184
179
181
169
183
178
173
177
180
169
167
167
170
171
165
174
177
169
184
172
175
164
189
188
180
183
184
175
176
189
177
186
186
185
180
173
170
180
180
170
3
2
3
1
2
4
1
3
1
1
1
2
1
1
0
1
2
1
1
1
2
0
0
3
1
1
1
16
0
3
0
3
2
3
0
1
2
1
2
2
2
1
1
2
2
2
3
0
2
1
2
1
2
3
0
1
1
3
35
3
1
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APPENDIX D
CONFERENCE PAPER
Proceedings of the InternationalConference on
Robotics, Vision, Information and Signal Processing ROVISP2005
12-Channel USB Data Acquisition System For QT Dispersion Analysis
J. M. Najeb, Arief Ruhullah, Sh-Hussain Salleh
Centre for Biomedical Engineering
Faculty of Electrical Engineering
Universiti Teknologi Malaysia
81310 Skudai, Johor, Malaysia
Tel: +607-5535932, Fax: +607-5535430
Email: [email protected], [email protected], [email protected]
Abstract
arrhythmias. Since the QTd has the potential in anticipating
sudden cardiac death, it is important to have tool that
acquires the ECG and produces the QTd index continuously
and as instantaneous as possible. Moreover, the
development of algorithm such as the T end point detection
which utilizes digital signal processing is a endless study
and improves with time. Hence a PC based data acquisition
for 12 lead ECG is relevant to facilitate this never ending
algorithm development and database growth.
A low-cost personal computer (PC) based virtual
oscilloscope has been developed by [2]. It is an 8 channel, 8
bit resolution oscilloscope. The device interfaces with the
PC via the inexpensive but bulky and uncommon parallel
port nowadays. However, the system’s ability to display all
the 8 channels simultaneously on the PC graphical user
interface (GUI) has inspired the author. The PC has seen
the growth of the Universal Serial Bus (USB) as the
standard for peripheral devices interconnection. It can be
found on every desktop, laptop or PDA as with compared
to the parallel port [3]. The Ethernet popularity goes along
with the USB but it loses on the complexity and cost of
implementation. [4] chooses USB over the RS232 serial
interface due to its higher data transmission speed. This is
because of the 48kHz sampling frequency required for their
application for sound and vibration measurements. The
internal expansion ISA and PCI slot has also been a
common means of data transfer between a data acquisition
unit and the PC. However, they are susceptible to
obsolescence when the computer architecture evolves [5].
Various USB interface chip is available to be
easily interfaced to a device. There are also
microcontrollers with USB interface built in. However, [5]
disregarded this due to avoid interaction with the internal
buffers of a microcontroller which consumes clock cycles
in firmware execution. [4] describes three transfer modes
common to USB, namely the interrupt mode, bulk mode
and isochronous mode, and ascertain that the bulk mode
enables higher data transmission rate. [4] also proposed, in
order not to lose time which is required for sending out data
package, two FIFO buffers are essential. While one buffer
is sending data out, the other is filled by data. USBN9602
and USBN9603 dedicated USB chip was implemented by
[4] and [5] respectively and ISP1181 by [6]. These chips
have yet requires the consumer to have deep knowledge in
the USB protocol.
[7] describes the USB interface as a mean of
isolation in designing medical devices. The system
QT dispersion has been generally agreed that it is
a marker for the sudden cardiac death. Therefore an
automated QTd analysis system is crucial in detecting the
symptoms. Various systems have been developed in this
field to support various medical and sports practice. The
12-lead electrocardiogram system is one of them. PC-base
electrocardiogram system with automated analysis has
been in the market for years. However these systems adapt
the conventional parallel port and serial port PC interface.
Various products have been developed based on the
popular USB communication because of its capability to
plug multiple USB devices via a USB hub and its unique
identification of the type of device plugged in. The purpose
of this paper is to describe the development of a 12-channel
USB data acquisition system for electrocardiogram as part
of an automated QTd analysis system. This paper however
focuses only on the development of the digital side of the
system. The data acquisition is interfaced to the PC via a
USB module base on the FTDI Chip hassle free USB
interface module. The 12-bit resolution data acquisition
system based on PIC16F84A-20 has been able to sample at
500 Hz per channel for 12 channels and plotting is done on
a simultaneous real-time basis.
Keywords:
Electrocardiogram, QT Dispersion, Data Acquisition, USB
Introduction
QT dispersion has been shown to be a marker of those at
risk of sudden cardiac death due to cardiac arrhythmias [1].
QT is among of the various parameters of
electrocardiogram (ECG) that represents the heart
abnormalities. QT interval is defined as the measurement
between the Q onset and the T offset of the typical ECG
wave. QT dispersion (QTd) is defined as the subtraction of
the maximum QT interval and the minimum QT interval in
any of the 12 ECG leads. Automatic QT interval
measurement involves the accurate detection of the Q onset
and T offset point in the ECG wave. The T offset
computerized detection is the most challenging task. This is
due to the different morphologies of the T wave [1].
Therefore it is critical to have in hand a database of ECG
from various group of subjects from a variety of
83
Proceedings of the InternationalConference on
Robotics, Vision, Information and Signal Processing ROVISP2005
with no charge, is utilized. The DLP245BM USB module
employs the FT245BM chip and incorporates a serial
EEPROM to store the programmable Vendor ID (VID),
Product ID (PID) and description string. Data to be sent or
received can be access through the eight data pins.
PIC16F84A-20 Microcontroller
The PIC16F84A-20 operates on a 20MHz crystal making it
fast enough to sample at 500Hz for 12 channels. With this
crystal frequency, it executes instruction at 200ns per clock
cycle. The microcontroller role is to control the overall data
flow of the system.
described in this paper nevertheless assumes the isolation
stage is to be implemented in the analog part of the 12-lead
ECG circuit.
The system adapted in this paper is an easy-tointerface USB module with the PIC16F84A-20
microcontroller. The architecture of the data acquisition
unit developed is detailed in the next section.
The Overall Architecture Of The System
The Main Components
The System
MPC506 Analog Multiplexer
It is a sixteen channel single-ended analog multiplexer
(MUX). It has a four channel selection pins, A0 through to
A3 and features break-before-make switching, no channel
interaction during over-voltage and 70Vp-p analog overvoltage protection. Input signals range from +15V to -15V
and signal path of other channels would not be disturbed if
analog input exceed power supply voltage.
One parameter of concern other than stated above
is the settling time of the channel selected. Ignorance on
this factor during firmware programming will affect the
output voltage of the multiplexer. Such occurrence is a pair
of neighboring analog to digital conversion from the same
channel. The settling time for the MPC506 is at least 3.5µs.
The MPC506 is configured to accept input voltage from
-10V to +10V.
ADS7806 Analog To Digital Converter
The ADS7806 is a 12-bit analog to digital converter
(ADC). It has a 25µs maximum conversion and acquisition
time, parallel or serial selectable data output, and operates
from a single 5V supply. It is a successive approximation
ADC with built-in sample and hold circuit, clock, reference
and interface with microprocessors. It provides input ranges
of ±10V and 0V to +5V.
The ADS7806 configuration circuit is put to
sample voltage ranges of ±10V with external offset and
gain calibration. The ADC interfaces with the
microcontroller via the parallel output and the conversion
output is in the 2’s complement format. The maximum
conversion and acquisition time is 20µs and 5µs
respectively and the convert pulse width must be at least
40ns.
DLP245BM USB Module
The proposed system utilizes the USB as a mean of data
transfer and this is made realizable by USB interface chip
manufactured by FTDI Chip. FT245BM, a parallel FIFO
USB chip operates as a bidirectional data transfer. It
interfaces with microcontroller with a 4 wire handshake
control pins. The USB protocol is handled entirely on-chip
and therefore there is no need for USB specific firmware
programming required as in USBN9602, USBN9603 and
ISP1181 USB dedicated chip. Provided also is the send
immediate (SI) pin which helps in optimizing data
throughput. The FT245BM only allows bulk and
isochronous transfer mode. Transfer data rate is achievable
at 1MByte per second when the D2XX driver, provided
The Interconnection
Figure 1 shows the block diagram and the data flow of the
developed system. Twelve analog signals enter the system
via the analog multiplexer and digitized by the 12-bit ADC.
The sampled data output is then interfaced directly to the
data bus of the FTDI-based USB module. From the figure,
it can be clearly seen that the microcontroller only controls
the analog MUX, ADC and the USB module. Data output
from the ADC is sent directly to the PC where data
manipulation will be done.
Multiplexed
Signal
ADS7806
12-bit ADC
12-bit
Data
DLP-245BM
USB Module
USB
PC
ADC
Control
MPC506
Analog MUX
Channel Select
PIC16F84A
Microcontroller
Data Strobe
Figure 1: Data Acquisition System Interconnection
The microcontroller controls channel selection
through the A3:A0 address pins of the analog MUX. The
pins interfaced to the microcontroller from the ADC is the
R/C* for starting analog to digital conversion and reading
from the ADC output, BYTE for determining low or high
byte selection at data output. The DLP245BM ports with
the microcontroller via the TXE* pin that checks for empty
transmit buffer, WR pin that strobes data on the bus into the
transmit buffer and the SI pin that sends whatever data is in
the buffer to the PC without waiting for the buffer to be
full.
The Firmware Programming
The program flow for the firmware of the microcontroller is
shown in Figure 2. On reset, the microcontroller initializes
the analog MUX, the ADC and the USB module. It sets the
MUX to the first channel selection, the ADC to the data
output state and empties the transmit buffer. On completing
initialization, the system sends a converts pulse of 200ns to
the ADC to start digitizing the current selected channel.
Conversion completes after 20µs and the high and low byte
of the 12-bit conversion result is strobe into the USB
module’s buffer. Selection of the next channel follows so as
to allow settling time for channel switching. This must be at
least 3.5µs. The inter-channel delay routine completes the
process for a total of 25µs. This delay is important to ensure
84
Proceedings of the InternationalConference on
Robotics, Vision, Information and Signal Processing ROVISP2005
full convert and acquire process of the ADC and avoid
erroneous conversion. The process will loop for the next
eleven subsequent channels. After the total twelve channels
data have been written to the USB module’ s buffer, the 24
byte of data will be sent to the PC. This 24 byte array is
arranged in ascending channel order with the arrangement
of high byte followed by low byte for every channel. With
this, there is no need for appending channel identification
since the location of the channel and byte is predetermined
in the array. This way, the channel demultiplexing process
at the PC side has been made simpler. The total time
consumed is 324µs. The time required to achieve a
sampling rate of 500Hz is 2000µs. Therefore, there should
be delay of 1676µs before the next 12 channels is sampled
and sent to the PC.
and simultaneously. The software enables preview before
the actual recording and save process.
Start
Start USB_RX
Thread
- LoadDLL()
- Initialize & Execute
USB_RX Thread
- Initialize Plot
Function
Wait Thread
Process
Exit ?
No
Data in USB
Buffer (PC)?
Yes
Yes
End
Demultiplex
Data & Fill
Plot Array
Start
Initialize
System
Plot to
Subsequent
Plot Region
Convert
&
Acquire
Figure 3: PC Software Program Flowchart
Write to
USB
Module’s
Buffer
No
Next Channel
Selection
Inter-channel
Delay
Forever
Loop
All
12 Channels
?
Yes
Send Immediate
(USB to PC)
Figure 4: The PC Software Graphical User Interface
Figure 2: Firmware Program Flow Chart
Results & Discussion
The PC Software
The PC software is developed in Microsoft Visual C++
environment on a Windows XP platform. The software
utilizes the single document interface (SDI) format. This
enables the author to plot all the 12 channels on the
document area of the interface. The main program resides
in the USB data reception thread. The thread continuously
monitors if there is data on the PC USB buffer. If there is
data and the size of the buffer is 24, then the software will
immediately sorts and append the appropriate data into 12
individual channel arrays. These data will then be plotted
onto the document interface of the software simultaneously.
This is depicted in Figure 3 as shown below. Figure 4
shows the GUI developed to display the signals in real-time
The system has been successfully been able to acquire
twelve channel signals at a sampling rate of 500Hz each.
The system has also been able to plot the signals in realtime simultaneously. Therefore it is ready to acquire 12lead ECG signals and undergo digital signal processing for
QT dispersion indexing in real-time too.
In realizing this system, several obstacles have
been observed and overcame. Among them is in
programming the multithreading process in the PC
software. Initially, two separate threads are used. One
thread is to acquire data from the PC USB buffer and the
other is to plot. The maximum size of the PC USB buffer is
64kByte and it is observed that after approximately 60
seconds the data received from the buffer is erroneous and
85
Proceedings of the InternationalConference on
Robotics, Vision, Information and Signal Processing ROVISP2005
implementing digital signal processing for QT dispersion
analysis.
the buffer count indicates that it is full. The condition
should be that every data received are directly saved into an
array and plotted. It seems that the data accumulates while
it is being plot. The plotting thread of all twelve input
signals simultaneously has created a noticeable delay. This
is solved by combining both the acquire and plot threads
into a thread. Experimenting with the PC USB buffer count,
it is found that it takes approximately 120 seconds before
the buffer gets full and the data become erroneous and this
shows a good indication. The second obstacle is to get rid
totally of the buffer accumulation. In the beginning, the plot
width of every channel is defined for 5 seconds. Assuming
that wide plot width for twelve channels consumes time, the
plot width is reduced to 3 seconds for every plot. As
expected, reception of data at the PC USB buffer empties at
every PC USB buffer read instruction and eliminates
accumulation and thus continuous real-time acquisition is
achieved.
References
[1] P Langley, JH Dark, A Murray. 2000. QT Dispersion
Analysis of a Transplant Assessment Group. IEEE
Trans. Computers In Cardiology, 27:167-170
[2] C. Bunia, S. Giri, S. Kar, S. Haldar, P. Purkait. May
2004. A Low-Cost PC-Based Virtual Oscilloscope.
IEEE Trans. On Education Vol. 47
[3] A. Depari, P. Ferarri, A. Flammini, D. Marioli, E.
Sisinoi, A. Taranoi. January 2004. IEEE1451 Smart
Sensors Supporting USB Connectivity. IEEE Sensors
for Industry Conference
[4] A. Podgorski, R. Nedwidek, M. Pochmara. September
2003. Implementation of the USB Interface In the
Instrumentation for Sound and Vibration Measurement
and Analysis. IEEE Int. Workshop On Intelligent Data
Acquisition and Advanced Computing Systems:
Technology and Applications
[5] B. Murovec, S. Kocijancic. 2003. Educational Data
Acquisition System with USB Interface. IEEE
EUROCON
[6] M. Popa, M. Marcu, A. S. Popa. 2004. A
Microcontroller Base Data Acquisition System With
USB Interface. IEEE
[7] S. Junnila, J. Ruoho, J. Niittylahti. 2002. Medical
Isolation of Universal Serial Bus Data Signals. IEEE.
Conclusion
The problem of sudden cardiac death has prompted
researchers to design a real-time QT dispersion indexing
device. The research centre for biomedical engineering has
come out with a 12-channel USB data acquisition for QT
dispersion analysis. The device which is able to acquire
data in real-time has been described. The device is able to
acquire 12-lead ECG signals at 500Hz per channel. This
device is part of an entire system for real-time QT
dispersion analysis. The following task, would be to design
the analog circuit to condition 12-lead ECG signal prior to
data acquisition. This would then be followed by
86
Two-Channel Data Acquisition Unit for Heart Sound
Analysis
J. M. Najeb, Sh-Hussain,Salleh
Khalid Yusoff
Centre for Biomedical Engineering
Faculty of Electrical Engineering
Universiti Teknologi Malaysia
81310 Skudai, Johor, Malaysia
Email: [email protected], [email protected]
Faculty of Medicine
Universiti Teknologi MARA
40450, Shah Alam, Selangor, Malaysia
Email: [email protected]
Abstract—This paper describes the development of a data
acquisition system for the electrocardiogram (ECG) and the
phonocardiogram (PCG). Diagnosing heart sounds and heart
murmurs using the stethoscope is an established practice
clinically. However it requires considerable experience and
training,
to
ensure
validity
and
reproducibility.
Echocardiography provides more definitive diagnosis in this
respect but it is expensive and not widely available. With the
advancement in personal computers (PC), this data acquisition
unit interfaces with any desktop or notebook PC and functions as
a virtual instrument for the heart diagnostic system. The ECG
has been a reliable reference for the cardiologists to determine
the first (S1) and second (S2) heart sound. Transformation of the
heart sound signal using DSP technique, that is the Instantaneous
Energy (IE) and Instantaneous Frequency (IF) for heart
diagnostic can be a new approach for cardiologists. Furthermore,
combining phonocardiogram with ECG for on-line diagnosis may
be an important way forward. This paper describes the
development of two channel acquisition system for heart
diagnostic base on DSP technique.
Keywordsphonocardiogram;
acquisition; heart diagnostic
electrocardiogram;
fed into neural networks for cardiac abnormalities disorders
detection.
Figure 1, shows that S1 occurs just right after the
QRS complex of the ECG. S2 occurs towards the end of the T
wave, S3 which has relatively lower energy occurs right after
S2, and S4 occurs after the P wave [2]. This shows that the
ECG can be utilized for distinguishing between the heart
sounds.
data
I. INTRODUCTION
Diagnosing heart diseases with a stethoscope and ECG are two
fundamental methods because of its efficiency, simplicity and
non-invasive property [1]. However it takes a skilled and
experienced doctor to be able to discover the heart condition
by using a stethoscope [2]. With the advancement of computer
systems in terms of its reproducibility, consistency and speed,
it is vital in aiding the cardiologists in diagnosing tasks.
The heart sounds is produced from the mechanical
actions of the heart. These mechanical pumping actions
correlate with the electrical activity of the heart, that can be
picked up by the ECG. The heart sounds repeat with two
normal sounds, that is the first heart sound (S1) and the second
heart sound (S2). However, there could be the third and fourth
heart sound (S3 & S4) in some conditions. The heart sounds
and ECG signals are depicted in Figure 1. An algorithm for
automated detection of S1 and S2 for the purpose of
segmentation is presented by [1]. This segmented data can be
Figure 1: The heart sounds in correlation with the ECG
A data acquisition unit capturing the heart sound and
the ECG simultaneously may provide a diagnostic advantage.
It is crucial in developing a database of these signals for
segmentation, neural network training and recognition. It has
to be a low cost device and it will be useful tool for early
detection of cardiac disorders and not for detailed diagnostic.
Its low cost feature will make the system affordable even in
small clinics.
A wireless heart rate monitoring system based on
heart sound is developed by [3]. Instead of using the three
electrodes ECG to get the heart rate, the heart sound is
utilized. The design of the system is geared towards portability
and single wire signal source that is the stethoscope. However
it has no intentions of diagnosing the heart sounds other than
just measuring the heart rate.
173
The virtual instrument developed by [4] has almost similar
properties as proposed in this paper. However [4] puts together
LabVIEW plug-in data acquisition board and custom designed
two-channel bio-signal amplifiers whereas the proposed
system has its own developed data acquisition unit and biosignal conditioners. The advantage of the proposed system
over that is its cost is not much.
Both [5] and [6] developed PCG diagnosis systems on
personal digital assistant (PDA) platform. [5] implements the
Bluetooth wireless technology to acquire data from unwired
patient while [6] inputs the heart sounds directly from the
PDA’s microphone jack. Both of these systems however, do
not utilize the ECG for segmentation and the diagnosis is done
visually on the transformed heart sound signals such as the
spectrogram.
II.
THE SYSTEM ARCHITECTURE
Figure 2 illustrates the block diagram of the system. It
consists of three hardware modules, the ECG signal
conditioning, heart sound signal conditioning and the twochannel data acquisition unit. Both the signal conditioning
modules consists of amplifier and analog filter circuits.
Figure 5 illustrates the acquisition block diagram as
implemented in the system developed. It has 16-bit resolution
analog to digital converter (ADC). The output of the ADC is
fed directly to the parallel port interface. The microcontroller
in this implementation is only as a digital control to the analog
multiplexer, ADC and parallel port interface. The highest
frequency of interest in both signals is 1000Hz. Therefore,
with reference to Nyquist sampling theorem, the data
acquisition unit is programmed to do 2 kHz sampling for each
channel. This is achieved through the microcontroller
Two Channel
Analog MUX
16-bit Parallel
Output ADC
Parallel Port
Interface
MC68HC11
8-bit
Microcontroller
firmware programming.
Figure 5: PC acquisition unit block diagram
Figure 6 shows the flowchart for the firmware
programming done in MC68HC11 assembly language. Each
16-bit conversion results needs two transfers to the parallel
port. This is because only 8-bit output is available on the
ADS7805 ADC and they are connected to the data lines of the
parallel port. The high or low byte output from the ADC can
be selected by the BYTE pin on the ADS7805 by the
microcontroller.
ECG Signal
Conditioning
2-Channel
DAQ Unit
Heart Sound
Conditioning
Figure 2: Main block diagram of the system
The overall gain for the ECG amplifier is 1000, while its
filtered signal bandwidth ranges from 0.05Hz to 100Hz. The
module includes the right-leg drive for 50Hz power-line
suppression as well as a return path for the ECG. The module
also contains isolation amplifier and isolated power supply to
avoid the patient from high current feedback which ensures
safety. This is depicted in figure 3. A Bessel low pass filter is
implemented since it has a flat group delay, which will not
distort the original signal of interest.
Instrumentation
Amplifier
G=26
DC Restore
3.2 sec
Time
Constant
Isolation
Amplifier
4th Order
Bessel LPF
100Hz
Cable Shielding
& Right-Leg
Drive
Figure 3: ECG signal conditioning block diagram
The heart sound conditioning module as in figure 4 has a
fixed gain of 30 and captures its signal from an electronic
stethoscope with volume control. The band-pass filter cut-off
is between 20Hz and 1000 kHz.
Instrumentation
Amplifier
G=5
4th Order
Butterworth HPF
20Hz
4th Order
Butterworth LPF
1000Hz
Figure 4: Heart sound signal conditioning block diagram
174
To PC
Initialize
System
Select
MUX
Channel
Start ADC
Conversion
Wait till
conversion
complete
Transfer 8-bit High
Data Byte to
Parallel Port
Transfer 8-bit
LOW Data Byte to
Parallel Port
Figure 6: Flowchart for acquisition unit firmware
III. RESULTS
Figure 7 depicts the PC software for real-time plotting. The
transformation segmentation of heart sound and ECG as in [1]
is done offline with five seconds of the latest data. The signal
in figure 7 is acquired from a normal individual. It can be
observed that the S1 and S2 occur at specific points of the
ECG mentioned earlier.
The developed PC software also includes IE and IF
transformation of the heart sound. From the IE of the heart
sound, S1 and S2 can be identified without utilizing the ECG
waveforms. Figure 8 shows the IE transformation of the heart
sound from the same normal subject in figure 7. Figure 9 show
the heart sound acquired from a patient with S4 abnormalities.
IE transformation of the heart sound highlights the S4 which
cannot be clearly seen from the raw signal. The ECG markings
clearly show the occurrence of the S4.
Figure 9: The heart sound, its IE representation and ECG with S4 possibilities
IV. CONCLUSIONS
An instrument for recording and analyzing the heart sound
with the aid of ECG has been developed. Automated
segmentation of the heart sounds can be done by identifying
the QRS peak of the ECG. However, S1 and S2 detection can
be done using the IE and IF DSP technique. In spite of that,
the ECG signal will be maintained to confirm the cardiologists
of the DSP technique implemented. Furthermore, advanced
DSP technique can be explored for heart diagnostic with the
aid of the two-channel heart sound and ECG acquisition
system.
REFERENCES
Figure 7: Main software interface. Five seconds heart sound and ECG
captured from a normal subject.
[1] MB Malarvili, I Kamarulafizam, S Hussain, D Helmi, Heart Sound
Segmentation Algorithm Based on Instantaneous Energy
Electrocardiogram, IEEE Computers in Cardiology 2003: 327-330.
of
[2] Jozef Wartak, Phonocardiography: Integrated Study of Heart Sounds and
Murmurs, Harper & Row, New York, 1972.
[3] Luis Torres-Pereira, Paulo Ruivo, Carla Torres-Pereira, Carlos Couto, A
Non-Invasive Telemetric Heart Rate Monitoring System Based On
Phonocardiography, IEEE ISIE’97: 856-859.
[4] Zhenyu Guo, Chris Moulder, Louis-Gilles Durand, Murray Leow,
Development Of A Virtual Instrument For Data Acquisition And
Analysis Of The Phonocardiogram, Proceedings of the 20th Annual
International Conference of the IEEE Engineering in Medicine and
Biology Society, Vol. 20, No 1, 1998.
[5] Jia-Ren Chang Chien, Cheng-Chi Tai, The Implementation of a
Bluetooth-Based Wireless Phonocardio-Diagnosis System, Proceedings
IEEE International Conference on Networking, Sensing & Control, pp
170-171, March 2004.
[6] Matias Brusco, Homer Nazeran, Digital Phonocardiography: A PDAFigure 8: The heart sound and its IE representation from a normal subject
Based Approach, Proceedings 26th Annual International Conference
IEEE EMBS, pp 2299-2302, September 2004.
175