i
Modeling and Analysis of Ballistic Carbon Nanotube Field Effect Transistor
(CNTFET) with Quantum Transport Concept
Heng Chin Chuan
A project report submitted in partial fulfillment of the
requirements for the award of the degree of
Master of Engineering (Computer and Microelectronics Systems)
Faculty of Electrical Engineering
Universiti Teknologi Malaysia
MAY 2007
iii
To my beloved father, mother and sister.
iv
ACKNOWLEDGEMENTS
I would like to express my heartiest gratitude to my project advisor, Associate
Professor Dr. Razali Ismail, for his invaluable advices and consecutive support which
make the whole work possible. He teaches and guides me on how to approach a
difficult project topic with the simple and neat ways. Working with Dr. Razali is a
priceless experience and his contribution to this work is more then what can
described in words.
Finally, I want to thanks my beloved parents, sister and grandparent, for their
love and support to my works.
v
ABSTRACT
Aggressive scaling of CMOS has led to higher and higher integration density,
the higher performance of devices, low power consumption and more complex
function. However, it will eventually reach its limit in future. As device sizes
approach the nanoscale, new opportunities arise from harnessing the physical and
chemical properties at the nanoscale. Carbon Nanotubes are considered as the most
promising carbon nanostructure material is realizing the nanoelectronic transistors
back in year 1991. The objective of this project is to create a modeling of next
generation field effect transistors (CNTFET) to model the characteristics of the
devices. Modeling of semiconductor devices is critical in understanding factors
which may affect their performance. This allows greater understanding of the
underlying physics and aids optimization in both materials and lowers development
costs by reducing the time and effect between design and fabrication of working
prototypes. The overall project is uses the concept of a Carbon Nanotube technology
along with its application in Carbon Nanotube field effect transistors, physic of
Carbon Nanotube, and quantum transport theory to create an equivalent universal
SPICE model. Numerical simulation studies are carried out by using MATLAB
program to understand the device physic and the performances of transistor are
compared with conventional MOSFET. Further analysis has been made on changing
some transistor parameter (for example the oxide thickness, carbon nanotube
diameter and etc) to further understand what controls and how to improve the
transistor performance.
vi
ABSTRAK
Pengskalaan peranti CMOS yang agresif terhadap skala nano telah membawa
kepada peningkatan pelbagi faktor termasuk densiti integrasi, pencapaian prestasi
peranti, kompleksiti fungsi dan penurunan kadar pengunaan kuasa. Akan tetapi,
fenomena ini akan mencapai tahap di mana pengecilan skala tidak dapat lagi
dijalankan. Pengecilan saiz peranti terhadap skala nano telah membangkitkan
kaedah-kaedah untuk menaikkan lagi prestasi pada tahap skala nano secara fizikal
and kimia. Nanotiub karbon dianggap sebagai bahan struktur nano yang terbaik
dalam usaha merealisasikan transistor nanoelektronik pada tahun 1991. Objektif
projek ini adalah untuk memodelkan ciri-ciri peranti transistor karbon nanotiub kesan
medan generasi baru CNTFET. Pemahaman yang mendalam terhadap faktor-faktor
adalah kritikal dalam pemodelan peranti semikonduktor yang mungkin mengubah
tahap prestasi peranti tersebut. Dengan ini, pemahaman yang lebih mendalam dalam
bidang fizik dan pengoptimasi bantuan dalam bahan dapat dicapai di samping
mengurangkan kos dengan mengurangkan masa dan kesan di antara rekabentuk dan
fabrikasi prototaip. Secara keseluruhan, projek ini menggunakan konsep teknologi
karbon nanotiub dalam pengaplikasian dalam transistor karbon nanotiub kesan
medan, sifat fizik karbon nanotiub dan teori kuantum pengangkutan untuk
menghasilkan model SPICE yang setara. Simulasi telah dijalankan dalam MATLAB
untuk memahami dengan dalam sifat fizik dan tahap pencapaian transistor
berbanding MOSFET konvensional. Analisis yang lebih lanjut telah dijalankan
dengan penukaran parameter transistor contohnya ketebalan oksida, diameter
nanotiub karbon dan lain-lain untuk menyelidik faktor yang mengawal dan juga caracara yang dilakukan untuk meningkatkan tahap prestasi transistor.
vii
TABLE OF CONTENTS
CHAPTER
1
2
TITLE
PAGE
DECLARATION
ii
DEDICATION
iii
ACKNOWLEDGEMENTS
iv
ABSTRACT
v
ABSTRAK
vi
TABLE OF CONTENTS
vii
LIST OF TABLES
x
LIST OF FIGURES
xi
LIST OF SYMBOLS
xiv
INTRODUCTION
1.1 Background and Research Motivation
1
1.2 Scopes of Work
4
1.3 Outline of the Project Report
4
OVERVIEW OF CARBON NANOTUBE
2.1 Introduction of carbon nanotube and why we
6
choose it
2.2 Physic of Carbon Nanotube
8
2.2.1
Hybridization
9
2.2.2
Carbon Nanotube Molecular structure
11
2.2.3
Chiral Vector
12
2.2.4
Metallic and Semiconducting Nanotube
17
viii
2.3 Summary
3
19
CARBON NANOTUBE FIELD EFFECT
TRANSISTOR TECHNOLOGY AND
LITERATURE REVIEW
4
3.1 Introduction
20
3.2 Type of CNTFET
23
3.2.1
Back gate CNTFET
23
3.2.2
Top gate CNTFET
28
3.2.3
Others CNTFET
31
3.3 Current Available CNT Technology
38
3.4 Process to build a Top Gate CNTFET
41
3.5 Summary
42
METHODOLOGY OF IMPLEMENTATION
4.1 Basic theory
43
4.1.1
Transport Mechanism
44
4.1.2
Drain Current
46
4.2 Self-consistent simulation scheme and NEGF
49
formulism
5
4.2.1
Self-Consistent
50
4.2.2
NEGF formulism
51
4.3 Step-by-Step of implementation
54
4.4 Summary
59
RESULT ANALYSIS AND DISCUSSION
5.1 Result and discussion from the simulation
60
5.1.1
Potential energy profile along the channel
61
5.1.2
90nm technology (80nm Gate Length)
62
studies
5.1.3
Comparison process shrink IV
64
characteristic
5.2 Oxide Thickness
66
ix
6
5.3 Diameter CNT effect on Drain Current
67
5.4 Summary
69
CONCLUSION AND FUTURE WORK
6.1 Conclusion
70
6.2 Future Work
72
73
REFERENCES
APPENDIX A
Matlab source code
76
APPENDIX B
The source/drain self-consistent in real space
82
APPENDIX C
Model Hamiltonian
84
APPENDIX D
Local Density of States
89
x
LIST OF TABLES
TABLE
NO.
TITLE
PAGE
2.1
Isomers made of carbon
10
2.2
Classification of carbon Nanatube
16
3.1
Comparison of key performance parameters for CNTFET and
30
MOSFETs
3.2
Comparison of device parameters for a 260nm long CNTFET
against state of the art Si MOSFETs.
40
xi
LIST OF FIGURES
FIGURE
NO.
TITLE
PAGE
1.1
Moore’s Law and IC technology projection
2
2.1
Electron micrographs of the first (multi wall) carbon nanotubes
8
and cross sections.
2.2
Formation of carbon nanotube from graphite sheet, nanotube
11
structure with fullerene ‘cap’ and fullerene molecule
2.3
Definition of chiral vector in the hexagonal lattice
12
2.4
Some chiral vector directions with different values of (n, m)
15
are shown
2.5
Different chiral vectors in unfolded carbon nanotube lattice
15
2.6
Different of the armchair and zigzag nanotube
16
2.7
Possible chiral vectors for a nanotube. The solid circles and
17
open circles denote metallic and semiconducting tubes
respectively
2.8
Metallic and semiconducting carbon nanotube.
18
2.9
Electronic properties of 2 different carbon nanotube
19
3.1
Early CNTFET structure. The CN is draped over noble metal
21
source and drain electrodes.
3.2
Tapping-mode AFM image of an individual carbon nanotube
23
on top of three Pt electrodes.
3.3
Suggested band diagram of the device
24
3.4
Two probe I–Vbias curves for various values of the gate voltage
25
(Vgate).
xii
3.5
Output characteristics of SWNT FET measured for VG= -
26
6,0,1,2,3,4,5 and 6 V. Transfer characteristic.
3.6
I-V characteristics of p-type CNTFET employing metallic Co
27
or TiC contacts
3.7
Schematic side view of a bottom gate CNTFET
28
3.8
Schematic cross section of top get CNTFET
29
3.9
Schematic diagram of the potassium doping setup.
31
3.10
Variation of conductance with gate voltage in MW CNTFET at
34
different temperatures
3.11
CNTFET (presented by Infineon Technology in Nov 2003).
34
3.12
The processes to build a vertical CNTFET
35
3.13
CNTFET vs Si-MOSFET projections
36
3.14
Logic device ("NOT" gate) made with two ambipolar
37
CNTFETs
3.15
Intra-nanotube inverter
38
3.16
Single walled carbon nanotube bundles
39
3.17
Process of Top Gate CNTFET
41
4.1
Qualitative response of the nanotube conduction and valence
44
band on the gate voltage for a fixed negative source-drain
voltage
4.2
Carbon nanotube FET model geometry
47
4.3
Generic transistor with coupled source/drain contact
52
4.4
Self-consistent iteration between the NEGF transport and
52
electrostatic Poisson equation
4.5
The diagram is an example of (n,0) zigzag nanotube
55
4.6
CNTFET model
57
4.7
Flow chat of the simulation process
58
5.1
Energy profile
61
5.2
The energy profile along the channel when the VD and VG =
62
0.6; and ID = 13.9uA when VD and VG = 0.6.
5.3
80nm channel length CNTFET ID/VG plot
63
5.4
80nm channel length CNTFET ID/VD plot
63
5.5
IV characteristic of 80nm channel length MOSFET plot
64
xiii
5.6
80nm channel length vs. 40nm channel ID/VD plot.
65
5.7
2nm oxide thickness IV characteristic
66
5.8
(a) ~2.5 nm diameter CNT transistor, (b) ~1.3 nm diameter
68
CNT transistor. Oxide thickness is 2nm. Data obtained from
Joerg Appenzeller IBM
5.9
The IV characteristic of 1nm and 2nm diameter CNT transistor
68
B1
Computing the source self-energy for a zigzag nanotube
83
C1
The channel of the devices represented by an atomistic
84
Hamiltonian matrix
C2
The effective mass Hamiltonian matrix in 1D can be visualized
86
as a 1D array of unit cells each with energy Ec + 2t0 bonded to
its nearest neighbors by -- t0
C3
The effective mass Hamiltonian matrix can be depicted
86
schematically as a 3D network of unit cells
C4
The effective mass change from m1 to m2 Hamiltonian matrix
87
D1
A channel connected to one contact. The set of discrete levels
90
broaden into continues density of state as shown
D2
a\A channel described by [H] is connected though [τ] to a
90
contact described by [HR]
D3
A channel with a single energy level s coupled to a reservoir
91
with a dense set of energy levels {εR}. The local density of
states on the channel shows a single sharp level before being
coupled to the reservoir.
D4
1D wire modeled with a one-band effective mass Hamiltonian
96
D5
1D wire with a single unit cell and add self-energy terms to
96
account for the two semi-infinite wires on either side
D6
1D wire modeled effective mass Hamiltonian
97
xiv
LIST OF SYMBOLS
Usc
Self-consistent potential at top barrier
q
Electronic charge
h
Planck’s constant (eV-s)
ID
Drain current
Ion
On-current
Ioff
Leakage current
kB
Boltzman’s constant (eV/K)
E
Fermi level
T
Operating Temperature
H
Hamiltonian matrix
Ε0
Permittivity of free space
m
Free electron mass
ρ
Density matrix
xv
LIST OF APPENDICES
APPENDIX
TITLE
PAGE
A
Matlab Cobe
76-81
B
The source/drain self-energies in real space
82-83
C
Model Hamiltonian
84-88
D
Local Density of States
89-97
CHAPTER 1
INTRODUCTION
This project proposes a ballistic carbon nanotube field effect transistor
modeling with applying quantum transport concept and analyzing the output of the
transfer characteristic (I-V characteristic) with different parameter on input and
comparing the result with conventional MOSFET. In this chapter, we will present the
background and research motivation, scopes of project. The chapter will end with
outline of the project report.
1.1
Background and Research Motivation
The progress in silicon technology continues to outpace the historic pace of
Moore's Law, but the end of device scaling now seems to be only 10-15 years away.
Therefore, it is of intense interest to find new, molecular-scale devices that might
complement a basic silicon platform by providing it with new capabilities - or that
might even replace existing silicon technology and allow device scaling to continue
to the atomic scale. As device sizes approach the nanoscale, new opportunities arise
from harnessing the physical and chemical properties at the nanoscale. Chemical
2
synthesis, self-assembly, and template self-assembly promise the precise fabrication
of device structures or even the entire functional entity. Quantum phenomena and
dimensional transport may lead to new functional devices with very different
power/performance tradeoffs. New materials with novel electronic, optical, and
mechanical properties emerge as a result of the ability to manipulate matter on a
nanoscale. It is now feasible to contemplate new nanoelectronic systems based on
new devices with completely new system architectures, for examples: - nanotubes,
anowires, molecular devices, and novel device concepts for nanoelectronics.
Of the various material systems and structures studied so far, carbon
nanotubes have shown particular promise owing to their nanoscale size and unique
electronic properties. Recently carbon nanotube field effect transistors (CNTFETs)
have been fabricated successfully. It is reported that they have shown better
performance than present silicon transistors of equivalent size.
(a)
(b)
Fig 1.1: (a) Moore’s Law and (b) IC technology projection.
As the MOSFET gate length enters nanometer scale, however, short channel
effect such as threshold voltage roll-off and drain-induced-barrier-lowering (DIBL)
[1, 2] become increasingly significant, which limits the scaling capability of planar
bulk or silicon-on-insulator (SOI) MOSFET. Several leakage current mechanisms in
MOSFET such as reverse-bias p-n junction current, weak inversion current and drain
induced barrier lowering (DIBL) current [3] are being introduced by short-channel
3
effect. Tunnelling effect in nano scale MOSFET is also impacting the performance of
the transistor. Normally the separation between 2 transistors is made by inserting
material that acts as a barrier. However, come to nano-scale transistor the transistor
size and the distance between 2 transistor is also been scaled down, it cause the
carries of 1 MOSFET cross the barrier and effect to another MOSFET are close to it.
The tunnelling effect increasing exponentially as the barrier distance is decreased.
Threshold voltage and gate oxide thickness are major issues/factor to introduce the
leakage current in nano-scale MOSFET transistor.
Scaled down the conventional MOSFET not only bring to transistor
performance issues but also to fabrication problem. The limitation of the MOSFET
technology due to the fact that Zener breakdown will occur at source/substrate
junction, lithography limitation and also the yield control for the product are the
limitation to continue scaled the conventional MOSFET into smaller sizes.
The low carrier mobility in silicon (compared to carbon nonotube) maybe
also degrades the MOSFET transistor performance. For those reasons, the new
devices CNTFET, new channel materials, is being extensively explored.
This project work is used same 90nm technology transistor channel length to
prove the CNTFET can provide better transistor performance compared to
conventional MOSFET technology. The data collected from the simulation will be
compared to conventional equivalent MOSFET technology and conclude with some
analysis studies. With this data, the challenging for fabrication in sub-nanometer can
be reducing. The experiments also will carry-out with differences parameter of
voltage supply, diameter of Carbon Nanotube, oxide thickness and channel length to
studies the effect of CNTFET transistor performance.
4
1.2
Scopes of Work
Based on available resources, limited time frame and expertise, this research
project is narrowed down to the following scope of work:
1. Studying the quantum transport mechanism and applied the concept into
ballistic CNTFET modeling by using MATLAB program.
2. Simulate the transfer characteristic and collecting data.
3. Analyze the simulation result and compared to conventional MOSFET
transistor performance and conclude the output.
4. Input differences parameter of voltage supply, properties of Carbon
Nanotubes, oxide thickness and channel length and studies the effect to
CNTFET performance.
1.3
Outline of the Project Report
This report is organized into six chapters. The first chapter will covers the
background, problem statement, objectives and the scopes of the project.
In chapter 2, we mainly are giving some brief introduction on physic of
Carbon Nanotube and the reason of why choose Carbon Nanotube. Some of the
detail of the physic for example hybridization, Carbon Nanotube Molecular structure,
Chiral Vector and Metallic and Semiconducting Nanotube also will be covered in
this chapter.
5
Chapter 3 will summarize the current Carbon Nanotube FETs and some
future CNTFET concept being proposed by the researchers. Some of the current
available technology for CNTFET manufacturing and a brief idea on Top gate
CNTFET fabrication also will be covered.
Chapter 4 outlines some methodology of implementation for Ballistic
CNTFET Modeling. The chapter will start with the basic theory of transport
mechanism and drain current studies. The quantum transport solver NEGF formulism
will also been covered in this chapter in order to provide a better understanding for
the entire modeling. Step-by-step of implementation will be detail discuss in the
following session, and hardware/software for this project will be listed as well.
Chapter 5 presents the studies of the simulation result and the analysis of this
project.
Finally in Chapter 6, concludes the whole thesis and gives the direction or
recommendation for future work.
CHAPTER 2
OVERVIEW OF CARBON NANOTUBE
This chapter mainly are giving some brief introduction on physic of Carbon
Nanotube, the reason of why choose Carbon Nanotube, and some history and
introduction about Carbon Nanotube FET.
2.1
Introduction of Carbon Nanotube and Why We Choose It
Carbon nanotubes, long, thin cylinders of carbon, were discovered in 1991 by
S. Iijima. These are quasi-one-dimensional molecular structures and can be
considered as a result of folding graphite (a hexagonal lattice of carbon) layers into
cylinders. They may be composed of a single shell namely single wall nanotube
(SWNT) or of several shells namely multi wall nanotube (MWNT). The notable
properties of carbon nanotubes are:
1. Carbon nanotubes can be metallic, semiconducting, or insulating depending
on their length, diameter and rolling helicity, and do not requiring any
doping.
7
2. The energy gap of semiconducting carbon nanotubes can be varied
continuously by varying the nanotube diameter. Here the band gap of
semiconducting nanotubes decreases with increasing diameter.
3. Individual carbon nanotubes are able to carry electrical current at
significantly higher densities than most metals and semiconductors
(maximum current density ~1013 A/m2).
4. Nanotubes have high thermal conductivity (~2000 W/m/K, whereas copper
has 400 W/m/K).
5. Nanotubes are also inert and have no surface states, making them very
compatible with other materials such as oxides.
6. Nanotubes can be either grown at specific locations, or simply dispersed from
solution.
7. A nanotube device will consume less power than an equivalent Si device.
These properties make carbon nanotubes a better choice than other molecular
devices. Cutting edge research is focused on developing various devices from carbon
nanotubes and on utilizing their unique properties in semiconductor technology for
minimum possible feature sizes. Carbon nanotube field effect transistor is a novel
outcome of this research. The coming chapter will discuss in detail on the carbon
nanotube material properties and with the explanation; we strongly believe that
Carbon Nanotube FET can provide a better devices characteristics compared to the
conventional MOSFET.
8
2.2
Carbon Nanotube Physic
Carbon-based materials, clusters and molecules are unique in many ways. In
this section we will go through such properties of carbon atom that constitutes the
nanotube. The nanotube is essentially a sheet of graphitic carbon rolled into a tube.
The tubes can have many different chiral structures, each with unique electrical
properties. If one imagines slicing a graphite sheet and rolling it up to form the tube,
then the different chiral structures are formed by cutting the sheet at varying angles
before rolling.
Fig 2.1 Electron micrographs of the first (multi-wall) carbon nanotubes. Crosssections are shown for each: (a) five sheets with outer diameter 6.7 nm, (b) two
sheets with outer diameter 5.5 nm, and (c) seven sheets with outer diameter 6.5 nm
and inner diameter 2.2 nm. Fig credit: Sumio Iijima, 1991 in Nature.
9
2.2.1
HYBRIDIZATION
One distinct property of carbon atom is the many possible configurations of
the electronic states, which is known as the hybridization of atomic orbital.
Hybridization is of great importance to have an idea about the family of carbon
materials.
Carbon (C) is the sixth element of the periodic table and is listed at the top of
group IV. Each carbon atom has six electrons, which occupy 1s2, 2s2, and 2p2 atomic
orbitals. The 1s2 orbital contains two strongly bound electrons, and they are called
core electrons. Four electrons occupy the 2s22p2 orbitals, and these more weakly
bound electrons are called valence electrons. In the crystalline phase the valence
electrons give rise to 2s, 2px, 2py, and 2pz orbitals, which are important in forming
covalent bonds in carbon materials. Since the energy difference between the upper 2p
energy levels and the lower 2s level in carbon is small compared with the binding
energy of the chemical bonds, the electronic wave functions for these four electrons
can readily mix with each other, thereby changing the occupation of the 2s and three
2p atomic orbitals so as to enhance the binding energy of the C atom with its
neighbouring atoms. This mixing of 2s and 2p atomic orbitals is called hybridization,
whereas the mixing of a single 2s electron with n=1,2,3 2p electrons is called spn
hybridization.
In carbon, three possible hybridizations occur: sp, sp2 and sp3; other group IV
elements such as Si, Ge exhibit primary sp3 hybridization. Carbon differs from Si and
Ge insofar as carbon does not have inner atomic orbitals except for the spherical 1s
orbitals, and the absence of nearby inner orbitals facilitates hybridizations involving
only valence s and p orbitals for carbon. The lack of sp and sp2 hybridization in Si
and Ge might be related to the absence of ‘organic materials’ made of Si and Ge.
The spn hybridization is essentials for determining the dimensionality of not only
carbon-based molecules, but also carbon-based solids. Carbon is the only element in
the periodic table that has isomers from 0 dimensions (0D) to 3 dimensions (3D), as
shown in Table 2.1. Here we introduce possible structures of carbon materials in the
solid phase, which are closely related to the spn hybridization.
10
Table 2.1: Isomers made of carbon
In spn hybridization, (n+1) σ bonds per carbon atom are formed, these σ
bonds making a skeleton for the local structure of the n-dimensional structure. In sp
hybridization, two σ bonds make only a one-dimensional chain structure, which is
known as a ‘carbyne’. A three-dimensional solid is formed by gathering these
carbine chains. In sp3 hybridization, four σ bonds defining a regular tetrahedron are
sufficient to form a three-dimensional structure known as the diamond structure. It is
interesting that sp2 hybridization which forms a planar structure in two-dimensional
graphite also forms a planar local structure in the closed polyhedra (0D) of the
fullerene family and in the cylinders (1D) called carbon nanotubes. Closely related to
carbon nanotubes are carbon fibers, which are macroscopic one-dimensional
materials, because of their characteristic high length to diameter ratio. A carbon
fiber, however, consists of many graphitic planes and microscopically exhibits
electronic properties that are predominantly two-dimensional. Amorphous carbon is
a disordered, three-dimensional material in which sp2 and sp3 hybridization is both
present randomly. Amorphous graphite, which consists mainly of sp2 hybridization,
is graphite with 9 random stacking of graphitic layer segments. Because of the weak
interplanar interaction between two graphite planes, these planes can move easily
relative to each other, thereby forming a solid lubricant. In this sense, amorphous
graphite can behave like a two-dimensional material. Under ambient conditions and
in bulk form, the graphite phase with strong in-plane trigonal bonding is the stable
phase of carbon.
11
2.2.2
Carbon Nanotube Molecular Structure
The carbon nanotube is the forth stable structure of carbon after diamond and
graphite and fullerene. An ideal nanotube can be thought of as a hexagonal network
of carbon atoms (that form crystalline graphite) that has been rolled up to make a
seamless cylinder [Fig-2.2(i),(ii)]. Just a nanometre across, the cylinder can be tens
of microns long, and each end is "capped" with half of a fullerene molecule. Singlewall nanotubes can be thought of as the fundamental cylindrical structure, and these
form the building blocks of both multi-wall nanotubes and the ordered arrays of
single-wall nanotubes called ropes.
Fig 2.2: i) Formation of carbon nanotube from a graphite sheet; ii) Nanotube
structure with fullerene ‘cap’; iii) A fullerene (C60) molecule.
Since Carbon Nanotubes are constructed of hexagonal networks, the carbon
atoms contain an sp2 hybridization. Among the 4 valence electrons of carbon atom
the first three electrons belong to the σ-orbital and are at energies -2.5 eV below the
Fermi Level; therefore, they do not contribute to conduction. The fourth valence
electron, however, is located in the π-orbital, which is slightly below the Fermi
Level; therefore, this electron is predicted to control conduction and transport
12
properties. This corresponds to the valence band of the energy diagram. The antibonding π-orbital is slightly above the Fermi level, which corresponds to the
conduction band in an energy diagram.
2.2.3
Chiral Vector
The structure of single-wall carbon nanotube (except for cap region on both
ends) is specified by a vector of original hexagonal (also called honeycomb) lattice
called the chiral vector. The chiral vector corresponds to a section of nanotube
perpendicular to the tube axis. In Fig. 2.3, the unrolled hexagonal lattice of the
nanotube is shown, in which OB is the direction of the nanotube axis, and OA
corresponds to the chiral vector, Ch.
Fig 2.3: Definition of chiral vectors in the hexagonal lattice.
By considering the crystallographically equivalent sites O, A, B and B’, and
by rolling the honeycomb sheet so that points O and A coincide (and points B and B’
coincide), a paper model of carbon nanotube can be constructed. The vector OB
13
defines another vector named translational vector, T. The rectangle generated by the
chiral vector Ch and translational vector T, i.e. the rectangle OAB’B in Fig 2.3 is
called the unit cell for the nanotube. The chiral vector of the nanotube is defined as,
Ch = na1 + ma2
(2.1)
where n, m are integers (0≤ |m| ≤ n) and a1, a2 are the unit vectors of the hexagonal
lattice. In Fig 2.3, a1 and a2 can be expressed using the Cartesian coordinate (x, y) as,
a1 = (3/2 acc, √3/2acc)
(2.2)
a2 = (3/2 acc, -√3/2acc)
(2.3)
Here, acc is the bond length of carbon atoms. For graphite acc = 1.42 Å. This same
value is often used for nanotubes. But, acc = 1.44 Å is a better approximation for
nanotubes. It should really depend on the curvature of the tube. A slightly larger
value for more curvature is known.
We see from equations (2.2) and (2.3) that the lengths of a1, a2, i.e. |a1|, |a2|
are both equal to √3acc = a. Therefore, a is the unit length and this is also the lattice
constant. Hence a1, a2 can be expressed in terms of lattice constant,
a1 = (√3/2, 1/2)a
(2.4)
a2 = (√3/2, 1/2)a
(2.5)
Length of the chiral vector is the peripheral length of the nanotube:
L = C h = a n 2 + nm + m 2
(2.6)
The angle between the vectors Ch and a1 is called chiral angle θ. It denotes the tilt
angle of the hexagons with respect to the direction of the nanotube axis, and it
specifies the spiral symmetry. The chiral angle θ is defined by taking the inner
product of Ch and a1, to yield an expression for cos θ:
14
cos θ =
C h a1
2n + m
=
2
C h a1 2 n + nm + m 2
(2.7)
From this expression it can be shown that the chiral angle,
⎡
3m ⎤
⎥
⎣ 2n + m ⎦
θ = tan −1 ⎢
(2.8)
The tube diameter is then given by,
dt =
L
π
=
a
π
n 2 + nm + m 2
(2.9)
The translational vector T, which is perpendicular to the chiral vector, is expressed
as,
T = [(2m + n)a1 − (2n + m)a 2 ] / d R
(2.10)
The length T is the unit lattice length along the tube axis direction:
T = 3C h / d R = 3acc n 2 + nm + m 2 / d R
(2.11)
15
Here,
dR =
d if n-m is not a multiple of 3d
3d if n-m is a multiple of 3d
and d is the highest common divisor of (n,m).
The number of hexagons in a unit cell is given by,
N = 2(n2 + nm + m2)/dR
(2.12)
Fig 2.4 some chiral vector directions with different values of (n, m) are shown
Fig 2.5: Different chiral vectors in unfolded carbon nanotube lattice
An achiral carbon nanotube is defined by a carbon nanotube whose mirror image has
an identical structure to the original one. There are only two cases of achiral
nanotubes:
a) armchair and
b) zigzag nanotubes.
16
The names of armchair and zigzag arise from the shape of the cross-sectional
ring, as shown at the edge of the nanotubes in Fig. 2.6 (ii) (a) and (b). An armchair
nanotube corresponds to the case of n = m, that is Ch = (n,n); and a zigzag nanotube
corresponds to the case of m = 0 or Ch = (n,0).
Fig 2.6: showed the different of the armchair and zigzag nanotube
Chiral nanotubes exhibit a spiral symmetry whose mirror image cannot be
superposed on to the original one. All (n,m) chiral vectors other than (n,n) and (n,0)
correspond to chiral nanotubes. Because of the hexagonal symmetry of the lattice, we
need to consider only 0 < |m| < n in Ch = (n,n) for chiral nanotubes. Table 2.2 shows
the classification of nanotube and corresponding characteristics.
Table 2.2: Classification of carbon Nanatube
17
2.2.4
Metallic and Semiconducting Nanotube
There are certain conditions expressed in terms of n,m for a nanotube to be
metallic or semiconducting. The condition for the metallic nanotube is that (2n+m) or
equivalently (n-m) is a multiple of 3. Therefore, the armchair nanotubes (n,n) are
always metallic, and the zigzag nanotubes (n,0) are only metallic when n is a
multiple of 3. For a semiconducting nanotube (n-m) is not a multiple of 3. Thus to
form (paper model) a metal or semiconducting nanotube with the corresponding
chiral vector, the graphite sheet is rolled up, where the point given by the chiral
vector (n,m) coincides with the (0,0) point. Fig 2.7 shows which nanotubes will be
metallic and which will be semiconducting. Fig 2.8 shows the metallic and
semiconducting nanotubes more clearly.
Fig 2.7: Possible chiral vectors for a nanotube. The solid circles and open circles
denote metallic and semiconducting tubes respectively.
18
Fig 2.8: Metallic and semiconducting carbon nanotube.
Metallic nanotubes are used as Coulomb islands in single-electron transistors.
Where as, semiconducting nanotubes are used as the channel in field effect
transistors.
The bandgap of a single wall nanotube (SWNT) is given by,
Eg = 2γ 0 acc / d t
(2.13)
Where γ0 is the carbon-to-carbon tight-binding overlap energy, acc is the bond length
of carbon atoms and dt the tube diameter. A typical semiconducting SWNT has a
diameter of 1.4 nm and a bandgap of about 0.5– 0.65 eV.
The densities of states for metallic and semiconducting nanotubes are shown
in Fig 2.9.
19
Fig 2.9:
Electronic properties of two different carbon nanotubes. The Armchair
(5,5) nanotube (Upper) exhibits a metallic behavior (finite value of charge carriers in
the DOS at the Fermi energy). The Zigzag (7,0) nanotube (Lower) is a small gap
semiconductor (no charge carriers in the DOS at the Fermi energy). Sharp spikes in
the DOS are Van Hove singularities. [3, 4]
2.3
Summary
As a summary of this chapter, I would like to highlight the properties of the
Carbon Nanotube is strongly recommended to replace a transistor channel to
overcome some of the nano-scale MOSFET issues. Chapter 3 we will continue to
review some of the current proposed CNTFET transistor and the process.
CHAPTER 3
CARBON NANOTUBE FIELD EFFECT TRANSISTOR TECHNOLOGY
AND BACKGROUND
This chapter we will summarize the current proposed Carbon Nanotube FETs
structure and some future CNTFET concept being proposed by the researchers. Some
of the current available technology for CNTFET manufacturing and a brief idea on
Top gate CNTFET fabrication also will be covered in this chapter.
3.1
Carbon Nanotube Field Effect Transistor Introduction
The first carbon nanotube field-effect transistors were reported in 1998.
These were simple devices fabricated by depositing single-wall CNTs (synthesized
by laser ablation) from solution onto oxidized Si wafers which had been prepattemed
with gold or platinum electrodes. The electrodes served as source and drain,
connected via the nanotube channel, and the doped Si substrate served as the gate. A
schematic of such a device is shown in Fig. 3.1. Clear p-type transistor action was
observed, with gate voltage modulation of the drain current over several orders of
magnitude. The devices displayed high on-state resistance of several MQ, low
21
transconductance (-Ins) and no current saturation, and they required high gate
voltages (several volts) to turn them on.
Fig 3.1: Early CNTFET structure. The CN is draped over noble metal source and
drain electrodes. The doped Si substrate serves as the gate. Presented in year 1998.
Following these initial CNTFET results advances in CNTFET device
structures and processing yielded improvements in their electrical characteristics.
Rather than laying the nanotube down upon the source and drain electrodes, relying
on weak van der Waals forces for contact, the electrodes were patterned on top of
previously laid down CNs. In addition to Au, Ti and CO were used, with a thermal
annealing step to improve the metal/nanotube contact. In the case of Ti, the thermal
processing leads to the formation of TiC at the metal/nanotube interface, resulting in
a significant reduction in the contact resistance - from several MΩ to – 30 kΩ. Onstate currents ~1 µA were easured, with transconductance - 0.3 µS.
All early CNTFET were p-type, i.e., hole conductors. Whether this was due
to contact doping or doping by the adsorption of oxygen from the atmosphere was
initially unclear. N-type conduction was achieved by doping from an alkali (electron
donor) gas and by thermal annealing in vacuum. Doping by exposure to an alkali gas
involves charge transfer within the bulk of the nanotube, analogous to doping in
conventional semiconductor materials. On the other hand, annealing a CNTFET in
vacuum promotes electron conduction via a completely different mechanism: the
presence of atmospheric oxygen near the metal/nanotube contacts affects the local
bending of the conduction and valence bands in the nanotube by way of charge
transfer, and the Fermi level is pinned close to the valence band, making it easier for
22
injection of holes. When the oxygen is desorbed at high temperatures, the Fermi level
may line up closer to the conduction band, allowing injection of electrons. Contrary
to the case of bulk doping, there is no threshold voltage shift when going from p-type
to n-type by thermal annealing. In addition, it is possible to achieve an intermediate
state, in which both electron and hole injection are allowed, resulting in ambipolar
conduction.
The ability to make both p-type and n-type CNTFETs enabled the first carbon
nanotube CMOS circuits. These were demonstrated by Derycke et al., who built
simple CMOS logic gates, including an inverter in which the two CNTFETs were
fabricated using a single carbon nanotube. Subsequently, more complex CN-based
circuits have been built as well.
Carbon nanotube field effect transistor (CNTFETs) uses semiconducting
carbon nanotube as the channel. Both p-channel and n-channel devices can be made
from nanotubes. The physical structure of CNTFETs is very similar to that of
MOSFETs and their I-V characteristics and transfer characteristics are also very
promising and they suggest that CNTFETs have the potential to be a successful
replacement of MOSFETs in nanoscale electronics. Of course, there are some
distinct properties of CNTFETs, such as:
▪ the carbon nanotube is one-dimensional, which greatly reduces the scattering
probability. As a result the device may operate in ballistic regime.
▪ the nanotube conducts essentially on its surface where all the chemical bonds are
saturated and stable. In other words, there are no dangling bonds which form
interface states. Therefore, there is no need for careful passivation of the interface
between the nanotube channel and the gate dielectric, i.e. there is no equivalent of the
silicon/silicon dioxide interface.
▪ The Schottkey barrier at the metal-nanotube contact is the active switching element
in an intrinsic nanotube device.
With these unique features CNTFET becomes a device of special interest.
23
3.2
Type of CNTFET
The field effect transistors made of carbon nanotubes so far can be classified
into two types:
a) Back gate CNTFET
b) Top gate CNTFET
Other then this 2 biggest classes, some semiconductor company have been proposed
their own new/next generation Carbon Nanotube FET such as Infineon introduced
their vertical carbon nanotube FET (VCNTFET) concept in year 2003 also listed in
this chapter for future references.
3.2.1
Back Gate Carbon Nanotube Field Effect Transistor
The first field effect transistor built from carbon nanotube is back gate type.
Tans et al. have built this transistor with a semiconducting single wall carbon
nanotube. They had previously reported a similar transistor with a metallic single
wall nanotube operating at extremely low temperature. On the other hand, the present
transistor they made operates at room temperature and hence is suitable for practical
applications. The transistor has a SWNT bridging the platinum source and drain,
which are deposited on gate oxide film on a doped silicon wafer. The Si wafer is
used as a back gate. Fig 3.2 shows the atomic force microscopy (AFM) image of the
device.
24
Fig. 3.2
a) Tapping-mode AFM image of an individual carbon nanotube on
top of three Pt electrodes.
b) Schematic side view of the device. A single semiconducting
nanotube is contacted by two electrodes. The Si substrate, which is
covered by a layer of 300 nm thick SiO2, acts as a back-gate.
In the energy diagrams of Fig 3.3 (a) and (b) the electronic structure and functioning
of the single carbon nanotube back gate field-effect transistor is shown. The charge
carriers flow through the part of the tube that is on top of the source (A), on the SiO2
surface (B), and on the drain electrode (C) (see also Fig 3.2 (b)).
Fig 3.3: a) Suggested band diagram of the device. The nanotube is connected to the
leads with Fermi energy EF by tunnelling contacts, indicated by the
black vertical bars.
b) Application of a bias voltage results in a suppression of the barrier.
Semiconducting tubes with a 1.4 nm diameter have a bandgap of 0.6 eV. As
for a traditional semiconductor–metal interface, a difference in work function will
result in bending of the bands of the semiconductor. The work function of Pt is 5.7
eV, whereas the work function of carbon nanotubes is near 4.5 eV. Owing to this
difference, a local polarization layer will develop on the electrode–nanotube interface
25
until the nanotube valence band edge aligns with the Fermi level of the metal
electrode. Such pinning of the valence band edge to the Fermi level of the electrode
was observed in scanning tunnelling spectroscopy experiments of semiconducting
nanotubes on Au (111). Away from the electrodes, the bands bend to lower energy
(Fig 3.3(a) segment B). A gate voltage will not have a strong effect on the nanotube
at position A and C owing to the screening of the nearby metallic leads and the
capacitive coupling between the tube and the leads. In segment B, however, the
electric field of the gate electrode will couple to the tube. For negative gate voltage
this will lead to an accumulation of holes and an increasing conductance, whereas for
a positive gate voltage the holes are depleted, yielding a lower conductance. Cooling
the sample to 160 K, the metallic saturation resistance (Vgate < -3 V) increases from 1
to 4 MΩ. For a metallic tube, same room temperature resistance of 1 MΩ and a
similar dependence on temperature have been found. This result supports the band
diagram described above (Fig-3.3(a)) because the model predicts that in segments A
and C the tube should be metal-like owing to the pinning of the valence band edge.
Fig 3.4 shows the I–Vbias curves for the CNTFET shown in Fig 3.2.
Fig 3.4: Two probe I–Vbias curves for various values of the gate voltage (Vgate). Inset,
conductance at Vbias = 0 as a function of Vgate .
26
A similar p-channel CNTFET was fabricated by Martel et al. with Au as the
source and drain metal. Figs 3.5 show the output (I vs. Vsd) and transfer (I vs. VG)
characteristics of their SWNT FET.
Fig 3.5:
a) Output characteristics of SWNT FET measured for VG= -6,0,1,2,3,4,5
and 6 V.
b) Transfer characteristics of SWNT FET for VSD=10-100 mV in
steps of 10mV. The inset shows that the gate modulates the
conductance by 5 orders of magnitude (VSD =10 mV).
The total resistance between source and drain is given by, R=RNT+2RC,
where RNT denotes the gate dependent resistance of the nanotube and RC represents
the metal-nantube contact resistance. For VG <0, the I vs. VG curves saturates
indicating that the contact resistance starts to dominate the total resistance of the
device.
The types of back gate CNTFETs discussed so far have high contact
-9
resistances (≥1 MΩ), which led to a low transconductance gm (=dI/dVG) of about 10
A/V. This large contact resistance results from the weak van der Waals coupling of
the devices to the noble metal electrodes in the ‘side-bonding’ configuration used. To
reduce the contact resistance Phaedon Avouris from IBM has demonstrated an
alternative back gate CNTFET configuration. Here the SWNT is dispersed on top of
the SiO2 film, and then source and drain electrodes made of transition metals
27
compatible with silicon technology, such as Ti or Co, are fabricated on SWNT.
Subsequent anneals at 400º C (Co) and, or at 820º C (Ti) in an inert ambient, form
low resistance Co contacts or TiC contacts at the source and drain electrodes.
Fig 3.6 shows I-V characteristics of p-type CNTFET employing metallic Co or TiC
contacts.
Fig 3.6: Output (top) and transfer characteristics of CNTFETs with cobalt and
titanium-carbide contacts. The inset (top) shows schematically the structure of the
devices.
These new ‘end-bonded’ CNTFETs have drastically improved contact
resistances and transconductances. For example, the device with Co contact has
-7
contact resistance of about 25 kΩ and a transconductance of 3.4 × 10 A/V.
28
3.2.2
Top Gate Carbon Nanotube Field Effect Transistor
CNTFETs discussed so far use the conductive substrate as a back-gate
electrode, usually with gate dielectrics of considerable thickness (~100 nm or more).
As a result, high gate voltages are required to turn these devices on. In addition, use
of the substrate as a gate implies that all devices on the substrate are turned on
simultaneously, precluding operation of all but the most basic gate structure used in
that work, as well as in other previously published CNTFET studies, has an open
geometry, in which the CNT is exposed to air. This presents an electrostatic
disadvantage in that the gate insulator capacitance is diluted by the lower dielectric
constant of the air surrounding the CNT circuits. Recently, Bachtold et al. reported
an improved back-gate structure with a very thin (~2–5 nm) gate dielectric and with
individual field-effect transistor (FET) gating (Fig 3.7). Those devices did show low
gate voltage operation and individual switchability. However, the bottom
Fig 3.7:
Schematic side view of a bottom gate CNTFET with thin gate oxide and
low gate turn-on voltage. The Al wire covered by a few-nanometers-thick oxide layer
works as gate.
On the other hand, in the top gate geometry (Fig 3.8(a)) as reported by Wind
et al., the CNT is completely embedded within the gate insulator, offering the full
advantage of the gate dielectric. A further disadvantage of the open geometry is that
exposure of CNTs to air leads to p-type characteristics. In contrast, this top gate
structure allows the fabrication of both n-type as well as p-type devices. An
additional advantage is that with only slight modification, it can be made suitable for
high-frequency operation, which is not possible with back-gated devices due to the
large overlap capacitance between the gate, source, and drain. These features make
29
the top gate devices the most technologically relevant CNT transistors fabricated so
far, and they allow for a more direct comparison with mainstream silicon-based
MOSFETs. Fig 3.8(b) shows the top gate structure of CNTFET with its I-V
characteristics.
Fig 3.8 :
a) Schematic cross section of top gate CNTFET.
b) Output characteristics of the same CNTFET with a Ti gate and a
gate oxide thickness of 15nm. Inset: Transfer characteristics of the
CNTFET for Vds= -0.6V.
The device shown in Fig 3.8 shows excellent turn on and saturation at gate
voltages ~1V. The maximum transconductance is 3.25 μS, which is an extremely
high value for a CNTFET device as compared to previously reported CNTFETs. The
inset in Fig 3.7(b) shows the transfer characteristic for the same device. The linearly
extrapolated threshold voltage is –0.5 V and the inverse subthreshold slope for top
gate operation is ~130 mV/decade.
As these electrical results are exceptional for CNT-based devices, it is
appropriate to gauge their performance relative to the dc characteristics of state-ofthe-art planar silicon MOSFETs. Table 3.1 shows key performance parameters for
the CNTFET shown in Fig 3.8(a) and for two recently published high performance Si
p-channel devices: a 15 nm gate length MOSFET built on bulk Si reported by Bin Yu
et al. , which shows very high transconductance; and a 50 nm gate length device
reported by Robert Chau et al. , which is built using thin silicon-on-insulator (SOI)
30
technology. The restricted geometry of the thin SOI in the second device offers a
good comparison for the one-dimensional nanotube channel. For this comparison, we
focus on the current carrying capabilities of the CNTFET by normalizing the current
per unit width, using the CNT diameter (1.4 nm), which is the only apparent length
scale.
Table 3.1: Comparison of key performance parameters for CNTFET and MOSFETs.
In this comparison it is assumed that only one SWNT is present in the
CNTFET. An optimum device layout may require an array of CNTs (to provide
enough gain and fan-out), hence these results can be scaled to give an appropriate
total current per device, bearing in mind that as the array becomes more densely
packed, screening of the gate charge by neighbouring nanotubes in the array can
reduce the actual current per tube by a factor of up to ~2. It is found that the
CNTFET is capable of approximately three to four times higher drive current per unit
width than the Si p-type MOSFETs at a gate overdrive around 1 V, with
approximately two to four times higher transconductance. This is particularly
striking, since both the channel length and gate oxide thicknesses are significantly
larger for the CNTFET than for the silicon devices. Wind et al. suggest that further
scaling of the gate–channel capacitance via reductions in gate dielectric thickness
and/or higher dielectric constant materials, along with reductions in gate length, will
lead to additional improvements in CNT device performance.
31
3.2.3
Other CNTFET
The CNTFET technology is at an early stage; devices structures are still
primitive and the devices physic still relatively unexplored. So, other the most
popular Back Gate and Top Gate structures, some of the researcher also proposed
their own structure such as N-Type, AMBIPOLAR CNTFET, Vertical Gate, and etc.
to prove the performance of the transistor is better after the channel of the transistor
replaced by CNT. Below are several examples of the differences structure of
CNTFET.
3.2.3.1 N-Type and AMBIPOLAR CNTFET
The capability to produce n-type transistors is important technologically, as it
allows the fabrication of CNT-based complementary logic devices and circuits. A
back gated n-type nanotube transistor can be obtained by doping the nanotube with
potassium vapour. The details of the procedure are reported by Liu et al.. The
mechanism is that electron transfer from adsorbed potassium atoms to the nanotube
can shift the Fermi level of the tube from the valence-band edge to the conductionband edge, thus reverting the doping from p- to n-type. [7] Fig 3.9 shows the
schematic of setup for doping and the resulting I-V characteristics.
Fig 3.9 :
a) Schematic diagram of the potassium doping setup.
32
b) I-V characteristics of the potassium-doped nanotube showing ntype behaviors.
Derycke et al. reported that p- to n-type conversion of the CNTFETs can be
made either by doping the surface of the tube using alkali metals as mentioned earlier
by Liu et al. or by simply annealing the device in vacuum or in an inert gas. The
annealing in vacuum removes the adsorbed oxygen and results in the direct
modification of the Schottky barrier height at the contacts. In contrast, doping
changes the barrier thickness and introduces significant shifts of the threshold
voltage of the device. The conversion from n-type to p-type with the intermediate
ambipolar stages is fully reversible.
An n-type top gate device as shown in Fig 3.9 (a) can be obtained by an in
situ annealing step prior to the deposition of the gate dielectric film. Thermal
treatment in an inert atmosphere drive off the adsorbed oxygen from the source and
drain contact regions, shifts the Fermi level at the contacts and effectively lowers the
barrier for electron injection, which results in an n-type behaviour. The oxide film
protects the nanotube from the ambient gases and keeps the n-type devices stable.
If a CNTFET with SiO2 protective film is annealed in vacuum or in inert
atmosphere, the initial p-type device is gradually transformed into an ambipolar FET,
i.e., the device, depending on the sign of the gate voltage VG, can operate as switches
for electrons and holes. These ambipolar transistors are stable in air and show ohmic
I-VDS curves in both the strong hole accumulation and inversion (electron
accumulation) regimes. This behavior suggests that the effective contact barriers for
both electron and hole transport are very small.
33
3.2.3.2 Multi WALL CNTFET
The complexity of structure of multi wall nanotube (MWNT) has discouraged
their detailed study and use. In principle, each of its carbon shells can be metallic or
semiconducting with different chiralities. Also, these shells can interact. It has been
found that in MWNTs side-bonded to metal electrodes, effectively only the outer
shell contributes to electrical transport. One would therefore expect that MWNTs
with semiconducting outer shell can be used to fabricate CNTFETs. However, since
the bandgap in semiconducting CNTs is inversely proportional to the tube diameter,
only small diameters MWNTs are expected to exemplify FET characteristics at room
temperature. [8]
Several CNTFETs with multi wall carbon nanotube have been reported.
Larger diameter MWNTs have shown typically no gate effect, but structural
deformation can modify their electronic structure sufficiently to allow FET behavior.
In MW CNTFET there is a large residual conductance, which can be attributed to
coupling of the outer shell to an inner metallic shell. This coupling between the
semiconducting outer shell and the metallic inner shell is expected to be activated
with activation energy of the order of ~ Eg/2. The conductance can be explained by
thinking these shells acting in parallel. Low temperatures suppress the contribution
of the inner shell while the outer semiconducting component remains almost
unchanged thereby resulting in a conductance variation as shown in Fig 3.10. Thus
we can say that a metallic inner shell is in indirect, thermally activated contact with
the electrodes.
34
Fig 3.10: Variation of conductance with gate voltage in MW CNTFET at different
temperatures
3.2.3.3 Vertical CNTFET
This vertical Carbon Nanotube FET has been proposed by the researcher in
Infineon Technology. The concept is totally difference compared to traditional
MOSFET vertical gate configuration. Fig 3.11 showed the first draft of the Vertical
CNTFET proposed by Infineon in year 2003. [16]
Fig 3.11: Vertical CNTFET (presented by Infineon Technology in Nov 2003).
The processes to build a vertical CNTFET are showed in Fig 3.12.
35
1
3
2
4
Fig 3.12: at first a Carbon Nanotube semiconductor is being built to connect the
source and drain. A layer of dielectric will cover the Carbon Nanotube
semiconductor. Gate metal will built in stage 3 and finally the Vertical CNTFET is
built.
Base on the prediction/research estimation being made by the researcher in
Infineon Technology, they strongly believe that the V-CNTFET is an alternative to
Si-MOSFET due to it will provide a better device characteristics compared to 1-D
ballistic MOSFET. For example low leakage and high current drive as showed in Fig
3.13.
36
Fig 3.13 V-CNTFET vs Si-MOSFET projections.
3.2.3.4 Nanotube Complementary Logic
There is another research on the Nanotube complementary logic being done
in year 2001. Having developed ways to fabricate p- and n-type CNTFETs with local
gating, the next step is to produce integrated circuits out of them. Of particular
interest are logic gates that form the basis of today’s computer logic. Our approach is
to use complementary CNTFETs placed in circuit to operate simple logic functions.
This kind of nanotube-based circuit is the analogue to the conventional CMOS based
logic gates and has the same advantages. That is, logic circuits based on
complementary devices aim to consume low power, favor higher gain, be stable, and
allow easy implementation in integrated circuits. In this last section, we present our
recent advances in making logic functions out of nanotube devices. A simple
example is presented in Fig. 3.14. By bonding together two ambipolar CNTFETs
stable in air, we fabricated a logic gate. An offset voltage (Vshift) between the
isolated transistor back-gates allows adjustment of the threshold of the p- and n-
37
CNTFET characteristics so that the inversion function is optimal. The response of
this circuit is abrupt and the operating voltage is well below 5V.
Fig 3.14: Logic device ("NOT" gate) made with two ambipolar CNTFETs. The
circuit consists of an inverter device shown in the inset (|V|=0.5V). An oxide layer
protects the devices so that the inverter circuit functions in air.
However, the ultimate integration in nanotube electronics would be to build a
circuit along the length of the same nanotube, i.e. produce an intra-nanotube logic
circuit. The Fig. 3.15 (a) shows an atomic force microscope (AFM) image of a small
single-wall nanotube bundle deposited on top of gold electrodes. The entire device is
covered by a polymer film (PMMA). Then, a window is opened in the PMMA using
electron beam lithography. Last, potassium is used to dope half of the bundle through
this window to produce an n-CNTFET, while the other CNTFET, protected by the
PMMA film, remains p-type. The doping is adjusted so that the thresholds for
switching of the p- and n- CNTFETs overlap. This design indeed leads to an intramolecular NOT gate. The relative position of the two thresholds voltages was
adjusted by choosing the appropriate doping level. Although the intra-nanotube
inverter shown in Fig. 3.15 is not optimized in terms of structure, it has already a
gain of about 1.6. Therefore, its output can be used to drive another gate or a more
complicated logic circuit. However, the gain of the gate depends solely on the
characteristics of the CNTFETs. As shown before, the improvements in the
CNTFETs and their device geometry (in particular the gate oxide) will further
increase the performance of the nanotube-based inverter.
38
(a)
(b)
Fig 3.15: Intra-nanotube inverter.
(a): AFM image of the device. A single-wall nanotube is placed to bridge several
gold electrodes and produces two p-type CNTFETs along the same tube. Then, the
CNTFETs are patterned with resist (PMMA) and doped selectively with potassium.
The window in the PMMA allows the conversion of only one device into nCNTFET. The other is protected and remains p-type.
(b): Characteristics of the intra-molecular inverter (V= ±2V). The straight line
corresponds to an output/input gain of one.
3.3
Current Available CNT Technology
Historically CNTs have been initially grown using Arc-Discharge and Laser
Ablation methods. However both of these methods are suitable for small volumes of
39
CNT growth. Their products have mainly been used for research on initial
characterizations of carbon nanotubes.
The third developed method to grow CNTs is Chemical vapor deposition
(CVD). CVD has long been employed in semiconductor manufacturing for many
different purposes. This method involves heating a catalyst to high temperatures in a
tube furnace and flowing a hydrocarbon gas through the tube reactor for a period of
time. Iron, nickel, cobalt particles are often used as catalyst. However use of these
metals induces defects in the CNT structures.
Fig 3.16: Single walled carbon nanotube bundles.
Synthesized CNTs have lengths on the order of tens of microns. These
nanotubes are typically bound by strong Van der Waals forces and they form bundles
(See Fig 3.16).
Since metallic and semiconducting CNTs have different applications it is
important to be able to control the type of the manufactured tube. To that end the
diameter and the chirality are the key parameter to be controlled during
manufacturing. Controlling the size and surface preparation of precursor catalyst
nanoparticles, the diameter of the nanotubes can be controlled.
However the manufacturing of a batch of nanotubes all of which are metallic
or semiconducting is a task yet to be achieved. In research often the metallic CNT’s
in the bundle are blown using a high enough current (just like a fuse) the remaining
semiconducting tubes continue to serve as the channel of the transistor. An efficient
way to isolate semiconducting CNTs in manufacturing is yet to be found.
40
In addition to the control of size and chirality, selective growth (precise
control of the position that the nanotube grows) is a very critical requirement for the
nanotubes to be utilized integrated circuits. CVD has successfully been used in
selectively growing CNTs at specific locations. This approach includes methane
CVD on flat silicon substrate containing catalyst islands. These catalyst islands are
defined using electron beam lithography.
The reported performances of the CNTFETs are comparable to those of the
state of the art MOSFETs. In the top-gate electrode CNTFET is compared against
two silicon transistors. The first transistor compared against is a p-type bulk Si
MOSFET with 15nm gate length. The second device is a 50 nm gate length-p-type
SOI transistor. For comparison, the current handling capacity of the CNTFET is
normalized to its width i.e. diameter of the nanotube.
Seen below, the CNTFET is capable of delivering three to four times higher drive
current per unit width than the Si p-type MOSFETs at -1V gate overdrive. It also has
two to four time conductances per unit width.
CNTFET 15nm bulk Si 50nm
MOSFET
SOI
Lg(nm)
260
15
50
tox(nm)
15
1.4
1.5
Vt(V)
-0.5
-0.1
-0.2
ION(μA/μm)
2100
265
650
IOFF(nA/μm) 150
<500
9
S(mV/dec)
130
~100
70
G(μS/μm)
2321
975
650
Table 3.2: Comparison of device parameters for a 260nm long CNTFET against state
of the art Si MOSFETs. Gate overdrives are set at –1V for Ion calculations
Further improvements in the current handling capacity of the CNTFETs can be
expected as gate oxides are made comparably thinner as the Si devices and the higher
k dielectrics are used.
41
With the use of top gate electrodes the CNTFETs exhibit promising results in
terms of on current handling as well as leakage current. These results show that the
CNTFETs are viable alternatives to MOSFETs especially for their high on current
levels and trans-conductances.
3.4
How to build a Top gate CNTFET
Fig 3.17 showed the process of manufacturing a top gate CNTFET. First, the
nanotube wills dispersal on top of the SiO2 and P++ Si layer. The source/drain
patterning will perform the second process to build a top gate CNTFET. The process
will continue with Photolithography, LTO and gate oxide deposition. Then last step
is making the gate patterning.
Fig 3.17: Process of Top Gate CNTFET
42
3.5
Summary
In this chapter 3, we have briefly gone through several types of CNTFET and
the studies for each CNTFET transistor properties. And we found the performance
properties of the transistor are given a higher performance properties compared to
conventional properties. Each type transistor is modeled in difference way based on
the structure of the transistor. We have also reviewed some of the current available
CNT technology in our semiconductor industry. A very simple step-by-step of Top
Gate CNTFET also been covered in this chapter.
In next chapter, we are going to discuss in detail on the project
implementation by starting the chapter with some importance basic theory on the
transport mechanism and drain current computation. The NEFG formulism is being
used in this modeling process. The detail of step-by-step will be discussed as well.
CHAPTER 4
METHODOLOGY OF IMPLEMENTATION
This chapter outlines the methodology of implementation for Ballistic
CNTFET Modeling. The basic theory of quantum transport solver NEGF formulism
will be cover in this chapter in order to provide a better understanding for the entire
modeling. Step-by-step of implementation will be detail discuss in the following
session, and hardware/software for this project will be listed as well.
4.1
Basic Theory
As we know the CNTFET is at an early stage: device structures are still
primitive and the device physics is still relatively unexplored. However, several
modeling approach have been reported to describe the electronic transport and
predict the drain current in a CNTFET. There is a wide consensus that these
transistors operate as a Schottky barrier transistors, in which the existence of onedimensional Schottky barriers at the metal/nanotube interface determines the device
performance and results in a distinct scaling behavior.
44
4.1.1
Transport Mechanism
The transport mechanism in a CNTFET is essentially one dimensional, and
there is very little carrier-phonon interaction. This transport as a function of gate
voltage can be explained with reference to Fig 4.1, which shows the band bending in
a CNTFET for two different gate field conditions.
Fig 4.1: Qualitative response of the nanotube conduction and valence band on the
gate voltage for a fixed negative source-drain voltage.
(a) A gate voltage below threshold voltage describing the situation in the transistor
off-state.
b) The band bending situation for a gate voltage well above Vth.
In Fig 4.1 (a) the device is essentially off -- there is no charge accumulated on the
tube. In Fig 4.1 (b) the gate voltage is sufficiently large to turn the transistor on.
Since holes transport is considered, the important part to focus on is the valence band
and here, in particular, the source side as emphasized by the circle in Fig 4.1 (a). To
explain the mechanism, we divide the transistor into three segments. Segments (i)
and (iii) describe the situation close to source and drain, respectively, while (ii)
accounts for the bulk part of the carbon nanotube. The most important ingredients are
the Schottky barriers in (i) and (iii).
The current from source to drain is blocked by the barrier in the source region
shown in Fig 4.1(a). However, the barrier thickness and thus the tunneling current
through the barrier can be modulated by both the gate and the source-drain field. The
interesting thing is that the bulk part (ii) of the nanotube is not directly involved in
45
controlling the off-current below the threshold voltage Vth. If the nanotube itself
would pose a barrier for current transport and thus bulk switching would dominate,
the inverse sub-threshold slope S (dVgs/d(log Id)) should decrease for decreasing
temperature. But this is not the case found in experimental observations. Instead, S
saturates at T <200 K, which indicates that the change in the CNTFET current is
determined by tunneling through the source Schottky barrier. In this picture, for Vds
exceeding a few hundred mV, the current through the nanotube device in the offstate is determined by the coupling of the gate field to the 1-D Schottky barrier in the
source region since no barrier exists in region (iii). Because of this coupling, S
becomes a function of the gate capacitance and thus the dielectric film thickness tox.
Now the transport properties as a function of gate voltage can be summarized as
follows:
•
For a given value of Vds, increasing the gate field results in an
exponential-like increase of Id. This is the case since the transmission
probability for tunneling through the source Schottky barrier increases
with decreasing barrier thickness (Fig 4.1a).
•
The situation changes when the gate voltage reaches a value (Vth) where
the valence band in region (ii) coincides approximately with the Fermi
level in the source electrode (Fig 4.1b). From this voltage on charge
starts to accumulate in the tube and the movement of the bands with the
gate voltage slows down. The barrier thickness at the source contact no
longer changes as significantly as before, and the increase in tunneling
current as a function of gate voltage is reduced accordingly.
•
Exchanging the source and drain electrodes while keeping the gate
voltage and source-drain voltage conditions constant can result in a
quite different current response of the system if the barriers in regions
(i) and (iii) are slightly different. This is due to the exponential
sensitivity of the tunneling current on the actual barrier height of the
source Schottky barrier. The role of the bulk section (ii) of the nanotube
is minor as can be seen from the significantly different dependence on
the internal fields for the same nanotube. The main function of the tube
is to provide Schottky barriers at the source and the drain of the
CNTFET. This means that the nanotube could, in principle, be replaced
46
by another one-dimensional semiconducting system with the same work
function.
4.1.2 DRAIN CURRENT
There are some models reported in the literature for predicting the drain
current in CNTFETs. Here we consider the most recent ones. Heinze et al. reported a
drain current model for top-gate CNTFETs. They solved numerically for selfconsistent electrostatic potential with the source, drain and gate voltages as the
boundary conditions. The current was then given by the Landauer formula,
I (V ) =
4e
[ F ( E ) − F ( E + eVDS )]P ( E )dE
h ∫
(4.1)
Here, VDS is the drain voltage with source taken as reference and F is the Fermi
function. They calculate the energy dependent transmission probability P(E) within
the WKB approximation for a semiconducting nanotube of bandgap 0.6 eV. Of
course, they reported that the WKB is relatively accurate when the tunneling
resistance is high, so it describes the overall ‘turn-on’ well, however, it neglects the
reflection that would occur even in the absence of a barrier, so the conductance of the
actual device may be somewhat lower than the WKB estimate.
A more detailed modeling approach is reported by Castro et al. where they
have considered a coaxial FET structure with an intrinsic nanotube as shown in Fig
4.2 and. The voltages Vgs and Vds are applied to the gate and drain terminal with
respect to source terminal.
47
Fig 4.2: Carbon nanotube FET model geometry. Here the gate is like a cylinder
placed coaxially with the nanotube and oxide layer.
Under equilibrium conditions, by which it is meant that no drain current is
present, i.e. Vds = 0, but Vgs is not necessarily zero, it is straightforward to compute
the charge and potential profile by solving Poisson’s equation consistently with the
equilibrium charge density on the nanotube. For Vgs >0, the charge on the tube is
negative, and is due to a surfeit of electrons over holes. Here we take the electronic
charge to dominate and we neglect the contribution of the holes. Away from
equilibrium, when Vds >0, the induced electron distribution on the tube will deviate
considerably from a Maxwellian or Fermi-Diracian form, on account of hot electron
injection from the contacts and, in the ballistic case considered here, the lack of
opportunity for thermalizing collisions . This precludes the calculation of the nonequilibrium charge using simple, quasi-Fermi-Dirac statistics.
At equilibrium, i.e. when VDS=0, we get from simple electrostatics,
~
~
Qc = −C ox (V gs − Vcs )
(4.2)
where Vis the equilibrium potential, with respect to the source, of the carbon
nanotube at its mid-length, i.e. away from the influence of the source and drain
contacts, and C~CSOX is the insulator capacitance for an infinitely long coaxial
system.
Out of equilibrium, i.e. when VDS =0, the tube potential is influenced by VDS,
~
Vcs = Vcs + αV DS
(4.3)
48
Qc = −C ox (VGS − VCS )
(4.4)
where α is a parameter that needs to be determined in order to specify VCS. For
VGS>0, as we are considering, QC is a negative, electronic charge.
An alternative method for calculating QC follows from the flux approach, in
which electrons in the forward- and backward-directed fluxes are summed. Here, we
do not restrict the fluxes within the tube to be hemi-Maxwellian or hemi-FermiDiracian in nature, instead, we allow the actions of tunneling and repeated reflections
between the potential barriers to modify the electron distributions from the
equilibrium form that they possess outside the tube, at the actual source and drain
metallic contacts. We can, therefore, write:
⎧⎪ ∞
⎛ 2
⎞ * ∞
⎛ 2
+
⎜
Qc = − q ⎨ ∫ g ( E ) f s ( E )⎜
− 1⎟⎟T + ∫ g ( E ) f D+ ( E , VDS )⎜⎜
⎪⎩Ec
⎠
⎝ TD
⎝ TS
Ec
⎞ * ⎫⎪
⎟⎟T dE ⎬
⎪⎭
⎠
(4.5)
Now we equate the previous 2 equation and solve for α, thereby determining VCS. An
iterative procedure is necessary because of the dependence on VCS of TS and TD, via
the potential profile, which is represented by,
β
⎧
VGS ⎡ − a ( z − a ) ⎤
− 1⎥
⎪ VCS − β
⎢e
0≤ z≤a
e −1 ⎣
⎪⎪
⎦
a ≤ z ≤ L−a
VCS
V ( z) = ⎨
β
⎪
−
(
L
−
a
−
z
)
⎡
⎤
V −V
L−a ≤ z ≤ L
⎪VCS − CS β GS ⎢e a
− 1⎥
e −1 ⎣
⎪⎩
⎦
(4.6)
where z is the distance from the source, L is the tube length and a is the barrier basewidth. This representation is based on observation of the trends in barrier shape
under those circumstances for which exact solutions are presently possible, namely:
Poisson’s equation at equilibrium, and Laplace’s equation out of equilibrium. The
trends are: a= 2RG, where RG is the radius of the gate; a barrier height at the source of
Vpk = VCS; a barrier height at the drain that varies from Vpk =VCS -VDS when a ‘spike’
49
is present, through Vpk = 0, to a negative value when VDS ≥ VCS ; a barrier ‘concavity’
that is captured by β ≈ 3 .6 for the tube considered here. The barrier profiles given
before are correct inasmuch as they prescribe values for the tunneling probabilities
TS and TD that yield a mid-length charge that is consistent with that predicted by
To complete the calculation of the drain current, the Landauer expression is used:
I
D
=
∑
i
2 q
π h
∞
∫
[ f
+
s
( E ) −
f
−
D
( E ,V
DS
) ]T
*
dE
Ec
(4.7)
where the sum is over the i conduction bands, the edges ECi of which are functions of
α ,VGS and VDS. The drain I-V characteristic defined by this equation is consistent
with the values emerging from prototype devices.
4.2
Self-Consistent simulation scheme and NEGF formulism
In this section, we briefly discuss the simulation techniques we use in this
project. This project is also an opportunity to develop the theory and computational
techniques for the atomistic simulation of small electronic devices in general. A
detailed treatment of carbon nanotube electronics requires an atomistic description of
the nanotube along with a quantum mechanical treatment of electron transport, both
ballistic and with the effects of dissipative scattering included. Metal/nanotube
contacts, nanotube/dielectric interfaces, and defects require a rigorous, ab initio
treatment, but to treat an entire device, simpler, pz orbital descriptions must be used.
50
4.2.1
Self-Consistent
The simulation of electron devices normally involves a self-consistent simulation
scheme between the electrostatic potential and the charge distribution inside the
devices. When a device is coupled to the contacts (electrodes), some charge is
transferred into or out of the device (e.g., for the source/drain contacts), or some
electric field lines penetrate into or inject out of the device (e.g., for the gate contact);
both effects will result a self-consistent potential Usc(r). This potential is called selfconsistent because the changes in Usc(r) alter the charge density p(r) inside the
device, which in turn modifies the potential Usc(r) until both the charge density and
the potential attain consistent values. To correctly model this process, we need to
solve two major equations in our simulations. The first one is Poisson equation.
r r r
r
r
∇(ε (r )∇U sc (r ) = − ρ (r )
(4.8)
which determines the self-consistent potential Usc(r) for a given charge density p(r).
Here the dielectric coefficient ε(r) is, in general, position-dependent due to the
material transition from one simulated region to another (e.g., from the Si body to
SiO2 layers). The second one is the transport equation that is solved to obtain the
electron (carrier) density n(r) inside the device for a given Usc(r). In the semiclassical
context, carrier transport is described by the Boltzmann Transport Equation (BTE).
In BTE, it is assumed that the motion of a single particle (e.g., electron) obeys
Newton’s second law while the collective behavior of the particle system (e.g., a
collection of electrons) is described by statistical mechanics. This assumption works
quite well when the device size is relatively large (i.e., much larger than the de
Broglie wavelength of electrons). In the nanometer regime, however, the wave-like
behavior of electrons becomes substantially significant, so the semiclassical transport
equation may not be valid anymore. As a result, a full quantum mechanical transport
model, such as the non-equilibrium Green’s function (NEGF) approach is necessary.
51
4.2.2
NEGF formulism
This NEGF approach is widely used in nanoscale device simulation. A
carbon nanotube can be viewed as a rolled-up sheet of graphene with a diameter
typically between one and two nanometers. The nanotube can be either metallic or
semiconducting, depending on how it is rolled up from the graphene sheet.
Semiconducting nanotubes are suitable for transistors. In order to correctly treat
carbon nanotube transistors, strong quantum confinement around the tube
circumferential direction, quantum tunneling through Schottky barriers at the
metal/nanotube contacts, and quantum tunneling and reflection at barriers in
nanotube channel need to be considered. The non-equilibrium Green’s function
(NEGF) formalism, which solves Schrödinger equation under non-equilibrium
conditions and can treat coupling to contacts and dissipative scattering process,
provides a sound basis for quantum device simulations.
The basic concepts and procedure that we need for the SNWT simulation.
Within the NEGF formalism, the device is represented by a Hamiltonian, H, which is
coupled to two infinite reservoirs, the source (S) and drain (D). The S/D reservoirs
are characterized by their respective Fermi levels, μS and μD, which are determined
by the applied voltage biases. Coupling between the active device and the S/D
contacts can be described by introducing the self-energy matrices, ΣS and ΣD .
Incoherent carrier transport (due to scattering) inside the device can also be captured
by the self-energy (ΣC) method. Once H, ΣS, ΣD, μS, μD, and ΣC are obtained, the
electron density matrix and transmission coefficient at a given energy can be
evaluated, and then the electron density and terminal currents are computed by doing
numerical integrations over the energy space (see Fig. 4.4).
52
Source
μS
Drain
Device
H, ΣC, Usc
μD
ΣS,
ΣD
Fig. 4.3: Generic transistor with coupled source/drain contact.
NEGF
{ H, ΣS, ΣD, μS, μD, and ΣC}
Usc Æ p
Iteration until self-consistent
Poisson
p Æ Usc
Fig. 4.4: self-consistent iteration between the NEGF transport and electrostatic
Poisson equation.
The NEGF can simplify into below few step:
1.
The first step is to identify a suitable basis set and Hamiltonian matrix for an
isolated channel. The self-consistent potential, which is a part of the
Hamiltonian matrix (the detail theory of Model Hamiltonian please refer to
Appendix C), is included in this step.
53
2.
The second step is to compute the self-energy matrices, ΣS, ΣD and ΣC, which
describe how the ballistic channel couples to the source/drain contacts and to
the scattering process.
3.
After identifying the Hamiltonian matrix and the self-energies, the third step
is to compute the retarded Green’s function,
G(E)=[(E+i0+)I-H- ΣS , ΣD]-1
4.
The fourth step is to determine the physical quantities of interest from the
Green’s function
Within the device, the source/drain local-density-of-state (LDOS) is DS/D =
GЃS/DG+ , where ЃS/D = i(ΣS(D)- Σ+S(D)) is the energy level broadening due to the
source/drain contact. The charge density within the devices is computed by
integrating the LDOS over energy (please refer to Appendix D for the detail theory
of Local Density of States). The charge contributed by the source contact is
∞
EN
EN
∞
Qs ( Z ) = (−e) ∫ Ds ( E , z ) f ( E − E FS )dE +
∫ D ( E, z ){1 − f ( E − E
s
FS
)}dE
(4.9)
Where e is the electronic charge and EN is the charge neutrality level. The total
charge is
∞
Q ( Z ) = Q s ( z ) + Q D ( z ) = ( − e) ∫
EN
dE. sgn[ E − E N ( z )]{Ds ( E , z ) f (sgn[ E − E N ( z )]( E − E FS )) +
D D ( E , z ) f (sgn[ E − E N ( z )]( E − E FD )
(4.10)
Where sgn(E) is the sign function, and EFS,D is the source (drain) Fermi level. For a
selfconsistent solution, the NEGF transport equation is solved with iteratively the
Poisson equation until self-consistency is achieved after which the source-drain
current is computed from
54
I=
4e
T ( E )[ f S ( E ) − f D ( E )]dE
h ∫
(4.11)
where T(E) = Trace(ΓSGΓDG+ ) is the source/drain transmission and the extra factor
of two comes from the valley degeneracy in the carbon nanotube energy band
structure.
4.3
Step-by-Step of Implementation
The detail treatment of carbon nanotube electronic required an atomistic
description of the nanotube along with quantum mechanical treatment of electron
transport, both ballistic and the effects of dissipative scattering included. In this
project we are assuming the transport is ballistic. [5] This section we will describe
the detail of step by step of implementing the NEGF solver into the simulator.
The first step is to identified a set of atomistic orbitals adequate to describe
the essential physics for carrier transport and then to write down the Hamiltonian
matrix for the isolated channel in that basis. An (n, 0) zigzag nanotube as shown in
Fig. 4.5 is assumed. There are four orbitals in the outer electron shell of a carbon
atom (s, px, py, and pz). One pz orbital is often sufficient because the bands involving
pz orbitals are largely uncoupled from the bands involving the other orbitals, and the
bands due to the s, px and py orbitals are either well below or well above the Fermi
level and, therefore, unimportant for carrier transport. With one pz orbital per carbon
atom as the basis set, the size of the Hamiltonian matrix is the number of carbon
atoms in the transistor channel. For typical problems, a carbon nanotube transistor
will consist of several thousand carbon atoms. We use a tight-binding approximation
to describe the interaction between carbon atoms, and only nearest neighbor coupling
is considered. A pz-orbital coupling parameter of t = 3eV was assumed.
55
Fig 4.5 shows that a zigzag nanotube is composed of rings of carbon atoms in
the A and B atom sub lattices. Each ring in the A-atom sub lattice is adjacent in the
x-direction to a ring in the B-atom sub lattice. There are n carbon atoms in each ring
and a total of N atoms in the entire channel. The N x N Hamiltonian matrix for the
whole nanotube channel is block tri-diagonal, where the N x N submatix, [αi],
describes coupling within an A-type and B-type carbon ring. Below equation note
that the odd numbered [α] refer to A-type rings and the even numbered to A-type
rings.
Fig 4.5: The diagram is an example of (n,0) zigzag nanotube. This circle are A-type
carbon atom and the triangles are the B-type carbon atom.
56
After specified the Hamiltonian matrix for channel, the next step is compute
the N x N self-energies matrices for the source and drain contact. Only the carbon
atoms on the first and last rings couple to the contact. So [∑S] and [∑D] are sparse.
⎡ ∑ 11
⎢ 0
⎢
[∑ S ] = ⎢ .
⎢
⎢ .
⎢⎣ 0
0 . . 0⎤
0 . . 0⎥⎥
. . . .⎥
⎥
. . . .⎥
0 . . 0⎥⎦
(4.12)
Where ∑11 is an N x N submatrix. Similar to [∑D], only the nonzero block is the last
diagonal submatrix. The detail derivations please refer to Appendix B.
The retarded green’s function
G=[(E+i0+)I-H- ΣS - ΣD]-1
Describe the bulk nanotube by H and the connection to 2 contacts by the self-energy
matrices. If the channel consist of Nc carbon rings of a (n, 0) nanotube, the
computational cost directly inverting. For ballistic case, the solution is particularly
efficient because only the first and last n columns of the Green’s function are needed.
By having this Green’s function, the local density of states can be obtained.
states can be filled according to the Fermi levels of the two contacts so that the
charge density within the device can be found. By iterating between the NEGF
equations to find the charge density and the Poisson equation to find the selfconsistent potential, a self-consistent solution is obtained. The current is then
evaluated, where the current transmission probability, is obtained from the first
diagonal block of the retarded Green’s function.
The overall simulation must be done self-consistently with Poisson’s
equation. The model of the transistor we used MOSFET –like structure (see fig 4.6).
the I-V characteristic strongly depending on the interplay of quantum transport and
electrostatic, so the self-consistent iteration between the NEGF and Poisson equation
57
have been performed. At first, charge density is given to the Poisson equation to
solve and obtain the electrostatic potential in to nanotube channel. Next, computed
the potential profile is used as the input for the NEGF transport equation and an
improved estimate for the charge density is obtained. The iteration between the
Poisson equation and NEGF transport equation continues until the self-consistent is
achieved. At last, the current is computed based on the self-consistent potential
profile.
ID = 4qkBT/h [ln(1+exp(ES-Usc))-ln(1+exp(ED-Usc))]
Where kB is the Boltzman constant, T is the operating temperature, and h is the
Planck constant.
All the simulation code is been implemented by using MATLAB program.
The physical constant and several of input parameter also been identified before start
the simulation experiments. The detail MATLAB codes please refer to Appendix A.
Gate
Carbon Nanotube
Fig 4.6: CNTFET model
Next Fig (Fig 4.7) is showed the flow chart of the entire simulation process. It
starts with input parameter identification, followed by the simulation procedure we
discussed in last session.
58
Start
Input parameter identification
„ Oxide Thickness
„ CNT diameter
„ Temperature
„ Other physic constant
and etc.
Compute Charge density by Poisson equation
Compute potential profile by NEGF transport
equation
Iteration until self-consistent potential is achive
Drain Current calculation
END
Fig 4.7: Flow chat of the simulation process.
Each process only 1 data (drain current) is collected and the process is
repeated until sufficient information for analysis. The analysis processes not only
focusing on the IV characteristic, the work also extend to find out the effect of the
physical constant change to the performance of the transistor. The same approach has
been experimented on oxide thickness and diameter of CNT.
59
4.4
Summary
Several of basic theory such as transport mechanism, drain current, NEGF
formulism and self-consistent are the main key-knowledge for the entire
methodology implementation. Without the basic theory understanding, the complex
physical engineering device simulation is not able to complete. The experiments and
analysis studies will be discussed in the chapter 5.
CHAPTER 5
RESULT ANALYSIS AND DISCUSSION
This chapter we will cover the analysis and discussion based on the
simulation result and some experiments on the effect of the thickness of the oxide
and diameter of CNT will changing performance of the transistor. We will present
the sub-band energy profiles along the channel, the 90nm (80nm gate length)
technology comparison with conventional MOSFET, experiment studies on diameter
CNT and oxide thickness effect Drain current, and end the chapter with summary.
5.1
Result analysis and discussion
In this particular section, we will studies the result of the simulation from the
energy profile to the IV characteristic of the CNTFET transistor. Every section we
will describe the approach, result and discussion.
61
5.1.1
Potential energy profile along the channel
Before went into the detail of analysis studies, I would like the touch a litter
bit on the energy profile along the channel. The local-density-of-state need to be
obtained before the simulator can go into the self-consistent scheme calculation.
When the VD and VG are supplied with 0V (no bias voltage), both source and drain
having a same value of the energy profile and the channel (carbon Nanotube) have a
higher energy compared to both source/drain. When the bias voltage is supplied to
the transistor, the energy profile along the channel (from drain to source) will change
accordingly. At this time, the current starting flow and drain current will occur.
(a)
(b)
Fig. 5.1:
(a) Energy profile when no bias voltage supply.
(b) Energy profile when bias voltage is supply.
62
5.1.2
90nm Technology (80nm Gate length) studies
The main studies we do in this project in work on 80nm Gate length
CNTFET analysis. The purpose of doing this is we would like to prove/studies the
concept of CNTFET can provide better transistor performance compared to other
equivalent technology MOSFET. We simulate the transistor is (13, 0) intrinsic CNT,
diameter of the transistor is ~1nm, band gap of ~0.84eV, gate length 80nm, oxide
thickness with 4nm, in the room temperature. Below Fig. 5.2 showed the energy
profile along the channel when the VD and VG = 0.6.
(a)
(b)
Fig. 5.2: (a) The energy profile along the channel when the VD and VG = 0.6; (b) ID =
13.9uA when VD and VG = 0.6.
The ION for this structure of transistor is 14uA and IOFF is 0.5pA.
The result from the simulation also compared with the published in IEEE
90nm MOSFET transistor performance. The observation from the analysis studies is
we found the CNTFET it can be supply with very low power compared the
equivalent technology of conventional MOSFET (in this case is 90nm technology).
The new generations of CNTFET transistor it can be operate in the 0.5v-0.7v VDS
range but for the conventional MOSFET are operating in 1.1v-1.3v range.
63
Id/Vg characteristics
2.50E-05
2.00E-05
Vd = 0.1
1.50E-05
Id
Vd = 0.2
Vd = 0.3
1.00E-05
Vd = 0.4
5.00E-06
0.00E+00
0
0.1
0.2
0.3
0.4
0.5
0.6
0.7
Vgs
Fig. 5.3: 80nm channel length CNTFET ID/VG plot.
Id/Vd characteristics
0.000025
0.00002
Vg = 0.4
0.000015
Id
Vg = 0.5
Vg = 0.6
0.00001
Vg = 0.7
0.000005
0
0
0.1
0.2
0.3
0.4
0.5
Vds
Fig. 5.4: 80nm channel length CNTFET ID/VD plot.
0.6
64
Fig.5.5: IV characteristic of 80nm channel length MOSFET plot.
5.1.3
Comparison process shrink IV characteristic
This section approach is we try the shrink the transistor channel length from
80nm to 40nm and observe the outcome from the simulation. The rest of parameter
for example oxide thickness, diameter of CNT and etc are remaining the same as
section 5.1.2. Fig 5.6 showed the combination of 2 technologies IV characteristic
plot.
It showed no much performance differences between shrank CNTFET. It is
only slightly better compared to 80nm channel length transistor. CNTFET have
ballistics transport and no scattering occur in the channel length. MOSFET scale in
dimension to increase speed and density and also to low power. However,
fundamental scaling limits are going to constrain future Silicon devices. Currently
increased devices performance and lower power are achieved by scaling all
dimensions and characteristics by α>1. MOSFET scaling is causing more severe
problem with each problem. Carbon Nanotube transistor are immune from some fo
the same scaling. The current levels in a CNTFET do not depend on the channel
65
length. Thus, in comparison to MOSFET, there is no channel length minimization or
subsequent substrate doping problem.
With this statement, we used the previous/old technology to produce a
CNTFET transistor. The reusability of the technology will bring a lot of cost saving
to the industrial and the technology is consider stable compared to latest 32nm or
22nm technology.
0.000025
0.00002
0.000015
0.00001
0.000005
0
0
0.1
0.2
0.3
0.4
Fig. 5.6: 80nm channel length vs. 40nm channel ID/VD plot.
Conclusion: in order to have better IV performance, scaled channel do no giving a
significant properties different due the CNTFET have ballistic transport. Suggestion
for improving the performance of the CNTFET transistor is by changing the
parameter of the carbon nanotube for example the carbon nanotube diameter, the
oxide thickness of the transistor and etc.
66
5.2
Oxide Thickness
The experiments of changing the oxide thickness also been carried out for
transistor performance studies. We change the oxide thickness from 4nm to 2nm and
perform the simulation. Based of the output characteristic, the thinner oxide (2nm
oxide thickness) will provide better ID (see fig 5.7) gain compared to the 4nm oxide
thickness transistor (Fig.5.4). Another trade-off from this experiment is thinner oxide
transistor will have high leakage current compared to the transistor which have
thicker oxide.
Id/Vd
0.00004
0.000035
0.00003
Id
0.000025
Vg = 0.4
Vg = 0.5
0.00002
Vg = 0.6
Vg = 0.7
0.000015
0.00001
0.000005
0
0
0.1
0.2
0.3
0.4
0.5
0.6
Vd
Fig. 5.7: 2nm oxide thickness IV characteristic.
In conventional MOSFET, the gate oxide thickness has already entered the
nanometer range; channel scattering from the rough oxide interface and tunneling
through the thin oxide are becoming prevalent problems. Carbon nanotube transistors
do not have these difficulties; all chemical bonds are satisfied in a carbon nanotube
and thus, there is less oxide to channel interface problem. A multitude of oxide can
be placed on the nanotube and thus, many high-k dielectrics can be incorporated into
CNTFET to reduce the tunneling current.
67
5.3
Diameter Carbon Nanotube change
This section we studies on the experiments of changing the diameter of
carbon nanotube sizing and below is the observation we have.
The approach of this experiments is we used the same technology (means
most of the input parameter are same as section 5.1.2 80nm gate length) but we
change the diameter sizing from 1nm to 2 nm and obtain the output result. The
observation from the experiment is the current change dynamically with the changes
of the nanotube diameter. The energy bandgap of the CNT is inversely proportional
to the nanotube diameter (Egap α 1/Diameter). It was describe in chapter 2 Carbon
Nanotube introduction and detail physic section.
Due to the drain current of the CNTFET is depending on the carbon nanotube
properties, the experiment and the published data also shown with the large diameter
nanotube (smaller energy bandgap) the threshold voltage will be reached sooner and
be smaller in magnitude.
The choices of the diameter it brings to a trade-off between the performance
and the on-off current ratio.
(a)
68
(b)
Fig. 5.8: (a) ~2.5 nm diameter CNT transistor, (b) ~1.3 nm diameter CNT transistor.
Oxide thickness is 2nm. Data obtained from Joerg Appenzeller IBM.
1nm vs 2nm Diameter CNT tube IV comparison
3.00E-05
2.50E-05
2.00E-05
Vg = 0.2 (1nm)
1.50E-05
Id
Vg = 0.2 (2nm)
Vg = 0.1 (1nm)
1.00E-05
Vg = 0.1 (2nm)
5.00E-06
0.00E+00
0.1
0.2
0.3
0.4
0.5
-5.00E-06
Vg
Fig. 5.9: The IV characteristic of 1nm and 2nm diameter CNT transistor
69
5.4
Summary
As a summary of this section, the basic theory we studied in previous chapter
is proven by the experiments we carried out in this section. The atomistic devices
quantum transport, device engineering issue and devices physic is well understanding
and clearly seen after this analysis studies process.
Carbon Nanotube can have very impressive current characteristics; however,
as was mentioned above, the control parameter of the properties of the carbon
nanotube will change the drain current directly and the channel length does not
impacting the performance much.
In general, once the process variation are controlled, CNTFET can excel in
digital circuit design because of the large Ion:Ioff and high current drive.
CHAPTER 6
CONCLUSION AND FUTURE WORK
This chapter is concluding the entire project thesis and propose/recommend
some future enhancement work to bring this research work more interesting.
6.1
Conclusion
Aggressive scaling of CMOS has led to higher and higher integration density,
the higher performance of devices, low power consumption and more complex
function. However, it will eventually reach its limit in future. As device sizes
approach the nanoscale, new opportunities arise from harnessing the physical and
chemical properties at the nanoscale. Carbon Nanotubes are considered as the most
promising carbon nanostructure material is realizing the nanoelectronic transistors
back in year 1991. The understanding of carbon nanotube transistor is evolving and
the performance of the transistor is improving very rapidly. CNTFET devices present
a bright future and promise to sustain FET scaling and Moore’s Law should their
practical and manufacturing problems be overcome.
71
The purpose of this project is simulate the ballistic CNTFET, understanding
the device physic and studies the simulation result (IV characteristic) comparing to
the conventional MOSFET. The main objective of the project is achieved. The
simulator is applied quantum transport atomistic description device solver which is
NEGF formulism and self-consistent scheme to obtain the local-density-of-state. And
based on the total charge along the channel, the drain current is computed. The
performance analysis has been studies in chapter 5, with some discussion.
The main analysis is studies on the IV characteristics of the CNTFET and
compared the simulation result with the convention equivalent technology MOSFET.
We found the performance of this new generation CNTFET is much better compared
to the MOSFET. Apart from the comparison analysis, the effect of the gate oxide
thickness and the diameter of the CNT have significant effect on the performance of
the transistor. In MOSFET, the gate oxide thickness has already entered the
nanometer range; channel scattering from the rough oxide interface and tunneling
through the thin oxide are becoming prevalent problems. Carbon nanotube transistors
do not have these difficulties; all chemical bonds are satisfied in a carbon nanotube
and thus, there is less oxide to channel interface problem. A multitude of oxide can
be placed on the nanotube and thus, many high-k dielectrics can be incorporated into
CNTFET to reduce the tunneling current.
The large potential of CNTFET transistor to semiconductor industry and
microelectronic system due the large Ion:Ioff, high current drive and other special
properties of carbon nanotube. However, the carbon nanotube field still in the early
stage and the technology for reducing the process variation should be focused for this
moment.
72
6.2
Future Work
Although the project has successfully delivered, but this work still can
extended in following ways:
1.
Create a graphical user interface (GUI) for user – this work can be
extending to create a better GUI for user enter the input parameter and
obtain the output into graph/table. It will give a better understanding
for user on the devices physic and the electron transport.
2.
Convert the devices characteristic into SPICE model for circuit
design – after achieving the device level understanding, it is important
to put the CNTFET in to circuit level or system level design and
investigate the performance of the circuit (For example the timing and
power for a digital circuit). The assessment extendable to analog
circuitry or other time-domain circuitry to assessing the RF
performance (high-frequency characteristic).
3.
New applications find out – the visibility studies can also extend to
have more CNT application and not only used for a transistor. Since
the CNT electrostatic studies is part of the modeling, we should look
into how the CNT applied into other electronic devices for example
RAM application, CNT contact/Vias for 2 metal layer connection to
reduce the scattering, biological sensing, opto-electronic and etc.
4.
Extend the modeling to CNT Array FET – conventional MOSFET
having W/L sizing and how we going to extend the CNTFET into
CNT Array FET? This research can be extending to establish the
methodology of the CNT Array FET, the structure of the transistor,
the performance of the device and the criteria of the transistor. If the
nanotubes are placed below a certain pitch, screening nanotubes will
become importance for capacitance measurement. [23]
REFERENCE
1.
Toshinori Numata (2005), Control of Threshold-Voltage and short-Channel
Effects in Ultrathin Strained-SOI CMOS Devices. IEEE Transactions on
Electron Devices, Vol. 52, No. 8, August 2005.
2.
Jeffrey Lutze and Suresh Venkatesan (1995), Techniques for Reducing the
Reverse short Channel Effect in Sub-0.5um CMOS. IEEE Electron Device
Letters, Vol. 16, No. 9, September 1995.
3.
Riichiro Saito (1998), Physical Properties of Carbon Nanotubes. London.
Imperial College Press
4.
Peter J.F. Harris (2001), Carbon Nanotubes and Related Structure,
Cambridge University Press.
5.
Mark Lundstrom and Jing Guo (2006), Nanoscale Transistor Device Physic,
Modeling and Simulation. United States of America. Springer
6.
Supriyo Datta (2005), Quantum Transport Atom to Transistor. United
Kingdom. Cambridge University Press.
7.
R. Martel et al., “Ambipolar Electrical Transport in Semiconducting SingleWall Carbon Nanotubes,” Phys. Rev. Lett. (2001).
74
8.
R. Martel, T. Schmidt, H.R. Shea, T. Hertel, and Ph. Avouris, Single- and
Multi-wall Carbon Nanotube Field-effect Transistors, Applied Physics
Letters, October 1998.
9.
A. Javey, J. Guo, M. Paulsson, Q. Wang, D. Mann, M. Lundstrom, and H. J.
Dai "High-field quasiballistic transport in short carbon nanotubes," Physical
Review Letters, vol. 92, pp.106804.1-106804.4, 2004
10.
R. Martel et al., Carbon Nanotube Field-Effect Transistors and Logic
Circuits, Session 7, Design Automation Conference, June 10-14, 2002, New
Orleans, Lousiana, USA.
11.
H.-S. P. Wong, “Beyond the conventional transistor,” IBM J. Res. & Dev.,
March/May 2002.
12.
S. J. Wind Columbia University “Carbon Nanotube Devices for future
Nanoelectronis”
13.
Zhibin Ren, Nanoscale MOSFET: Physic, Simulation and Design. Ph.D
Thesis. Purdue University. 2001
14.
David Llewellyn John, Simulation Studies of Carbon Nanotube Field-Effect
Transistor, Ph.D Thesis. University of British Columbia. 2006
15.
Julia Van Meter Cline, Characteristic of Schottky Barrier Carbon Nanotube
Transistor and their Application to Digital Circuit Design. Master of Science
Thesis. Massachusetts Institute of Technology. 2004
16.
S. J. Wind et al., Vertical scaling of carbon nanotube field-effect transistors
using top gate electrodes, Applied Physics Letters, May 2002.
17.
Adrian Bachtold et al., Logic Circuits with Carbon Nanotube Transistors,
SCIENCE Vol 294. November 2001.
75
18.
Yu-Ming Lin, Joerg Appenzeller, and Phaedon Avouris, Novel Carbon
Nanotube FET Design with Tunable Polarity IBM
19.
Xiaolei Liu et al., Carbon Nanotube Field-Effect Inverters, Applied Physics
Letters, November 2001.
20.
V. Derycke, R. Martel, J. Appenzeller, and Ph. Avouris, Controlling doping
and carrier injection in carbon nanotube transistors, Applied Physics Letters,
2002.
21.
Arijit Raychowdhury, Saibal Mukhopadhyay, Kaushik Roy, Purdue
University Modeling of Ballistic Carbon Nanotube Field Effect Transistors
for Efficient Circuit Simulation IEEE November 2003.
22.
Chris Dwyer, Moky Cheung, and Daniel J. Sorin. US, Semi-empirical SPICE
Models for Carbon Nanotube FET Logic, IEEE Conference no
Nanotechnology Munich, Germany, August 2004.
23.
X.Wang, H-S.P Wong, P Oldigs and R Miller, Electrostatic analysis of
carbon nanotube arrays, International Conference of Simulation of
Semiconductor Processes and Devices, pp163-166, September 2003.
APPENDIX A
MATLAB source code
% Simulation of Ballistic CNTFET
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
% input parameTempmpr
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
n
Lab
= 13;
= 3/2*acc;
d_cnt = n*sqrt(3)*acc/pi;
Vpp
= -3.0;
% tight-binding parameTempmpr
Egh1 = abs(2*Vpp*cos(round(n*2/3)*pi/n)+Vpp);
psi_md = Egh1;
Tempmp
kBT
% CNT work function
= 300;
%Lattice Tempmpmperature
= k_B*Tempmp/q;
delta = abs(Egh1)/kBT;
N1D
= 8/(3*pi*acc*abs(Vpp))*kBT;
Ne_0 = 4*kBT/(3*pi*abs(Vpp)*acc);
die_ins = 16;
% oxide dielectric
t_ins = 4.0e-9;
% oxide thickness
EmgaTempmp = phi_g - psi_md;
kf = 2*pi/(3^1.5*acc);
t1 = 3*acc*abs(Vpp)/(4*a*sin(kf*a));
77
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
% Biasing
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
Vg_0
= 0.2; %GaTempmp contact bias
Vd_0
= 0.6; %Drain contact bias
criTempmprion_inner=1e-7;%in eV
criTempmprion_ouTempmpr=1e-3;%in eV
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
%universal constant
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
die_o = 8.854e-12;
% dielectric constant of vacuum, F/m
q
% electron charge, Cl
= 1.6e-19;
k_B
= 1.38e-23;
% Boltzmann constant, J/K
h_bar = 1.055e-34;
% Planks's constant, J*s
mass_e
% mass of electron, kg
acc
= 9.11e-31;
= 1.42e-10;
% C-C bonding distance, m
%%%%%%%%%%%%%%%%%%%%%
%charge
%%%%%%%%%%%%%%%%%%%%%
Xe=2*Lab+a*[0:(Nw-1)];
XI=[0 Xe Xe(Nw)+2*Lab];
Lw=a*(Nw-1)+4*Lab; EmXi=[Em(1); Em; Em(Nw)];
Nab=floor(Lw/Lab);
Np=2*Nab;
Xcnt=zeros(Np,1);
Em_atom=zeros(Np,1);
for ii=1:Np
Xcnt(ii)=acc*(3*ii/4+(1-(-1)^ii)/8-0.5);
end
Em_atom=inTempmprp1(XI,EmXi,Xcnt);
for ii_band=1:Nband
if ii_band==1
I1=round(n*2/3);
b2=2*Vpp*cos(I1*pi/n);
dI=sign(2/3-I1/n);
else
if mod(n,3)==0 % metallic
I=round(n*2/3)+ii_band-1;
78
else
% semoconducting
I=I1+dI;
dI=sign(-dI)*ii_band;
end
b2=2*Vpp*cos(I*pi/n);
end
Egh=abs(b2+Vpp);
% energy grid
E_sTempmpp=1e-3;
if twob_flag==0
Ef_tail_up=0.2;
Ef_tail_low=0.2;
E_peak=max(0,max(Em_atom+Egh));
E_bot=min(Em_atom+Egh);
else
Ef_tail_up=0.2;
Ef_tail_low=0.2;
E_peak=max(0,max(Em_atom+Egh));
E_bot=min(-Vd_bias,min(Em_atom-Egh));
end
E_number=round((E_peak+Ef_tail_up-E_bot+Ef_tail_low)/E_sTempmpp)+2;
E=linspace((E_bot-Ef_tail_low),(E_peak+Ef_tail_up),E_number);
delta_E=((E_peak+Ef_tail_up)-(E_bot-Ef_tail_low))/(E_number-1);
% define the Hamiltonian
Hup=zeros(Np-1,1);
for ii=1:Np/2
Hup(ii*2-1)=b2;
if ii<Np/2
Hup(ii*2)=Vpp;
end
end
AUD=-Hup;
Ne_atom=zeros(1,Np);
Ne_atom=(4/(2*pi*(3*acc/4)))*Ne_atom;
X_ring=0.5*(Xcnt(1:2:Np)+Xcnt(2:2:Np));
Ne_ring=0.5*(Ne_atom(1:2:Np)+Ne_atom(2:2:Np));
Ne_sub=inTempmprp1(X_ring,Ne_ring,Xe)';
Ne_bias=Ne_bias+Ne_sub;
end
79
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
% END OF SELF CONSISTEMPMPNT LOOP
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
[Ie_Tempmpm, Gd_Tempmpm] = current(Em_cnt_new,Vd_bias(ii_vd),kBT,...
Nband,n,Vpp,Lab,a,model,WKB_flag,twob_flag);
Ne(:,ii_vg,ii_vd)=Ne_bias;
Ec(:,ii_vg,ii_vd)=Em_cnt_new+Egh1;
Ie(ii_vg,ii_vd)=Ie_Tempmpm;
E_sub = Ec;
Ne_sub = Ne;
save mos_results XI E_sub n Ne_sub Vd_bias Vg_bias phi_g Ie Ng_sTempmpp Nd_sTempmpp
Lg t_ins Egh1
%% Save partial results (In case simulation stops)
end % drain bias loop
end % gaTempmp bias loop
[IG_Tempmpm dum]=myquad(@func_current,E(1),E(E_number),1e10,[],Em_atom,AUD,Vd_bias,Vpp,Egh,kBT,WKB_flag,[]);
Id=Id+4*q^2/(2*pi*h_bar)*IG_Tempmpm(1)
Gd=Gd+(1/(4*kBT))*IG_Tempmpm(2);
%%%%%%%%%%%%%%%
%current
%%%%%%%%%%%%%%%
Nw=length(Em);
Xe=2*Lab+a*[0:(Nw-1)];
XI=[0 Xe Xe(Nw)+2*Lab];
Lw=a*(Nw-1)+4*Lab;
EmXi=[Em(1); Em; Em(Nw)];
Nab=floor(Lw/Lab);
NR=2*Nab;
Xcnt=zeros(NR,1);
Em_atom=zeros(NR,1);
for ii=1:NR
Xcnt(ii)=acc*(3*ii/4+(1-(-1)^ii)/8-0.5);
end
Em_atom=inTemprp1(XI,EmXi,Xcnt);
En=Em_atom;
IG_Tempm=zeros(1,2);
for ii_band=1:Nband
if ii_band==1
80
I1=round(n*2/3);
b2=2*Vpp*cos(I1*pi/n);
dI=sign(2/3-I1/n);
else
I=I1+dI;
b2=2*Vpp*cos(I*pi/n);
dI=sign(-dI)*ii_band;
end
Egh=abs(b2+Vpp);
% energy grid
E_sTempp=1e-3;
if twob_flag==0
Ef_tail_up=0.2;
Ef_tail_low=0.2;
E_peak=max(0,max(Em_atom+Egh));
E_bot=min(Em_atom+Egh);
else
Ef_tail_up=0.2;
Ef_tail_low=0.2;
E_peak=max(0,max(Em_atom+Egh));
E_bot=min(-Vd_bias,min(Em_atom-Egh));
end
E_number=round((E_peak+Ef_tail_up-E_bot+Ef_tail_low)/E_sTempp)+2;
E=linspace((E_bot-Ef_tail_low),(E_peak+Ef_tail_up),E_number);
delta_E=((E_peak+Ef_tail_up)-(E_bot-Ef_tail_low))/(E_number-1);
% define the Hamiltonian
Hup=zeros(NR-1,1);
for ii=1:NR/2
Hup(ii*2-1)=b2;
if ii<NR/2
Hup(ii*2)=Vpp;
end
end
AUD=-Hup;
[IG_Tempm dum]=myquad(@func_current,E(1),E(E_number),1e10,[],Em_atom,AUD,Vd_bias,Vpp,Egh,kBT,WKB_flag,[]);
Id=Id+4*q^2/(2*pi*h_bar)*IG_Tempm(1)
Gd=Gd+(1/(4*kBT))*IG_Tempm(2); % normalized by 4e^2/h
end
end
81
%%%%%%%%%%%%%%%
% Plot
%%%%%%%%%%%%%%%
figure(1);
for ii_vg=1:Ng_sTempmpp+1
plot(XI',E_sub(:,ii_vg,Nd_sTempmpp+1),'b','linewidth',[2]); hold on
plot(XI',E_sub(:,ii_vg,Nd_sTempmpp+1)-2*Egh1,'r','linewidth',[2]); hold on
end
for ii_vd=1:Nd_sTempmpp+1
plot(XI',E_sub(:,Ng_sTempmpp+1,ii_vd),'b','linewidth',[2]); hold on
plot(XI',E_sub(:,Ng_sTempmpp+1,ii_vd)-2*Egh1,'r','linewidth',[2]); hold on
end
grid on
%set(gca,'xlim',[-25 25])
title('Subband energy profiles along the channel');
set(gca,'linewidth',[2],'fontsize',[20],'position',[0.15,0.2,0.74,0.7])
figure(2);
for ii_vd=1:Nd_sTempmpp+1
semilogy(Vg_bias',1e6*Ie(:,ii_vd),'o-','LineWidth',2);
hold on
end
grid on
% set(gca,'xlim',[0 0.4]);
% set(gca,'fontsize',[24], 'linewidth',[2]);
% set(gca,'position',[0.20 0.25 0.65 0.60]);
xlabel('V_{G} [V]')
ylabel('I_{DS} [\muA/\mum]')
set(gca,'linewidth',[2],'fontsize',[20],'position',[0.15,0.2,0.74,0.7])
hold off;
APPENDIX B
The source/drain self-energies in real space
The overall size of the self-energy matrices for the source and drain contacts
is the same as the Hamiltonian matrix for the channel, but the self-energy matrices
are highly sparse. For example, only one carbon ring at the source end of the channel
couples to the source, thus only one submatrix, the (1, 1) submatrix in the basis used
for eqn. (4), is nonzero for the source self energy, ΣS. Similarly, only one sub-matrix
is non-zero for the drain self-energy, ΣD. The non-zero entry of the self-energies can
be computed by a recursive relation for the surface Green’s function. Here we
compute the self-energy for a semi-infinite nanotube source. The self-energy
approach can be readily extended to treat any type of contacts, for example, metalnanotube contacts, as will be discussed later. Fig. B1 shows how carbon rings are
coupled for a semi-infinite nanotube source. Each circle (triangle) represents a
carbon ring consisting of A(B)-type carbon atoms. The carbon ring couples to the
nearest ring, with a coupling matrix of β1 or β2, and gm is the surface Green’s
function for the mth ring in the source extension, ordered from the source/channel
interface. The recursive relation relates the surface Green’s functions,
gm = [(E+i0+)I- αm- τ gm+1 τ+]-1
B1
where τ is the coupling matrix between the mth and the (m+1)th carbon rings and α
m is the Hamiltonian matrix of the mth ring. Applying this recursive relation to the
nanotube in Fig A1, we get
83
Eqn (B2)
Fig. B1. Computing the source self-energy for a zigzag nanotube. The circles
represent A-type carbon rings and the triangles represent B-type carbon rings. gi is
the surface Green’s function for the ith carbon ring inside the source. β1 (β 2 ) is the
first (second) kind coupling matrix between neighboring rings, as described in the
text.
Note that the potential is invariant inside the source, so α1 =α2. Furthermore,
g1 = g3 due to the periodicity of the nanotube lattice. Using these relations, eqn. (B2)
becomes two coupled matrix equations with two unknowns, g1 and g2. The surface
Green’s function can be numerically solved from Eqn (A2). The non-zero submatrix
of the source self-energy matrix is Σ
s
1, 1
= β1 g1 β1+, where the superscript denotes
that it is the (1, 1) submatrix of the overall source self-energy matrix. The self-energy
for the drain contact can be computed in a similar way.
APPENDIX C
Model Hamiltonian
This appendix we are referring to Supriyo Datta, Quantum Transport Atom to
Transistor, pg 156-162 to give some idea on the atomistic Hamiltonian concept.
Atomistic Hamiltonian: let us start with the question of how to we write [H0] to
represent the inhomogeneous collection of isolated materials that comprise the
device, from knowledge of their individual band-structures. For example, we could
model the channel material with a [H0] that can be represented schematically as a
network of unit cells [Hnn] interconnected by ‘bonds’ [Hnm] of the same size (b x b).
Each of these matrices is of size b x b, b being the number of basis functions per unit
cell (Fig. C1).
[Hnm]
[Hnn]
Fig C1: Any part of the device (e.g. the channel – in our project we consider it as
Carbon nanotube material) can be represented by an atomistic Hamiltonian matrix
that can be depicted schematically as a 3D network of unit cells described by
matrices [Hnn] and bonds described by matrices [Hnm], n ≠ m. We have arranged the
unit cells in FCC-like network since that is the arrangement for most common
semiconductors.
85
We knowing all the [Hnm], the full bandstructure can be calculated from the
eigenvalues of the (b x b)
[h(kr)] = ∑[H
m
r r
nm
]e ik .( d
r
m −d n )
C1
The insulator material would obviously be described by a different set of
matrices that can be deduced from its bandstructure. The difficult part to model is the
interface. This is partly due to our ignorance of the actual atomistic structure of the
actual interface. But assuming that we know the microstructure exactly, it is still not
straightforward to figure out the appropriate bond matrix [Hnm] between two unit
cells n and m belonging to different materials A and B. Clearly this information is
not contained in the individual bandstructures of either A or B and it requires a more
careful treatment. We will not get into this question but will simply represent an A-B
bond using the average of the individual [Hnm] matrices for A-A bonds and B-B
bonds.
Effective mass Hamiltonian: The energy levels around the conduction band
minimum can often desribed by a simple relation like
r
h 2k 2
h( k ) = E c +
2mc
C2
where Ec and mc are constants that can be determined to obtain the best fit. We could
easily write down a differential equation that will yield energy eigenvalues that
match Eq C2.
We can use the basic bandstructure equation in Eq C1 to write down the
corresponding dispersion relation:
h(kx) = (Ec + 2t0) - t0eikxa - t0e-ikxa
C3
86
Fig C2: The effective mass Hamiltonian matrix in 1D can be visualized as a 1D array
of unit cells each with energy Ec + 2t0 bonded to its nearest neighbors by -- t0
Fig. C3: The effective mass Hamiltonian matrix can be depicted schematically as a
3D network of unit cells (unrelated to the actual crystal structure) each with energy
Ec + 6t0 bonded to its nearest neighbors by -- t0.
To reduce the parabolic relation in Eq C2 if kxa is small enough that (1-cos kxa) can
be approximated with (kxa)2/2 (and the same with kya and kza)
r
h 2 (k x2 + k y2 + k z2 )
h( k ) = E c +
2mc
C4
This Hamiltonian only describes the eigenstates around the bottom of the conduction
band where Eq C2 provide an adequate approximation, unlike an atomic Hamiltonian
that describe the full bandstructure (see Eq C1).
87
Spatially varying effective mass: effective mass equation are often used to model
“heterosructures” consisting of different materials such that the conduction band
edge Ec and/or the effective mass mc appearing.
⎡
r
r
h2 r
1 r ⎤ r
E
r
(
)
.(
−
∇
r ∇)⎥ f (r ) = Ef (r )
⎢ c
mc ( r ) ⎦
2 mc
⎣
C5
It can be shown that if we apply the finite difference method to this version at an
interface where the effective mass change from m1 to m2 then we obtain a
Hamiltonian matrix that can be represent as shown Fig.C4.
Fig C4
The point to note is that the resulting Hamiltonian matrix
⎡ E c + 2t1
⎢ −t
1
⎢
⎢⎣ 0
− t1
E c + t1 + t 2
− t2
0 ⎤
− t 2 ⎥⎥
E c + 2t 2 ⎥⎦
C6
Is hermitian as needed to ensure that the energy eigenvalues are real and current is
conserved. By contrast if we start from one of the other possibilities like
⎡
r
r
h2
2⎤
−
E
r ∇ ⎥ f (r ) = Ef (r )
⎢ c
2mc ( r ) ⎦
⎣
C7
And use the finite difference method we will end up with a Hamiltonian matrix of the
form (t0 ≡ (t1+t2)/2)
88
⎡ E c + 2t1
⎢ −t
1
⎢
⎣⎢ 0
− t1
E c + 2t 0
− t2
0 ⎤
− t 0 ⎥⎥
E c + 2t 2 ⎦⎥
C8
As we have mentioned before, writing down the appropriate Hamiltonian for the
interface region requires knowledge of the interfacial microstructure and simple
approximations are often used. But the important point to note is that whatever
approximation we use, a fundamental zero-order requirement is that the Hamiltonian
matrix should be hermitian. Otherwise we can run into serious inconsistencies due to
the non-conservation of probability density and the resulting lack of continuity in
electron flow.
APPENDIX D
Local Density of States (LDOS)
This appendix we are referring to Supriyo Datta, Quantum Transport Atom to
Transistor, pg 191-199 for local density of state theory.
Local Density of States: a channel coupled to a contact can be described by a
modified Schrodinger equation of the form E{Ψ}=[H+∑]{Ψ}+{S} where {S}
represents the excitation from the contact and the self-energy represents the
modification of the channel by the coupling. Unlike [H], [H+∑] has complex
eigenvalues and the imaginary part of the eigenvalues both broadens the density of
states and gives the eigenstates a finite lifetime. In this section we will talk about the
first effect and explain how we can calculate the density of states in an open system.
In the next section we will talk about the second effect. Consider the composite
system consisting of the channel and the contact. We agreed that a system with a set
of eigenvalues has a density of states given by
(D1)
How can different energy levels have different weights as implied in the broadened
lineshape on the right-hand side of Fig D1? Doesn’t Eq. (D1) tell us that each energy
level gives rise to a delta function whose weight is one? The problem is that the
density of states in Eq. (D1) does not take into account the spatial distribution of the
states. If we want to know the local density of states in the channel we need to
90
weight each state by the fraction of its squared wavefunction that resides in the
channel denoted by d:
(D2)
Fig D1: a channel connected to one contact. The set of discrete levels broaden into
continues density of state as shown.
Fig D2: a channel described by [H] is connected though [τ] to a contact described by
[HR].
For example, suppose the device with one energy level s were decoupled from the
reservoir with a dense set of energy levels {εR}. The total density of states would
then be given by
(D3)
91
Fig D3: A channel with a single energy level s coupled to a reservoir with a dense set
of energy levels {εR}. The local density of states on the channel shows a single sharp
level before being coupled to the reservoir. But on being coupled, it shows a series of
levels of varying heights reflecting the fraction of their squared wavefunction that
reside in the channel.
while the local density of states on the channel would simply be given by
(D4)
since the reservoir states have wavefunctions that have no amplitude in the channel at
all. Once we couple the channel to the reservoir, things will not be so clear cut any
more. There will be one level with its wavefunction largely on the channel, but there
will be many other neighboring states with their wavefunctions residing partially on
the channel. If we look at the local density of states in the channel we see a series of
energy levels with varying heights, reflecting the fraction of the squared
wavefunction residing in the channel (Fig. D3)
In general we can define a local density of states (LDOS) D(r: E) that weights each
level by the square of its wavefunction at the location:
(D5)
92
which can be viewed as the diagonal element (divided by 2π) of a more general
concept called the spectral function [A(E)]:
(D6)
just as the electron density
(D7)
can be viewed as the diagonal element of the density matrix:
(D8)
that Eq. (D8) is just the real-space representation of the matrix relation:
(D9)
Using the same argument we could write the spectral function as
(D10)
and view Eq. (D6) as its real-space representation. If we use the eigenstates of H as
our basis then [H] is diagonal:
(D11)
And so is [A(E)]
(D12)
93
Equation (D6) transforms this matrix into a real-space representation. In principle we
could write the spectral function in any representation and its diagonal elements will
tell us the LDOS (times 2π) at energy E in that representation, just as the diagonal
elements of the density matrix tell us the local electron density in that representation.
The total number of electrons N is given by the sum of all the diagonal elements of
[p] or the trace of [p], which is independent of representation:
(D13)
Similarly, the total density of states given by the trace of the spectral function [A]
divided by 2π is independent of representation and is readily written down from the
eigenstate representation:
(D14)
Sum rule: An important point to note is that if we look at the total number of states
at any point integrated over all energy, the answer is one. If we start with a device
having one level and couple it to a reservoir, it will broaden into a series of levels
(Fig. D3) of varying strengths representing the fact that the wavefunction for each
level contributes to different extents to the device. But if we add up the strengths of
all the levels the answer is the same as that of the original level. What the device
loses from its one level due to hybridization, it gains back from the other levels so
that the broadened level in the device can accommodate exactly the same number of
electrons that the one discrete level could accommodate before it got coupled to the
reservoir. This sum rule could be stated as follows:
(D15)
is easy to see from Eq. (D12) that in the eigenstate representation
(D16)
94
The point is that this quantity will look the same in any representation since the
identity matrix remains unchanged by a change in basis.
Green’s Function: In evaluating the spectral function it is convenient to make use of
the identity
(D17)
To write
(D18)
where 0+ denotes a positive infinitesimal. Equation (D18) would be a simple
extension of (D17) if the argument (El — H) were an ordinary number. But since
(El-H) is a matrix, Eq. (D18) may seem like a big jump from Eq. (D17). However,
we can justify it by going to a representation that diagonalizes [H], so that both sides
of Eq. (D18) are diagonal matrices and the equality of each diagonal element is
ensured by Eq. (D17). We can thus establish the matrix equality, Eq. (D18) in the
eigenstate representation, which should ensure its validity in any other
representation.
The advanced Green’s Function is defined as
(D19)
Self-energy matrix –all over again: the overall Green’s Function can be writeten
from (D19) as
(D20)
95
The power of the Green’s function method comes from the fact that we can evaluate
the (d x d) subsection [G] that we care about exactly from the relation
(D21)
Where ∑(E) is the self-energy matrix.
using straightforward matrix algebra
(D22)
Then
(D23)
Hence
(D24)
Compared Eq D22 with Eq D20, and making the obvious replacement we obtain for
Eq D24.
(D25)
Equation (D24) is a well-known result that is often used to find the inverse of large
matrices by partitioning them into smaller ones. Typically in such cases we are
interested in finding all the component matrices a, b, c, and d and they are all
approximately equal in size. In our problem, however, the matrices a, A are much
smaller than the matrices d, D and we only want to find a. Equation (D21) allows us
to evaluate [Gj by inverting a matrix of size (d x d) rather than the full (d + R) x (d +
R) matrix in Eq. (D20). This can be a major practical advantage since R is typically
much larger than d. But the idea of describing the effect of the surroundings on a
device through a self-energy function [∑] is not just a convenient numerical tool. It
96
represents a major conceptual step and we will try to convey some of the
implications in the next section. For the moment, let us look at a couple of examples,
one analytical and one numerical.
Analytical example: Consider a uniform infinite 1D wire modeled with a one-band
effective mass Hamiltonian of the form shown in Fig. D4. Since this is a uniform
wire the eigenstates can be catalogued in terms of k obeying a dispersion relation and
we can use our previous results to write the DOS per unit cell as
(D26)
Now let us obtain this same result using the Green’s function method
developed in this section. We replace the infinite 1D wire with a single unit cell and
add self-energy terms to account for the two semi-infinite wires on either side (Fig
D5)
The Green’s function for this single cell is a (1 x 1) matrix or a number
(D27)
Fig D4
Fig D5
97
Fig D6
Which is simplified making use of the dispersion relation E=Ec+2t0 (1-cos ka) to
obtain
(D28)
From which the DOS is obtained:
Which is the same as the previous result since